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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
commit | ace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch) | |
tree | b2d64bc10158fdd5497876388cd68142ca374ed3 /arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | |
parent | Initial commit. (diff) | |
download | linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.tar.xz linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.zip |
Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts new file mode 100644 index 0000000000..e662677a6e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for Freescale LS1012A RDB Board. + * + * Copyright 2016 Freescale Semiconductor, Inc. + * + */ +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include "fsl-ls1012a.dtsi" + +/ { + model = "LS1012A RDB Board"; + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; + + aliases { + serial0 = &duart0; + mmc0 = &esdhc0; + mmc1 = &esdhc1; + }; +}; + +&duart0 { + status = "okay"; +}; + +&esdhc0 { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; + status = "okay"; +}; + +&esdhc1 { + mmc-hs200-1_8v; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + accelerometer@1e { + compatible = "nxp,fxos8700"; + reg = <0x1e>; + interrupt-parent = <&gpio26>; + interrupts = <13 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "INT1"; + }; + + gyroscope@20 { + compatible = "nxp,fxas21002c"; + reg = <0x20>; + }; + + gpio@24 { + compatible = "nxp,pcal9555a"; + reg = <0x24>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@25 { + compatible = "nxp,pcal9555a"; + reg = <0x25>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio26: gpio@26 { + compatible = "nxp,pcal9555a"; + reg = <0x26>; + interrupt-parent = <&gpio0>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + current-sensor@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <2000>; + }; +}; + +&qspi { + status = "okay"; + + s25fs512s0: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + m25p,fast-read; + reg = <0>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; +}; + +&sata { + status = "okay"; +}; |