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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-18 17:40:19 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-18 17:40:19 +0000 |
| commit | 9f0fc191371843c4fc000a226b0a26b6c059aacd (patch) | |
| tree | 35f8be3ef04506ac891ad001e8c41e535ae8d01d /arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | |
| parent | Releasing progress-linux version 6.6.15-2~progress7.99u1. (diff) | |
| download | linux-9f0fc191371843c4fc000a226b0a26b6c059aacd.tar.xz linux-9f0fc191371843c4fc000a226b0a26b6c059aacd.zip | |
Merging upstream version 6.7.7.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index d34a1d5e79..66791a974f 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -6,6 +6,60 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins1 { + pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */ + <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */ + <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */ + <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */ + <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */ + <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */ + <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */ + <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */ + slew-rate = <2>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('E', 1, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('E', 2, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + usart2_pins_a: usart2-0 { pins1 { pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */ |