Adding upstream version 6.6.15.upstream/6.6.15

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

5 files changed, 193 insertions, 0 deletions

diff --git a/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_general.h b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_general.h
new file mode 100644
index 0000000000..d408feecd4
--- /dev/null
+++ b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_general.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2020 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef INCLUDE_MMU_GENERAL_H_
+#define INCLUDE_MMU_GENERAL_H_
+
+#define PAGE_SHIFT_4KB			12
+#define PAGE_SHIFT_64KB			16
+#define PAGE_SHIFT_2MB			21
+#define PAGE_SHIFT_16MB			24
+#define PAGE_SHIFT_64MB			26
+#define PAGE_SHIFT_1GB			30
+#define PAGE_SIZE_4KB			_BITUL(PAGE_SHIFT_4KB)
+#define PAGE_SIZE_64KB			_BITUL(PAGE_SHIFT_64KB)
+#define PAGE_SIZE_2MB			_BITUL(PAGE_SHIFT_2MB)
+#define PAGE_SIZE_16MB			_BITUL(PAGE_SHIFT_16MB)
+#define PAGE_SIZE_64MB			_BITUL(PAGE_SHIFT_64MB)
+#define PAGE_SIZE_1GB			_BITUL(PAGE_SHIFT_1GB)
+
+#define PAGE_PRESENT_MASK		0x0000000000001ull
+#define SWAP_OUT_MASK			0x0000000000004ull
+#define LAST_MASK			0x0000000000800ull
+#define FLAGS_MASK			0x0000000000FFFull
+
+#define MMU_ARCH_5_HOPS			5
+#define MMU_ARCH_6_HOPS			6
+
+#define HOP_PHYS_ADDR_MASK		(~FLAGS_MASK)
+
+#define HL_PTE_SIZE			sizeof(u64)
+
+/* definitions for HOP with 512 PTE entries */
+#define HOP_PTE_ENTRIES_512		512
+#define HOP_TABLE_SIZE_512_PTE		(HOP_PTE_ENTRIES_512 * HL_PTE_SIZE)
+#define HOP0_512_PTE_TABLES_TOTAL_SIZE	(HOP_TABLE_SIZE_512_PTE * MAX_ASID)
+
+#define MMU_HOP0_PA43_12_SHIFT		12
+#define MMU_HOP0_PA49_44_SHIFT		(12 + 32)
+#define MMU_HOP0_PA63_44_SHIFT		(12 + 32)
+
+#define MMU_CONFIG_TIMEOUT_USEC		2000 /* 2 ms */
+
+enum mmu_hop_num {
+	MMU_HOP0,
+	MMU_HOP1,
+	MMU_HOP2,
+	MMU_HOP3,
+	MMU_HOP4,
+	MMU_HOP5,
+	MMU_HOP_MAX,
+};
+
+#endif /* INCLUDE_MMU_GENERAL_H_ */
diff --git a/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_0.h b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_0.h
new file mode 100644
index 0000000000..86511002e3
--- /dev/null
+++ b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_0.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2018 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef INCLUDE_MMU_V1_0_H_
+#define INCLUDE_MMU_V1_0_H_
+
+#define MMU_V1_0_HOP0_MASK		0x3000000000000ull
+#define MMU_V1_0_HOP1_MASK		0x0FF8000000000ull
+#define MMU_V1_0_HOP2_MASK		0x0007FC0000000ull
+#define MMU_V1_0_HOP3_MASK		0x000003FE00000ull
+#define MMU_V1_0_HOP4_MASK		0x00000001FF000ull
+
+#define MMU_V1_0_HOP0_SHIFT		48
+#define MMU_V1_0_HOP1_SHIFT		39
+#define MMU_V1_0_HOP2_SHIFT		30
+#define MMU_V1_0_HOP3_SHIFT		21
+#define MMU_V1_0_HOP4_SHIFT		12
+
+#define MMU_HOP0_PA43_12		0x490004
+#define MMU_HOP0_PA49_44		0x490008
+#define MMU_ASID_BUSY			0x490000
+
+#endif /* INCLUDE_MMU_V1_0_H_ */
diff --git a/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_1.h b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_1.h
new file mode 100644
index 0000000000..9c727a5d47
--- /dev/null
+++ b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v1_1.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2018 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef INCLUDE_MMU_V1_1_H_
+#define INCLUDE_MMU_V1_1_H_
+
+#define MMU_V1_1_HOP0_MASK		0x3000000000000ull
+#define MMU_V1_1_HOP1_MASK		0x0FF8000000000ull
+#define MMU_V1_1_HOP2_MASK		0x0007FC0000000ull
+#define MMU_V1_1_HOP3_MASK		0x000003FE00000ull
+#define MMU_V1_1_HOP4_MASK		0x00000001FF000ull
+
+#define MMU_V1_1_HOP0_SHIFT		48
+#define MMU_V1_1_HOP1_SHIFT		39
+#define MMU_V1_1_HOP2_SHIFT		30
+#define MMU_V1_1_HOP3_SHIFT		21
+#define MMU_V1_1_HOP4_SHIFT		12
+
+#define MMU_ASID			0xC12004
+#define MMU_HOP0_PA43_12		0xC12008
+#define MMU_HOP0_PA49_44		0xC1200C
+#define MMU_BUSY			0xC12000
+
+#endif /* INCLUDE_MMU_V1_1_H_ */
diff --git a/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v2_0.h b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v2_0.h
new file mode 100644
index 0000000000..cd7bf25d2d
--- /dev/null
+++ b/drivers/accel/habanalabs/include/hw_ip/mmu/mmu_v2_0.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2019 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef INCLUDE_MMU_V2_0_H_
+#define INCLUDE_MMU_V2_0_H_
+
+#define HOP0_MASK_4K			0xFE00000000000000ull
+#define HOP1_MASK_4K			0x01FF000000000000ull
+#define HOP2_MASK_4K			0x0000FF8000000000ull
+#define HOP3_MASK_4K			0x0000007FC0000000ull
+#define HOP4_MASK_4K			0x000000003FE00000ull
+#define HOP5_MASK_4K			0x00000000001FF000ull
+
+#define HOP0_MASK_64K			0xFF00000000000000ull
+#define HOP1_MASK_64K			0x00FF000000000000ull
+#define HOP2_MASK_64K			0x0000FF0000000000ull
+#define HOP3_MASK_64K			0x000000FF00000000ull
+#define HOP4_MASK_64K			0x00000000FF000000ull
+#define HOP5_MASK_64K			0x0000000000FF0000ull
+
+#define HOP0_SHIFT_4K			57
+#define HOP1_SHIFT_4K			48
+#define HOP2_SHIFT_4K			39
+#define HOP3_SHIFT_4K			30
+#define HOP4_SHIFT_4K			21
+#define HOP5_SHIFT_4K			12
+
+#define HOP0_SHIFT_64K			56
+#define HOP1_SHIFT_64K			48
+#define HOP2_SHIFT_64K			40
+#define HOP3_SHIFT_64K			32
+#define HOP4_SHIFT_64K			24
+#define HOP5_SHIFT_64K			16
+
+#define DHOP0_MASK			HOP0_MASK_4K
+#define DHOP1_MASK			HOP1_MASK_4K
+#define DHOP2_MASK			HOP2_MASK_4K
+#define DHOP3_MASK			HOP3_MASK_4K
+#define DHOP4_MASK			0x000003C000000ull
+
+#define DHOP0_SHIFT			HOP0_SHIFT_4K
+#define DHOP1_SHIFT			HOP1_SHIFT_4K
+#define DHOP2_SHIFT			HOP2_SHIFT_4K
+#define DHOP3_SHIFT			HOP3_SHIFT_4K
+#define DHOP4_SHIFT			26
+
+#endif /* INCLUDE_MMU_V2_0_H_ */
diff --git a/drivers/accel/habanalabs/include/hw_ip/pci/pci_general.h b/drivers/accel/habanalabs/include/hw_ip/pci/pci_general.h
new file mode 100644
index 0000000000..f5d497dc9b
--- /dev/null
+++ b/drivers/accel/habanalabs/include/hw_ip/pci/pci_general.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2019 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+#ifndef INCLUDE_PCI_GENERAL_H_
+#define INCLUDE_PCI_GENERAL_H_
+
+/* PCI CONFIGURATION SPACE */
+#define mmPCI_CONFIG_ELBI_ADDR		0xFF0
+#define mmPCI_CONFIG_ELBI_DATA		0xFF4
+#define mmPCI_CONFIG_ELBI_CTRL		0xFF8
+#define PCI_CONFIG_ELBI_CTRL_WRITE	(1 << 31)
+
+#define mmPCI_CONFIG_ELBI_STS		0xFFC
+#define PCI_CONFIG_ELBI_STS_ERR		(1 << 30)
+#define PCI_CONFIG_ELBI_STS_DONE	(1 << 31)
+#define PCI_CONFIG_ELBI_STS_MASK	(PCI_CONFIG_ELBI_STS_ERR | \
+					PCI_CONFIG_ELBI_STS_DONE)
+
+enum hl_revision_id {
+	/* PCI revision ID 0 is not legal */
+	REV_ID_INVALID				= 0x00,
+	REV_ID_A				= 0x01,
+	REV_ID_B				= 0x02,
+};
+
+#endif /* INCLUDE_PCI_GENERAL_H_ */