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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-06-19 21:00:30 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-06-19 21:00:30 +0000 |
| commit | e54def4ad8144ab15f826416e2e0f290ef1901b4 (patch) | |
| tree | 583f8d4bd95cd67c44ff37b878a7eddfca9ab97a /drivers/gpu/drm/i915/gvt/gvt.h | |
| parent | Adding upstream version 6.8.12. (diff) | |
| download | linux-e54def4ad8144ab15f826416e2e0f290ef1901b4.tar.xz linux-e54def4ad8144ab15f826416e2e0f290ef1901b4.zip | |
Adding upstream version 6.9.2.upstream/6.9.2
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gvt.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/gvt.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index c57aba090..2c95aeef4 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -89,7 +89,6 @@ struct intel_vgpu_gm { /* Fences owned by a vGPU */ struct intel_vgpu_fence { struct i915_fence_reg *regs[INTEL_GVT_MAX_NUM_FENCES]; - u32 base; u32 size; }; @@ -119,7 +118,6 @@ struct intel_vgpu_irq { }; struct intel_vgpu_opregion { - bool mapped; void *va; u32 gfn[INTEL_GVT_OPREGION_PAGES]; }; @@ -223,7 +221,6 @@ struct intel_vgpu { struct vfio_region *region; int num_regions; - struct eventfd_ctx *intx_trigger; struct eventfd_ctx *msi_trigger; /* @@ -256,7 +253,6 @@ struct intel_gvt_fence { /* Special MMIO blocks. */ struct gvt_mmio_block { - unsigned int device; i915_reg_t offset; unsigned int size; gvt_mmio_func read; @@ -444,7 +440,6 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt); #define vgpu_hidden_gmadr_end(vgpu) \ (vgpu_hidden_gmadr_base(vgpu) + vgpu_hidden_sz(vgpu) - 1) -#define vgpu_fence_base(vgpu) (vgpu->fence.base) #define vgpu_fence_sz(vgpu) (vgpu->fence.size) /* ring context size i.e. the first 0x50 dwords*/ |