diff options
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 82 |
1 files changed, 81 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 2ddad93185..7254f3bd36 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -443,7 +443,7 @@ }; mcu_navss: bus@28380000 { - compatible = "simple-mfd"; + compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>; @@ -655,4 +655,84 @@ power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; }; + + mcu_r5fss0: r5fss@41000000 { + compatible = "ti,j721s2-r5fss"; + ti,cluster-mode = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x41000000 0x00 0x41000000 0x20000>, + <0x41400000 0x00 0x41400000 0x20000>; + power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; + + mcu_r5fss0_core0: r5f@41000000 { + compatible = "ti,j721s2-r5f"; + reg = <0x41000000 0x00010000>, + <0x41010000 0x00010000>; + reg-names = "atcm", "btcm"; + ti,sci = <&sms>; + ti,sci-dev-id = <284>; + ti,sci-proc-ids = <0x01 0xff>; + resets = <&k3_reset 284 1>; + firmware-name = "j721s2-mcu-r5f0_0-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + }; + + mcu_r5fss0_core1: r5f@41400000 { + compatible = "ti,j721s2-r5f"; + reg = <0x41400000 0x00010000>, + <0x41410000 0x00010000>; + reg-names = "atcm", "btcm"; + ti,sci = <&sms>; + ti,sci-dev-id = <285>; + ti,sci-proc-ids = <0x02 0xff>; + resets = <&k3_reset 285 1>; + firmware-name = "j721s2-mcu-r5f0_1-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + }; + }; + + mcu_esm: esm@40800000 { + compatible = "ti,j721e-esm"; + reg = <0x00 0x40800000 0x00 0x1000>; + ti,esm-pins = <95>; + bootph-pre-ram; + }; + + wkup_esm: esm@42080000 { + compatible = "ti,j721e-esm"; + reg = <0x00 0x42080000 0x00 0x1000>; + ti,esm-pins = <63>; + bootph-pre-ram; + }; + + /* + * The 2 RTI instances are couple with MCU R5Fs so keeping them + * reserved as these will be used by their respective firmware + */ + mcu_watchdog0: watchdog@40600000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x40600000 0x00 0x100>; + clocks = <&k3_clks 295 1>; + power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 295 1>; + assigned-clock-parents = <&k3_clks 295 5>; + /* reserved for MCU_R5F0_0 */ + status = "reserved"; + }; + + mcu_watchdog1: watchdog@40610000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x40610000 0x00 0x100>; + clocks = <&k3_clks 296 1>; + power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 296 1>; + assigned-clock-parents = <&k3_clks 296 5>; + /* reserved for MCU_R5F0_1 */ + status = "reserved"; + }; }; |