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Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 4ab4018d36..adb5ea6b97 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -700,4 +700,44 @@
status = "disabled";
};
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * reserved as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 367 1>;
+ power-domains = <&k3_pds 367 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 367 0>;
+ assigned-clock-parents = <&k3_clks 367 4>;
+ /* reserved for MCU_R5F0_0 */
+ status = "reserved";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 368 1>;
+ power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 368 0>;
+ assigned-clock-parents = <&k3_clks 368 4>;
+ /* reserved for MCU_R5F0_1 */
+ status = "reserved";
+ };
};