diff options
Diffstat (limited to 'drivers/accel/habanalabs/include/gaudi/asic_reg/dma_if_w_s_regs.h')
-rw-r--r-- | drivers/accel/habanalabs/include/gaudi/asic_reg/dma_if_w_s_regs.h | 860 |
1 files changed, 860 insertions, 0 deletions
diff --git a/drivers/accel/habanalabs/include/gaudi/asic_reg/dma_if_w_s_regs.h b/drivers/accel/habanalabs/include/gaudi/asic_reg/dma_if_w_s_regs.h new file mode 100644 index 000000000..2382bc41b --- /dev/null +++ b/drivers/accel/habanalabs/include/gaudi/asic_reg/dma_if_w_s_regs.h @@ -0,0 +1,860 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright 2016-2018 HabanaLabs, Ltd. + * All Rights Reserved. + * + */ + +/************************************ + ** This is an auto-generated file ** + ** DO NOT EDIT BELOW ** + ************************************/ + +#ifndef ASIC_REG_DMA_IF_W_S_REGS_H_ +#define ASIC_REG_DMA_IF_W_S_REGS_H_ + +/* + ***************************************** + * DMA_IF_W_S (Prototype: DMA_IF) + ***************************************** + */ + +#define mmDMA_IF_W_S_HBM0_WR_CRED_CNT 0x480000 + +#define mmDMA_IF_W_S_HBM1_WR_CRED_CNT 0x480004 + +#define mmDMA_IF_W_S_HBM0_RD_CRED_CNT 0x480008 + +#define mmDMA_IF_W_S_HBM1_RD_CRED_CNT 0x48000C + +#define mmDMA_IF_W_S_HBM_LIMITER_0 0x480030 + +#define mmDMA_IF_W_S_HBM_LIMITER_1 0x480034 + +#define mmDMA_IF_W_S_HBM_LIMITER_2 0x480038 + +#define mmDMA_IF_W_S_HBM_LIMITER_3 0x48003C + +#define mmDMA_IF_W_S_HBM_ALMOST_EN_0 0x480040 + +#define mmDMA_IF_W_S_HBM_ALMOST_EN_1 0x480044 + +#define mmDMA_IF_W_S_HBM_CRED_EN_0 0x480050 + +#define mmDMA_IF_W_S_HBM_CRED_EN_1 0x480054 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_0 0x480100 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_1 0x480104 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_2 0x480108 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_3 0x48010C + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_4 0x480110 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_5 0x480114 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_6 0x480118 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_7 0x48011C + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_8 0x480120 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_9 0x480124 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_10 0x480128 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_11 0x48012C + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_12 0x480130 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_13 0x480134 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_14 0x480138 + +#define mmDMA_IF_W_S_SOB_MIN_RPROT_15 0x48013C + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_0 0x480140 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_1 0x480144 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_2 0x480148 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_3 0x48014C + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_4 0x480150 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_5 0x480154 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_6 0x480158 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_7 0x48015C + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_8 0x480160 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_9 0x480164 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_10 0x480168 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_11 0x48016C + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_12 0x480170 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_13 0x480174 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_14 0x480178 + +#define mmDMA_IF_W_S_SOB_MAX_RPROT_15 0x48017C + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_0 0x480180 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_1 0x480184 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_2 0x480188 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_3 0x48018C + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_4 0x480190 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_5 0x480194 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_6 0x480198 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_7 0x48019C + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_8 0x4801A0 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_9 0x4801A4 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_10 0x4801A8 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_11 0x4801AC + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_12 0x4801B0 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_13 0x4801B4 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_14 0x4801B8 + +#define mmDMA_IF_W_S_SOB_MIN_WPROT_15 0x4801BC + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_0 0x4801C0 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_1 0x4801C4 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_2 0x4801C8 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_3 0x4801CC + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_4 0x4801D0 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_5 0x4801D4 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_6 0x4801D8 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_7 0x4801DC + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_8 0x4801E0 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_9 0x4801E4 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_10 0x4801E8 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_11 0x4801EC + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_12 0x4801F0 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_13 0x4801F4 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_14 0x4801F8 + +#define mmDMA_IF_W_S_SOB_MAX_WPROT_15 0x4801FC + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_0 0x480200 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_1 0x480204 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_2 0x480208 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_3 0x48020C + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_4 0x480210 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_5 0x480214 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_6 0x480218 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_7 0x48021C + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_8 0x480220 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_9 0x480224 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_10 0x480228 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_11 0x48022C + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_12 0x480230 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_13 0x480234 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_14 0x480238 + +#define mmDMA_IF_W_S_SOB_MIN_RPRIV_15 0x48023C + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_0 0x480240 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_1 0x480244 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_2 0x480248 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_3 0x48024C + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_4 0x480250 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_5 0x480254 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_6 0x480258 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_7 0x48025C + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_8 0x480260 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_9 0x480264 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_10 0x480268 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_11 0x48026C + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_12 0x480270 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_13 0x480274 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_14 0x480278 + +#define mmDMA_IF_W_S_SOB_MAX_RPRIV_15 0x48027C + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_0 0x480280 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_1 0x480284 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_2 0x480288 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_3 0x48028C + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_4 0x480290 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_5 0x480294 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_6 0x480298 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_7 0x48029C + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_8 0x4802A0 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_9 0x4802A4 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_10 0x4802A8 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_11 0x4802AC + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_12 0x4802B0 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_13 0x4802B4 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_14 0x4802B8 + +#define mmDMA_IF_W_S_SOB_MIN_WPRIV_15 0x4802BC + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_0 0x4802C0 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_1 0x4802C4 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_2 0x4802C8 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_3 0x4802CC + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_4 0x4802D0 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_5 0x4802D4 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_6 0x4802D8 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_7 0x4802DC + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_8 0x4802E0 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_9 0x4802E4 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_10 0x4802E8 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_11 0x4802EC + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_12 0x4802F0 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_13 0x4802F4 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_14 0x4802F8 + +#define mmDMA_IF_W_S_SOB_MAX_WPRIV_15 0x4802FC + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_0 0x480300 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_1 0x480304 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_2 0x480308 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_3 0x48030C + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_4 0x480310 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_5 0x480314 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_6 0x480318 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_7 0x48031C + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_8 0x480320 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_9 0x480324 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_10 0x480328 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_11 0x48032C + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_12 0x480330 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_13 0x480334 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_14 0x480338 + +#define mmDMA_IF_W_S_DMA0_MIN_RPROT_15 0x48033C + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_0 0x480340 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_1 0x480344 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_2 0x480348 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_3 0x48034C + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_4 0x480350 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_5 0x480354 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_6 0x480358 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_7 0x48035C + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_8 0x480360 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_9 0x480364 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_10 0x480368 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_11 0x48036C + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_12 0x480370 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_13 0x480374 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_14 0x480378 + +#define mmDMA_IF_W_S_DMA0_MAX_RPROT_15 0x48037C + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_0 0x480380 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_1 0x480384 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_2 0x480388 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_3 0x48038C + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_4 0x480390 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_5 0x480394 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_6 0x480398 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_7 0x48039C + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_8 0x4803A0 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_9 0x4803A4 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_10 0x4803A8 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_11 0x4803AC + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_12 0x4803B0 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_13 0x4803B4 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_14 0x4803B8 + +#define mmDMA_IF_W_S_DMA0_MIN_WPROT_15 0x4803BC + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_0 0x4803C0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_1 0x4803C4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_2 0x4803C8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_3 0x4803CC + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_4 0x4803D0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_5 0x4803D4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_6 0x4803D8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_7 0x4803DC + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_8 0x4803E0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_9 0x4803E4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_10 0x4803E8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_11 0x4803EC + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_12 0x4803F0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_13 0x4803F4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_14 0x4803F8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPROT_15 0x4803FC + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_0 0x480400 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_1 0x480404 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_2 0x480408 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_3 0x48040C + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_4 0x480410 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_5 0x480414 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_6 0x480418 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_7 0x48041C + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_8 0x480420 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_9 0x480424 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_10 0x480428 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_11 0x48042C + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_12 0x480430 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_13 0x480434 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_14 0x480438 + +#define mmDMA_IF_W_S_DMA0_MIN_RPRIV_15 0x48043C + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_0 0x480440 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_1 0x480444 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_2 0x480448 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_3 0x48044C + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_4 0x480450 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_5 0x480454 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_6 0x480458 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_7 0x48045C + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_8 0x480460 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_9 0x480464 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_10 0x480468 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_11 0x48046C + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_12 0x480470 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_13 0x480474 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_14 0x480478 + +#define mmDMA_IF_W_S_DMA0_MAX_RPRIV_15 0x48047C + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_0 0x480480 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_1 0x480484 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_2 0x480488 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_3 0x48048C + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_4 0x480490 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_5 0x480494 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_6 0x480498 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_7 0x48049C + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_8 0x4804A0 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_9 0x4804A4 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_10 0x4804A8 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_11 0x4804AC + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_12 0x4804B0 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_13 0x4804B4 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_14 0x4804B8 + +#define mmDMA_IF_W_S_DMA0_MIN_WPRIV_15 0x4804BC + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_0 0x4804C0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_1 0x4804C4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_2 0x4804C8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_3 0x4804CC + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_4 0x4804D0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_5 0x4804D4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_6 0x4804D8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_7 0x4804DC + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_8 0x4804E0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_9 0x4804E4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_10 0x4804E8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_11 0x4804EC + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_12 0x4804F0 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_13 0x4804F4 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_14 0x4804F8 + +#define mmDMA_IF_W_S_DMA0_MAX_WPRIV_15 0x4804FC + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_0 0x480500 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_1 0x480504 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_2 0x480508 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_3 0x48050C + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_4 0x480510 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_5 0x480514 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_6 0x480518 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_7 0x48051C + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_8 0x480520 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_9 0x480524 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_10 0x480528 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_11 0x48052C + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_12 0x480530 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_13 0x480534 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_14 0x480538 + +#define mmDMA_IF_W_S_DMA1_MIN_RPROT_15 0x48053C + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_0 0x480540 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_1 0x480544 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_2 0x480548 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_3 0x48054C + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_4 0x480550 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_5 0x480554 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_6 0x480558 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_7 0x48055C + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_8 0x480560 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_9 0x480564 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_10 0x480568 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_11 0x48056C + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_12 0x480570 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_13 0x480574 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_14 0x480578 + +#define mmDMA_IF_W_S_DMA1_MAX_RPROT_15 0x48057C + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_0 0x480580 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_1 0x480584 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_2 0x480588 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_3 0x48058C + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_4 0x480590 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_5 0x480594 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_6 0x480598 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_7 0x48059C + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_8 0x4805A0 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_9 0x4805A4 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_10 0x4805A8 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_11 0x4805AC + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_12 0x4805B0 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_13 0x4805B4 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_14 0x4805B8 + +#define mmDMA_IF_W_S_DMA1_MIN_WPROT_15 0x4805BC + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_0 0x4805C0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_1 0x4805C4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_2 0x4805C8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_3 0x4805CC + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_4 0x4805D0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_5 0x4805D4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_6 0x4805D8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_7 0x4805DC + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_8 0x4805E0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_9 0x4805E4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_10 0x4805E8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_11 0x4805EC + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_12 0x4805F0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_13 0x4805F4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_14 0x4805F8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPROT_15 0x4805FC + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_0 0x480600 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_1 0x480604 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_2 0x480608 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_3 0x48060C + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_4 0x480610 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_5 0x480614 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_6 0x480618 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_7 0x48061C + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_8 0x480620 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_9 0x480624 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_10 0x480628 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_11 0x48062C + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_12 0x480630 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_13 0x480634 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_14 0x480638 + +#define mmDMA_IF_W_S_DMA1_MIN_RPRIV_15 0x48063C + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_0 0x480640 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_1 0x480644 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_2 0x480648 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_3 0x48064C + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_4 0x480650 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_5 0x480654 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_6 0x480658 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_7 0x48065C + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_8 0x480660 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_9 0x480664 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_10 0x480668 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_11 0x48066C + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_12 0x480670 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_13 0x480674 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_14 0x480678 + +#define mmDMA_IF_W_S_DMA1_MAX_RPRIV_15 0x48067C + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_0 0x480680 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_1 0x480684 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_2 0x480688 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_3 0x48068C + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_4 0x480690 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_5 0x480694 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_6 0x480698 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_7 0x48069C + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_8 0x4806A0 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_9 0x4806A4 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_10 0x4806A8 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_11 0x4806AC + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_12 0x4806B0 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_13 0x4806B4 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_14 0x4806B8 + +#define mmDMA_IF_W_S_DMA1_MIN_WPRIV_15 0x4806BC + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_0 0x4806C0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_1 0x4806C4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_2 0x4806C8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_3 0x4806CC + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_4 0x4806D0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_5 0x4806D4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_6 0x4806D8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_7 0x4806DC + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_8 0x4806E0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_9 0x4806E4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_10 0x4806E8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_11 0x4806EC + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_12 0x4806F0 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_13 0x4806F4 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_14 0x4806F8 + +#define mmDMA_IF_W_S_DMA1_MAX_WPRIV_15 0x4806FC + +#define mmDMA_IF_W_S_SOB_HIT_RPROT 0x480700 + +#define mmDMA_IF_W_S_SOB_HIT_WPROT 0x480704 + +#define mmDMA_IF_W_S_SOB_HIT_RPRIV 0x48070C + +#define mmDMA_IF_W_S_SOB_HIT_WPRIV 0x480710 + +#define mmDMA_IF_W_S_DMA0_HIT_RPROT 0x48071C + +#define mmDMA_IF_W_S_DMA0_HIT_WPROT 0x480720 + +#define mmDMA_IF_W_S_DMA0_HIT_RPRIV 0x480724 + +#define mmDMA_IF_W_S_DMA0_HIT_WPRIV 0x480728 + +#define mmDMA_IF_W_S_DMA1_HIT_RPROT 0x480730 + +#define mmDMA_IF_W_S_DMA1_HIT_WPROT 0x480734 + +#define mmDMA_IF_W_S_DMA1_HIT_RPRIV 0x480738 + +#define mmDMA_IF_W_S_DMA1_HIT_WPRIV 0x48073C + +#define mmDMA_IF_W_S_HBM_BIN 0x480800 + +#define mmDMA_IF_W_S_MME_BIN 0x480804 + +#define mmDMA_IF_W_S_TPC_BIN 0x480808 + +#define mmDMA_IF_W_S_DMA_BIN 0x48080C + +#define mmDMA_IF_W_S_SOB_CG_EN 0x480810 + +#define mmDMA_IF_W_S_HBM_I2C_ADDR_0 0x480820 + +#define mmDMA_IF_W_S_HBM_I2C_ADDR_1 0x480824 + +#define mmDMA_IF_W_S_HBM_I2C_ADDR_2 0x480828 + +#define mmDMA_IF_W_S_HBM_I2C_ADDR_3 0x48082C + +#define mmDMA_IF_W_S_HBM_I2C_ADDR_4 0x480830 + +#define mmDMA_IF_W_S_HBM_MISC 0x480834 + +#endif /* ASIC_REG_DMA_IF_W_S_REGS_H_ */ |