blob: 7be29877e6d27f614d2685d24fd29df7d9b7f198 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Slow Clock Controller (SCKC)
maintainers:
- Claudiu Beznea <claudiu.beznea@microchip.com>
properties:
compatible:
oneOf:
- enum:
- atmel,at91sam9x5-sckc
- atmel,sama5d3-sckc
- atmel,sama5d4-sckc
- microchip,sam9x60-sckc
- items:
- const: microchip,sama7g5-sckc
- const: microchip,sam9x60-sckc
reg:
maxItems: 1
clocks:
maxItems: 1
"#clock-cells":
enum: [0, 1]
atmel,osc-bypass:
type: boolean
description: set when a clock signal is directly provided on XIN
required:
- compatible
- reg
- clocks
- "#clock-cells"
allOf:
- if:
properties:
compatible:
contains:
enum:
- microchip,sam9x60-sckc
then:
properties:
"#clock-cells":
const: 1
else:
properties:
"#clock-cells":
const: 0
additionalProperties: false
examples:
- |
clk32k: clock-controller@fffffe50 {
compatible = "microchip,sam9x60-sckc";
reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>;
#clock-cells = <1>;
};
...
|
