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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip RV1126 Clock and Reset Unit
maintainers:
- Jagan Teki <jagan@edgeble.ai>
- Finley Xiao <finley.xiao@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
description:
The RV1126 clock controller generates the clock and also implements a
reset controller for SoC peripherals.
properties:
compatible:
enum:
- rockchip,rv1126-cru
- rockchip,rv1126-pmucru
reg:
maxItems: 1
"#clock-cells":
const: 1
"#reset-cells":
const: 1
clocks:
maxItems: 1
clock-names:
const: xin24m
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the syscon managing the "general register files" (GRF),
if missing pll rates are not changeable, due to the missing pll
lock status.
required:
- compatible
- reg
- "#clock-cells"
- "#reset-cells"
additionalProperties: false
examples:
- |
cru: clock-controller@ff490000 {
compatible = "rockchip,rv1126-cru";
reg = <0xff490000 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
};
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