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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX8MP DPI to LVDS bridge chip
maintainers:
- Marek Vasut <marex@denx.de>
description: |
The i.MX8MP mediamix contains two registers which are responsible
for configuring the on-SoC DPI-to-LVDS serializer. This describes
those registers as bridge within the DT.
properties:
compatible:
enum:
- fsl,imx6sx-ldb
- fsl,imx8mp-ldb
- fsl,imx93-ldb
clocks:
maxItems: 1
clock-names:
const: ldb
reg:
maxItems: 2
reg-names:
items:
- const: ldb
- const: lvds
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Video port for DPI input.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: Video port for LVDS Channel-A output (panel or bridge).
port@2:
$ref: /schemas/graph.yaml#/properties/port
description: Video port for LVDS Channel-B output (panel or bridge).
required:
- port@0
- port@1
required:
- compatible
- clocks
- ports
allOf:
- if:
properties:
compatible:
contains:
enum:
- fsl,imx6sx-ldb
- fsl,imx93-ldb
then:
properties:
ports:
properties:
port@2: false
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mp-clock.h>
blk-ctrl {
#address-cells = <1>;
#size-cells = <1>;
bridge@5c {
compatible = "fsl,imx8mp-ldb";
clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
clock-names = "ldb";
reg = <0x5c 0x4>, <0x128 0x4>;
reg-names = "ldb", "lvds";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ldb_from_lcdif2: endpoint {
remote-endpoint = <&lcdif2_to_ldb>;
};
};
port@1 {
reg = <1>;
ldb_lvds_ch0: endpoint {
remote-endpoint = <&ldb_to_lvdsx4panel>;
};
};
port@2 {
reg = <2>;
ldb_lvds_ch1: endpoint {
};
};
};
};
};
|
