1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Sylwester Nawrocki <s.nawrocki@samsung.com>
description:
The FIMC-IS is a subsystem for processing image signal from an image sensor.
The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
and SPI bus controllers, PWM and ADC.
properties:
compatible:
enum:
- samsung,exynos4212-fimc-is
reg:
maxItems: 1
ranges: true
'#address-cells':
const: 1
'#size-cells':
const: 1
clocks:
maxItems: 21
clock-names:
items:
- const: lite0
- const: lite1
- const: ppmuispx
- const: ppmuispmx
- const: isp
- const: drc
- const: fd
- const: mcuisp
- const: gicisp
- const: mcuctl_isp
- const: pwm_isp
- const: ispdiv0
- const: ispdiv1
- const: mcuispdiv0
- const: mcuispdiv1
- const: mpll
- const: aclk200
- const: aclk400mcuisp
- const: div_aclk200
- const: div_aclk400mcuisp
- const: uart
interrupts:
maxItems: 2
iommus:
maxItems: 4
iommu-names:
items:
- const: isp
- const: drc
- const: fd
- const: mcuctl
power-domains:
maxItems: 1
samsung,pmu-syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Power Management Unit (PMU) system controller interface, used to
power/start the ISP.
patternProperties:
"^pmu@[0-9a-f]+$":
type: object
additionalProperties: false
deprecated: true
description:
Node representing the SoC's Power Management Unit (duplicated with the
correct PMU node in the SoC). Deprecated, use samsung,pmu-syscon.
properties:
reg:
maxItems: 1
required:
- reg
"^i2c-isp@[0-9a-f]+$":
type: object
$ref: /schemas/i2c/i2c-controller.yaml#
unevaluatedProperties: false
description:
ISP I2C bus controller
properties:
compatible:
const: samsung,exynos4212-i2c-isp
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: i2c_isp
pinctrl-0: true
pinctrl-names:
items:
- const: default
required:
- compatible
- reg
- clocks
- clock-names
required:
- compatible
- reg
- '#address-cells'
- clocks
- clock-names
- interrupts
- ranges
- samsung,pmu-syscon
- '#size-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/exynos4.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is";
reg = <0x12000000 0x260000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
<&isp_clock CLK_ISP_FIMC_LITE1>,
<&isp_clock CLK_ISP_PPMUISPX>,
<&isp_clock CLK_ISP_PPMUISPMX>,
<&isp_clock CLK_ISP_FIMC_ISP>,
<&isp_clock CLK_ISP_FIMC_DRC>,
<&isp_clock CLK_ISP_FIMC_FD>,
<&isp_clock CLK_ISP_MCUISP>,
<&isp_clock CLK_ISP_GICISP>,
<&isp_clock CLK_ISP_MCUCTL_ISP>,
<&isp_clock CLK_ISP_PWM_ISP>,
<&isp_clock CLK_ISP_DIV_ISP0>,
<&isp_clock CLK_ISP_DIV_ISP1>,
<&isp_clock CLK_ISP_DIV_MCUISP0>,
<&isp_clock CLK_ISP_DIV_MCUISP1>,
<&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_ACLK200>,
<&clock CLK_ACLK400_MCUISP>,
<&clock CLK_DIV_ACLK200>,
<&clock CLK_DIV_ACLK400_MCUISP>,
<&clock CLK_UART_ISP_SCLK>;
clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "isp",
"drc", "fd", "mcuisp",
"gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "mpll", "aclk200",
"aclk400mcuisp", "div_aclk200",
"div_aclk400mcuisp", "uart";
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
iommu-names = "isp", "drc", "fd", "mcuctl";
power-domains = <&pd_isp>;
samsung,pmu-syscon = <&pmu_system_controller>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c-isp@12140000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
clock-names = "i2c_isp";
pinctrl-0 = <&fimc_is_i2c1>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
image-sensor@10 {
compatible = "samsung,s5k6a3";
reg = <0x10>;
svdda-supply = <&cam_io_reg>;
svddio-supply = <&ldo19_reg>;
afvdd-supply = <&ldo19_reg>;
clock-frequency = <24000000>;
clocks = <&camera 1>;
clock-names = "extclk";
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
port {
endpoint {
remote-endpoint = <&csis1_ep>;
data-lanes = <1>;
};
};
};
};
};
|
