summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml
blob: 7bd7c55a9c150e48cb27208631c009eee11e5f44 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: PL353 NAND Controller

allOf:
  - $ref: nand-controller.yaml

maintainers:
  - Miquel Raynal <miquel.raynal@bootlin.com>

properties:
  compatible:
    items:
      - const: arm,pl353-nand-r2p1

  reg:
    items:
      - items:
          - description: CS with regard to the parent ranges property
          - description: Offset of the memory region requested by the device
          - description: Length of the memory region requested by the device

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    smcc: memory-controller@e000e000 {
        compatible = "arm,pl353-smc-r2p1", "arm,primecell";
        reg = <0xe000e000 0x0001000>;
        clock-names = "memclk", "apb_pclk";
        clocks = <&clkc 11>, <&clkc 44>;
        ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
                  0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
                  0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
        #address-cells = <2>;
        #size-cells = <1>;

        nfc0: nand-controller@0,0 {
            compatible = "arm,pl353-nand-r2p1";
            reg = <0 0 0x1000000>;
            #address-cells = <1>;
            #size-cells = <0>;
        };
    };