summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
blob: 9432565f4f5d384a3b401d1e44e0a64f1a59dfde (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/nxp,sja1105.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP SJA1105 Automotive Ethernet Switch Family

description:
  The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
  least one half of t_CLK. At an SPI frequency of 1MHz, this means a minimum
  cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
  depends on the SPI bus master driver.

maintainers:
  - Vladimir Oltean <vladimir.oltean@nxp.com>

properties:
  compatible:
    enum:
      - nxp,sja1105e
      - nxp,sja1105t
      - nxp,sja1105p
      - nxp,sja1105q
      - nxp,sja1105r
      - nxp,sja1105s
      - nxp,sja1110a
      - nxp,sja1110b
      - nxp,sja1110c
      - nxp,sja1110d

  reg:
    maxItems: 1

  spi-cpha: true
  spi-cpol: true

  # Optional container node for the 2 internal MDIO buses of the SJA1110
  # (one for the internal 100base-T1 PHYs and the other for the single
  # 100base-TX PHY). The "reg" property does not have physical significance.
  # The PHY addresses to port correspondence is as follows: for 100base-T1,
  # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
  # PHY 1.
  mdios:
    type: object
    additionalProperties: false

    properties:
      '#address-cells':
        const: 1
      '#size-cells':
        const: 0

    patternProperties:
      "^mdio@[0-1]$":
        $ref: /schemas/net/mdio.yaml#
        unevaluatedProperties: false

        properties:
          compatible:
            oneOf:
              - enum:
                  - nxp,sja1110-base-t1-mdio
                  - nxp,sja1110-base-tx-mdio

          reg:
            oneOf:
              - enum:
                  - 0
                  - 1

        required:
          - compatible
          - reg

patternProperties:
  "^(ethernet-)?ports$":
    additionalProperties: true
    patternProperties:
      "^(ethernet-)?port@[0-9]$":
        allOf:
          - if:
              properties:
                phy-mode:
                  contains:
                    enum:
                      - rgmii
                      - rgmii-rxid
                      - rgmii-txid
                      - rgmii-id
            then:
              properties:
                rx-internal-delay-ps:
                  $ref: "#/$defs/internal-delay-ps"
                tx-internal-delay-ps:
                  $ref: "#/$defs/internal-delay-ps"

required:
  - compatible
  - reg

$defs:
  internal-delay-ps:
    description:
      Disable tunable delay lines using 0 ps, or enable them and select
      the phase between 1640 ps (73.8 degree shift at 1Gbps) and 2260 ps
      (101.7 degree shift) in increments of 0.9 degrees (20 ps).
    enum:
      [0, 1640, 1660, 1680, 1700, 1720, 1740, 1760, 1780, 1800, 1820, 1840,
       1860, 1880, 1900, 1920, 1940, 1960, 1980, 2000, 2020, 2040, 2060, 2080,
       2100, 2120, 2140, 2160, 2180, 2200, 2220, 2240, 2260]

allOf:
  - $ref: dsa.yaml#/$defs/ethernet-ports
  - $ref: /schemas/spi/spi-peripheral-props.yaml#
  - if:
      properties:
        compatible:
          enum:
            - nxp,sja1105e
            - nxp,sja1105p
            - nxp,sja1105q
            - nxp,sja1105r
            - nxp,sja1105s
            - nxp,sja1105t
    then:
      properties:
        spi-cpol: false
      required:
        - spi-cpha
    else:
      properties:
        spi-cpha: false
      required:
        - spi-cpol

unevaluatedProperties: false

examples:
  - |
    spi {
            #address-cells = <1>;
            #size-cells = <0>;

            ethernet-switch@1 {
                    reg = <0x1>;
                    compatible = "nxp,sja1105t";
                    spi-cpha;

                    ethernet-ports {
                            #address-cells = <1>;
                            #size-cells = <0>;

                            port@0 {
                                    phy-handle = <&rgmii_phy6>;
                                    phy-mode = "rgmii-id";
                                    rx-internal-delay-ps = <0>;
                                    tx-internal-delay-ps = <0>;
                                    reg = <0>;
                            };

                            port@1 {
                                    phy-handle = <&rgmii_phy3>;
                                    phy-mode = "rgmii-id";
                                    rx-internal-delay-ps = <0>;
                                    tx-internal-delay-ps = <0>;
                                    reg = <1>;
                            };

                            port@2 {
                                    phy-handle = <&rgmii_phy4>;
                                    phy-mode = "rgmii-id";
                                    rx-internal-delay-ps = <0>;
                                    tx-internal-delay-ps = <0>;
                                    reg = <2>;
                            };

                            port@3 {
                                    phy-handle = <&rgmii_phy4>;
                                    phy-mode = "rgmii-id";
                                    rx-internal-delay-ps = <0>;
                                    tx-internal-delay-ps = <0>;
                                    reg = <3>;
                            };

                            port@4 {
                                    ethernet = <&enet2>;
                                    phy-mode = "rgmii";
                                    rx-internal-delay-ps = <0>;
                                    tx-internal-delay-ps = <0>;
                                    reg = <4>;

                                    fixed-link {
                                            speed = <1000>;
                                            full-duplex;
                                    };
                            };
                    };
            };
    };