summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
blob: 00c5a00e35fce2e041afd978813b006d8d8d8d88 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SC7280 SoC LPASS LPI TLMM

maintainers:
  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

description:
  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
  (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.

properties:
  compatible:
    const: qcom,sc7280-lpass-lpi-pinctrl

  reg:
    maxItems: 2

  gpio-controller: true

  "#gpio-cells":
    description: Specifying the pin number and flags, as defined in
      include/dt-bindings/gpio/gpio.h
    const: 2

  gpio-ranges:
    maxItems: 1

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-sc7280-lpass-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-sc7280-lpass-state"
        additionalProperties: false

$defs:
  qcom-sc7280-lpass-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: /schemas/pinctrl/pincfg-node.yaml

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          oneOf:
            - pattern: "^gpio([0-9]|1[0-4])$"
        minItems: 1
        maxItems: 15

      function:
        enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,
                qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,
                dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
                i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,
                dmic3_data, i2s2_data ]
        description:
          Specify the alternative function to be configured for the specified
          pins.

      drive-strength:
        enum: [2, 4, 6, 8, 10, 12, 14, 16]
        default: 2
        description:
          Selects the drive strength for the specified pins, in mA.

      slew-rate:
        enum: [0, 1, 2, 3]
        default: 0
        description: |
            0: No adjustments
            1: Higher Slew rate (faster edges)
            2: Lower Slew rate (slower edges)
            3: Reserved (No adjustments)

      bias-pull-down: true
      bias-pull-up: true
      bias-bus-hold: true
      bias-disable: true
      output-high: true
      output-low: true

    required:
      - pins
      - function

    additionalProperties: false

required:
  - compatible
  - reg
  - gpio-controller
  - "#gpio-cells"
  - gpio-ranges

additionalProperties: false

examples:
  - |
    lpass_tlmm: pinctrl@33c0000 {
        compatible = "qcom,sc7280-lpass-lpi-pinctrl";
        reg = <0x33c0000 0x20000>,
              <0x3550000 0x10000>;
        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&lpass_tlmm 0 0 15>;

        dmic01-state {
            dmic01-clk-pins {
                pins = "gpio6";
                function = "dmic1_clk";
            };

            dmic01-clk-sleep-pins {
                pins = "gpio6";
                function = "dmic1_clk";
            };
        };

        tx-swr-data-sleep-state {
            pins = "gpio1", "gpio2", "gpio14";
            function = "swr_tx_data";
        };
    };