1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Audio Graph based Tegra sound card driver
description: |
This is based on generic audio graph card driver along with additional
customizations for Tegra platforms. It uses the same bindings with
additional standard clock DT bindings required for Tegra.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
allOf:
- $ref: audio-graph.yaml#
properties:
compatible:
enum:
- nvidia,tegra210-audio-graph-card
- nvidia,tegra186-audio-graph-card
clocks:
minItems: 2
clock-names:
items:
- const: pll_a
- const: plla_out0
assigned-clocks:
minItems: 1
maxItems: 3
assigned-clock-parents:
minItems: 1
maxItems: 3
assigned-clock-rates:
minItems: 1
maxItems: 3
interconnects:
items:
- description: APE read memory client
- description: APE write memory client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
required:
- clocks
- clock-names
- assigned-clocks
- assigned-clock-parents
unevaluatedProperties: false
examples:
- |
#include<dt-bindings/clock/tegra210-car.h>
tegra_sound {
compatible = "nvidia,tegra210-audio-graph-card";
clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
clock-names = "pll_a", "plla_out0";
assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA210_CLK_EXTERN1>;
assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <368640000>, <49152000>, <12288000>;
dais = /* FE */
<&admaif1_port>,
/* Router */
<&xbar_i2s1_port>,
/* I/O DAP Ports */
<&i2s1_port>;
label = "jetson-tx1-ape";
};
// The ports are defined for AHUB and its child devices.
ahub@702d0800 {
compatible = "nvidia,tegra210-ahub";
reg = <0x702d0800 0x800>;
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
clock-names = "ahub";
assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x702d0000 0x702d0000 0x0000e400>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
xbar_admaif1_ep: endpoint {
remote-endpoint = <&admaif1_ep>;
};
};
// ...
xbar_i2s1_port: port@a {
reg = <0xa>;
xbar_i2s1_ep: endpoint {
remote-endpoint = <&i2s1_cif_ep>;
};
};
};
admaif@702d0000 {
compatible = "nvidia,tegra210-admaif";
reg = <0x702d0000 0x800>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10";
ports {
#address-cells = <1>;
#size-cells = <0>;
admaif1_port: port@0 {
reg = <0x0>;
admaif1_ep: endpoint {
remote-endpoint = <&xbar_admaif1_ep>;
};
};
// More ADMAIF ports to follow
};
};
i2s@702d1000 {
compatible = "nvidia,tegra210-i2s";
clocks = <&tegra_car TEGRA210_CLK_I2S0>;
clock-names = "i2s";
assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <1536000>;
reg = <0x702d1000 0x100>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
i2s1_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s1_ep>;
};
};
i2s1_port: port@1 {
reg = <0x1>;
i2s1_dap: endpoint {
dai-format = "i2s";
};
};
};
};
};
...
|
