1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 AHUB
description: |
The Audio Hub (AHUB) comprises a collection of hardware accelerators
for audio pre-processing, post-processing and a programmable full
crossbar for routing audio data across these accelerators. It has
external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
engine through ADMAIF.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
properties:
$nodename:
pattern: "^ahub@[0-9a-f]*$"
compatible:
oneOf:
- enum:
- nvidia,tegra210-ahub
- nvidia,tegra186-ahub
- nvidia,tegra234-ahub
- items:
- const: nvidia,tegra194-ahub
- const: nvidia,tegra186-ahub
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: ahub
assigned-clocks:
maxItems: 1
assigned-clock-parents:
maxItems: 1
assigned-clock-rates:
maxItems: 1
"#address-cells":
enum: [ 1, 2 ]
"#size-cells":
enum: [ 1, 2 ]
ranges: true
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
These are connected to ACIF interfaces of AHUB clients. Thus the
number of port nodes depend on the number of clients that AHUB may
have depending on the SoC revision.
patternProperties:
'^port@[0-9]':
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
patternProperties:
'^i2s@[0-9a-f]+$':
type: object
'^dmic@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-dmic.yaml#
'^admaif@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-admaif.yaml#
'^dspk@[0-9a-f]+$':
type: object
$ref: nvidia,tegra186-dspk.yaml#
'^mvc@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-mvc.yaml#
'^sfc@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-sfc.yaml#
'^amx@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-amx.yaml#
'^adx@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-adx.yaml#
'^amixer@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-mixer.yaml#
'^asrc@[0-9a-f]+$':
type: object
$ref: nvidia,tegra186-asrc.yaml#
'^processing-engine@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-ope.yaml#
required:
- compatible
- reg
- clocks
- clock-names
- assigned-clocks
- assigned-clock-parents
- "#address-cells"
- "#size-cells"
- ranges
additionalProperties: false
examples:
- |
#include<dt-bindings/clock/tegra210-car.h>
ahub@702d0800 {
compatible = "nvidia,tegra210-ahub";
reg = <0x702d0800 0x800>;
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
clock-names = "ahub";
assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x702d0000 0x702d0000 0x0000e400>;
// All AHUB child nodes below
admaif@702d0000 {
compatible = "nvidia,tegra210-admaif";
reg = <0x702d0000 0x800>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10";
};
i2s@702d1000 {
compatible = "nvidia,tegra210-i2s";
reg = <0x702d1000 0x100>;
clocks = <&tegra_car TEGRA210_CLK_I2S0>;
clock-names = "i2s";
assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <1536000>;
sound-name-prefix = "I2S1";
};
dmic@702d4000 {
compatible = "nvidia,tegra210-dmic";
reg = <0x702d4000 0x100>;
clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
clock-names = "dmic";
assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <3072000>;
sound-name-prefix = "DMIC1";
};
// More child nodes to follow
};
...
|
