blob: 7ea8fb42ce2c0a2d4d6a186292a680a3a9bdb1bf (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Zynq QSPI controller
description:
The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
memory devices.
allOf:
- $ref: spi-controller.yaml#
maintainers:
- Michal Simek <michal.simek@amd.com>
# Everything else is described in the common file
properties:
compatible:
const: xlnx,zynq-qspi-1.0
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: reference clock
- description: peripheral clock
clock-names:
items:
- const: ref_clk
- const: pclk
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
spi@e000d000 {
compatible = "xlnx,zynq-qspi-1.0";
reg = <0xe000d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 19 4>;
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
num-cs = <1>;
};
|
