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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek thermal controller for on-SoC temperatures
maintainers:
- Sascha Hauer <s.hauer@pengutronix.de>
description:
This device does not have its own ADC, instead it directly controls the AUXADC
via AHB bus accesses. For this reason it needs phandles to the AUXADC. Also it
controls a mux in the apmixedsys register space via AHB bus accesses, so a
phandle to the APMIXEDSYS is also needed.
allOf:
- $ref: thermal-sensor.yaml#
properties:
compatible:
enum:
- mediatek,mt2701-thermal
- mediatek,mt2712-thermal
- mediatek,mt7622-thermal
- mediatek,mt7981-thermal
- mediatek,mt7986-thermal
- mediatek,mt8173-thermal
- mediatek,mt8183-thermal
- mediatek,mt8365-thermal
- mediatek,mt8516-thermal
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Main clock needed for register access
- description: The AUXADC clock
clock-names:
items:
- const: therm
- const: auxadc
mediatek,auxadc:
$ref: /schemas/types.yaml#/definitions/phandle
description: A phandle to the AUXADC which the thermal controller uses
mediatek,apmixedsys:
$ref: /schemas/types.yaml#/definitions/phandle
description: A phandle to the APMIXEDSYS controller
resets:
description: Reset controller controlling the thermal controller
nvmem-cells:
items:
- description:
NVMEM cell with EEPROMA phandle to the calibration data provided by an
NVMEM device. If unspecified default values shall be used.
nvmem-cell-names:
items:
- const: calibration-data
required:
- reg
- interrupts
- clocks
- clock-names
- mediatek,auxadc
- mediatek,apmixedsys
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/mt8173-clk.h>
#include <dt-bindings/reset/mt8173-resets.h>
thermal@1100b000 {
compatible = "mediatek,mt8173-thermal";
reg = <0x1100b000 0x1000>;
interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
clock-names = "therm", "auxadc";
resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration_data>;
nvmem-cell-names = "calibration-data";
#thermal-sensor-cells = <1>;
};
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