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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx LogiCORE IP AXI Timer
maintainers:
- Sean Anderson <sean.anderson@seco.com>
properties:
compatible:
contains:
const: xlnx,xps-timer-1.00.a
clocks:
maxItems: 1
clock-names:
const: s_axi_aclk
interrupts:
maxItems: 1
reg:
maxItems: 1
'#pwm-cells': true
xlnx,count-width:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [8, 16, 32]
default: 32
description:
The width of the counter(s), in bits.
xlnx,one-timer-only:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 0, 1 ]
description:
Whether only one timer is present in this block.
required:
- compatible
- reg
- xlnx,one-timer-only
allOf:
- if:
required:
- '#pwm-cells'
then:
allOf:
- required:
- clocks
- properties:
xlnx,one-timer-only:
const: 0
else:
required:
- interrupts
- if:
required:
- clocks
then:
required:
- clock-names
additionalProperties: false
examples:
- |
timer@800e0000 {
clock-names = "s_axi_aclk";
clocks = <&zynqmp_clk 71>;
compatible = "xlnx,xps-timer-1.00.a";
reg = <0x800e0000 0x10000>;
interrupts = <0 39 2>;
xlnx,count-width = <16>;
xlnx,one-timer-only = <0x0>;
};
timer@800f0000 {
#pwm-cells = <0>;
clock-names = "s_axi_aclk";
clocks = <&zynqmp_clk 71>;
compatible = "xlnx,xps-timer-1.00.a";
reg = <0x800e0000 0x10000>;
xlnx,count-width = <32>;
xlnx,one-timer-only = <0x0>;
};
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