summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml
blob: b356793f73a15f4193432706357ad6d7d19c488c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra194 xHCI controller

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
  exposed by the Tegra XUSB pad controller.

properties:
  compatible:
    const: nvidia,tegra194-xusb

  reg:
    items:
      - description: base and length of the xHCI host registers
      - description: base and length of the XUSB FPCI registers

  reg-names:
    items:
      - const: hcd
      - const: fpci

  interrupts:
    items:
      - description: xHCI host interrupt
      - description: mailbox interrupt

  clocks:
    items:
      - description: XUSB host clock
      - description: XUSB Falcon source clock
      - description: XUSB SuperSpeed clock
      - description: XUSB SuperSpeed source clock
      - description: XUSB HighSpeed clock source
      - description: XUSB FullSpeed clock source
      - description: USB PLL
      - description: reference clock
      - description: I/O PLL

  clock-names:
    items:
      - const: xusb_host
      - const: xusb_falcon_src
      - const: xusb_ss
      - const: xusb_ss_src
      - const: xusb_hs_src
      - const: xusb_fs_src
      - const: pll_u_480m
      - const: clk_m
      - const: pll_e

  interconnects:
    items:
      - description: read client
      - description: write client

  interconnect-names:
    items:
      - const: dma-mem # read
      - const: write

  iommus:
    maxItems: 1

  nvidia,xusb-padctl:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: phandle to the XUSB pad controller that is used to configure
      the USB pads used by the XHCI controller

  phys:
    minItems: 1
    maxItems: 8

  phy-names:
    minItems: 1
    maxItems: 8
    items:
      enum:
        - usb2-0
        - usb2-1
        - usb2-2
        - usb2-3
        - usb3-0
        - usb3-1
        - usb3-2
        - usb3-3

  power-domains:
    items:
      - description: XUSBC power domain (for Host and USB 2.0)
      - description: XUSBA power domain (for SuperSpeed)

  power-domain-names:
    items:
      - const: xusb_host
      - const: xusb_ss

  dvddio-pex-supply:
    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.

  hvddio-pex-supply:
    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.

  avdd-usb-supply:
    description: USB controller power supply. Must supply 3.3 V.

  avdd-pll-utmip-supply:
    description: UTMI PLL power supply. Must supply 1.8 V.

  avdd-pll-uerefe-supply:
    description: PLLE reference PLL power supply. Must supply 1.05 V.

  dvdd-usb-ss-pll-supply:
    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.

  hvdd-usb-ss-pll-e-supply:
    description: High-voltage PLLE power supply. Must supply 1.8 V.

allOf:
  - $ref: usb-xhci.yaml

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/tegra194-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/memory/tegra194-mc.h>
    #include <dt-bindings/power/tegra194-powergate.h>
    #include <dt-bindings/reset/tegra194-reset.h>

    usb@3610000 {
        compatible = "nvidia,tegra194-xusb";
        reg = <0x03610000 0x40000>,
              <0x03600000 0x10000>;
        reg-names = "hcd", "fpci";

        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
                 <&bpmp TEGRA194_CLK_XUSB_FALCON>,
                 <&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
                 <&bpmp TEGRA194_CLK_XUSB_SS>,
                 <&bpmp TEGRA194_CLK_CLK_M>,
                 <&bpmp TEGRA194_CLK_XUSB_FS>,
                 <&bpmp TEGRA194_CLK_UTMIPLL>,
                 <&bpmp TEGRA194_CLK_CLK_M>,
                 <&bpmp TEGRA194_CLK_PLLE>;
        clock-names = "xusb_host", "xusb_falcon_src",
                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
                      "xusb_fs_src", "pll_u_480m", "clk_m",
                      "pll_e";
        interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
                        <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
        interconnect-names = "dma-mem", "write";
        iommus = <&smmu TEGRA194_SID_XUSB_HOST>;

        power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
                        <&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
        power-domain-names = "xusb_host", "xusb_ss";

        nvidia,xusb-padctl = <&xusb_padctl>;

        phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_3>, <&phy_usb3_0>,
               <&phy_usb3_2>, <&phy_usb3_3>;
        phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
    };