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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/marvell,cn10624-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Global Timer (GTI) system watchdog
maintainers:
- Bharat Bhushan <bbhushan2@marvell.com>
allOf:
- $ref: watchdog.yaml#
properties:
compatible:
oneOf:
- enum:
- marvell,cn9670-wdt
- marvell,cn10624-wdt
- items:
- enum:
- marvell,cn9880-wdt
- marvell,cnf9535-wdt
- const: marvell,cn9670-wdt
- items:
- enum:
- marvell,cn10308-wdt
- marvell,cnf10518-wdt
- const: marvell,cn10624-wdt
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: refclk
marvell,wdt-timer-index:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 63
description:
An SoC have many timers (up to 64), firmware can reserve one or more timer
for some other use case and configures one of the global timer as watchdog
timer. Firmware will update this field with the timer number configured
as watchdog timer.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
watchdog@802000040000 {
compatible = "marvell,cn9670-wdt";
reg = <0x00008020 0x00040000 0x00000000 0x00020000>;
interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
clocks = <&sclk>;
clock-names = "refclk";
marvell,wdt-timer-index = <63>;
};
};
...
|
