1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
|
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Broadcom Corporation
#include <dt-bindings/clock/bcm21664.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "BCM21664 SoC";
compatible = "brcm,bcm21664";
interrupt-parent = <&gic>;
chosen {
bootargs = "console=ttyS0,115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
enable-method = "brcm,bcm11351-cpu-method";
secondary-boot-reg = <0x35004178>;
reg = <1>;
};
};
gic: interrupt-controller@3ff00100 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x3ff01000 0x1000>,
<0x3ff00100 0x100>;
};
smc@3404e000 {
compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
};
uartb: serial@3e000000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
reg = <0x3e000000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uartb2: serial@3e001000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
reg = <0x3e001000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uartb3: serial@3e002000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
reg = <0x3e002000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
L2: cache-controller@3ff20000 {
compatible = "arm,pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
cache-level = <2>;
};
brcm,resetmgr@35001f00 {
compatible = "brcm,bcm21664-resetmgr";
reg = <0x35001f00 0x24>;
};
timer@35006000 {
compatible = "brcm,kona-timer";
reg = <0x35006000 0x1c>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
};
gpio: gpio@35003000 {
compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
reg = <0x35003000 0x524>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
gpio-controller;
interrupt-controller;
};
sdio1: mmc@3f180000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x801c>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
status = "disabled";
};
sdio2: mmc@3f190000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x801c>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
status = "disabled";
};
sdio3: mmc@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x801c>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
status = "disabled";
};
sdio4: mmc@3f1b0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x801c>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
status = "disabled";
};
bsc1: i2c@3e016000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e016000 0x70>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
status = "disabled";
};
bsc2: i2c@3e017000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e017000 0x70>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
status = "disabled";
};
bsc3: i2c@3e018000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e018000 0x70>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
status = "disabled";
};
bsc4: i2c@3e01c000 {
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
reg = <0x3e01c000 0x70>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
status = "disabled";
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
/*
* Fixed clocks are defined before CCUs whose
* clocks may depend on them.
*/
ref_32k_clk: ref_32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
bbl_32k_clk: bbl_32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
ref_13m_clk: ref_13m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <13000000>;
};
var_13m_clk: var_13m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <13000000>;
};
dft_19_5m_clk: dft_19_5m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <19500000>;
};
ref_crystal_clk: ref_crystal {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <26000000>;
};
ref_52m_clk: ref_52m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <52000000>;
};
var_52m_clk: var_52m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <52000000>;
};
usb_otg_ahb_clk: usb_otg_ahb {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <52000000>;
};
ref_96m_clk: ref_96m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <96000000>;
};
var_96m_clk: var_96m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <96000000>;
};
ref_104m_clk: ref_104m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <104000000>;
};
var_104m_clk: var_104m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <104000000>;
};
ref_156m_clk: ref_156m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <156000000>;
};
var_156m_clk: var_156m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <156000000>;
};
root_ccu: root_ccu@35001000 {
compatible = "brcm,bcm21664-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu@35002000 {
compatible = "brcm,bcm21664-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
master_ccu: master_ccu@3f001000 {
compatible = "brcm,bcm21664-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "sdio1",
"sdio2",
"sdio3",
"sdio4",
"sdio1_sleep",
"sdio2_sleep",
"sdio3_sleep",
"sdio4_sleep";
};
slave_ccu: slave_ccu@3e011000 {
compatible = "brcm,bcm21664-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",
"uartb2",
"uartb3",
"bsc1",
"bsc2",
"bsc3",
"bsc4";
};
};
usbotg: usb@3f120000 {
compatible = "snps,dwc2";
reg = <0x3f120000 0x10000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usb_otg_ahb_clk>;
clock-names = "otg";
phys = <&usbphy>;
phy-names = "usb2-phy";
status = "disabled";
};
usbphy: usb-phy@3f130000 {
compatible = "brcm,kona-usb2-phy";
reg = <0x3f130000 0x28>;
#phy-cells = <0>;
status = "disabled";
};
};
|
