arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcv.dtsi


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// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
 */

#include "socfpga_cyclone5.dtsi"

/ {
	model = "Aries/DENX MCV";
	compatible = "altr,socfpga-cyclone5", "altr,socfpga";

	memory@0 {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1 GiB */
	};
};

&mmc0 {	/* On-SoM eMMC */
	bus-width = <8>;
	clk-phase-sd-hs = <0>, <135>;
	status = "okay";
};