summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/microchip/at91-q5xr5.dts
blob: 9cf60b6f695c461835dcff0ce92c362b2b52204a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Device Tree file for Exegin Q5xR5 board
 *
 * Copyright (C) 2014 Owen Kirby <osk@exegin.com>
 */

/dts-v1/;
#include "at91sam9g20.dtsi"

/ {
	model = "Exegin Q5x (rev5)";
	compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9";

	chosen {
		bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2";
	};

	memory {
		reg = <0x20000000 0x0>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		main_clock: clock@0 {
			compatible = "atmel,osc", "fixed-clock";
			clock-frequency = <18432000>;
		};

		slow_xtal {
			clock-frequency = <32768>;
		};

		main_xtal {
			clock-frequency = <18432000>;
		};
	};
};

&dbgu {
	status = "okay";
};

&ebi {
	status = "okay";

	flash: flash@0 {
		compatible = "cfi-flash";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x0 0x1000000 0x800000>;
		bank-width = <2>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			kernel@0 {
				label = "kernel";
				reg = <0x0 0x200000>;
			};

			rootfs@200000 {
				label = "rootfs";
				reg = <0x200000 0x600000>;
			};
		};
	};
};

&macb0 {
	phy-mode = "mii";
	status = "okay";
};

&pinctrl {
	board {
		pinctrl_pck0_as_mck: pck0_as_mck {
			atmel,pins = <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
		};
	};

	spi0 {
		pinctrl_spi0: spi0-0 {
			atmel,pins =
				<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
				 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE
				 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
		};

		pinctrl_spi0_npcs0: spi0_npcs0 {
			atmel,pins = <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
		};

		pinctrl_spi0_npcs1: spi0_npcs1 {
			atmel,pins = <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
		};
	};

	spi1 {
		pinctrl_spi1: spi1-0 {
			atmel,pins =
				<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE
				 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE
				 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
		};

		pinctrl_spi1_npcs0: spi1_npcs0 {
			atmel,pins = <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
		};

		pinctrl_spi1_npcs1: spi1_npcs1 {
			atmel,pins = <AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
		};
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_npcs0 &pinctrl_spi0_npcs1>;
	cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <&pioC 11 GPIO_ACTIVE_LOW>, <0>, <0>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-max-frequency = <20000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;

		at91boot@0 {
			label = "at91boot";
			reg = <0x0 0x4000>;
		};

		uenv@4000 {
			label = "uboot-env";
			reg = <0x4000 0x4000>;
		};

		uboot@8000 {
			label = "uboot";
			reg = <0x8000 0x3E000>;
		};
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1 &pinctrl_spi1_npcs0 &pinctrl_spi1_npcs1>;
	cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>, <&pioC 5 GPIO_ACTIVE_LOW>, <0>, <0>;
	status = "okay";
};

&usart0 {
	pinctrl-0 =
		<&pinctrl_usart0
		 &pinctrl_usart0_rts
		 &pinctrl_usart0_cts
		 &pinctrl_usart0_dtr_dsr
		 &pinctrl_usart0_dcd
		 &pinctrl_usart0_ri>;
	status = "okay";
};

&usb0 {
	num-ports = <2>;
	status = "okay";
};

&usb1 {
	status = "okay";
};

&watchdog {
	status = "okay";
};