arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
 */

#include "imx25-eukrea-mbimxsd25-baseboard.dts"

/ {
	model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
	compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";

	cmo_qvga: display {
		model = "CMO-QVGA";
		bits-per-pixel = <16>;
		fsl,pcr = <0xcad08b80>;
		bus-width = <18>;
		display-timings {
			native-mode = <&qvga_timings>;
			qvga_timings: timing0 {
				clock-frequency = <6500000>;
				hactive = <320>;
				vactive = <240>;
				hback-porch = <30>;
				hfront-porch = <38>;
				vback-porch = <20>;
				vfront-porch = <3>;
				hsync-len = <15>;
				vsync-len = <4>;
			};
		};
	};

	reg_lcd_3v3: regulator-0 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
		regulator-name = "lcd-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&iomuxc {
	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
		pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
			fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
		};
	};
};

&lcdc {
	display = <&cmo_qvga>;
	fsl,lpccr = <0x00a903ff>;
	lcd-supply = <&reg_lcd_3v3>;
	status = "okay";
};