summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-rgb.dts
blob: 2559ada7e40104da777b07cb2adaa21e6629c01d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2023 Linaro Ltd.

/dts-v1/;

#include <dt-bindings/pwm/pwm.h>
#include "imx53-sk-imx53-atm0700d4.dtsi"

/ {
	display: disp0 {
		compatible = "fsl,imx-parallel-display";
		interface-pix-fmt = "rgb24";
		pinctrl-0 = <&pinctrl_rgb24>;
		pinctrl-names = "default";

		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;

			display0_in: endpoint {
				remote-endpoint = <&ipu_di0_disp0>;
			};
		};

		port@1 {
			reg = <1>;

			display_out: endpoint {
				remote-endpoint = <&panel_rgb_in>;
			};
		};
	};

};

&iomuxc {
	pinctrl_rgb24: rgb24grp {
		fsl,pins = <
			MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK		0x5
			MX53_PAD_DI0_PIN15__IPU_DI0_PIN15		0x5
			MX53_PAD_DI0_PIN2__IPU_DI0_PIN2			0x5
			MX53_PAD_DI0_PIN3__IPU_DI0_PIN3			0x5
			MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0		0x5
			MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1		0x5
			MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2		0x5
			MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3		0x5
			MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4		0x5
			MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5		0x5
			MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6		0x5
			MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7		0x5
			MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8		0x5
			MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9		0x5
			MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10		0x5
			MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11		0x5
			MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12		0x5
			MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13		0x5
			MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14		0x5
			MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15		0x5
			MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16		0x5
			MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17		0x5
			MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18		0x5
			MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19		0x5
			MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20		0x5
			MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21		0x5
			MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22		0x5
			MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23		0x5
		>;
	};

	pinctrl_spi_gpio: spigrp {
		fsl,pins = <
			MX53_PAD_SD1_DATA1__GPIO1_17		0x1f4
			MX53_PAD_GPIO_7__GPIO1_7		0x1f4
			MX53_PAD_PATA_DATA3__GPIO2_3		0x1f4
			MX53_PAD_PATA_DATA8__GPIO2_8		0x1f4
		>;
	};
};

&ipu_di0_disp0 {
	remote-endpoint = <&display0_in>;
};

&panel {
	enable-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
};

&panel_rgb_in {
	remote-endpoint = <&display_out>;
};

&pwm1 {
	status = "disabled";
};

&spi_ts {
	pinctrl-0 = <&pinctrl_spi_gpio>;
	pinctrl-names = "default";

	sck-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	mosi-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
	miso-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
	cs-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
};

&touchscreen {
	interrupts-extended = <&gpio2 6 IRQ_TYPE_EDGE_BOTH>;
	pendown-gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
};