summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/samsung/s3c6410.dtsi
blob: 13e9cc69b8a80745833552c6fafbcb6a04ed174d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's S3C6410 SoC device tree source
 *
 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
 *
 * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410
 * based board files can include this file and provide values for board specific
 * bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional
 * nodes can be added to this file.
 */

#include "s3c64xx.dtsi"

/ {
	compatible = "samsung,s3c6410";

	aliases {
		i2c1 = &i2c1;
	};
};

&vic0 {
	valid-mask = <0xffffff7f>;
	valid-wakeup-mask = <0x00200004>;
};

&vic1 {
	valid-mask = <0xffffffff>;
	valid-wakeup-mask = <0x53020000>;
};

&soc {
	clocks: clock-controller@7e00f000 {
		compatible = "samsung,s3c6410-clock";
		reg = <0x7e00f000 0x1000>;
		#clock-cells = <1>;
	};

	i2c1: i2c@7f00f000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x7f00f000 0x1000>;
		interrupt-parent = <&vic0>;
		interrupts = <5>;
		clock-names = "i2c";
		clocks = <&clocks PCLK_IIC1>;
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};
};