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// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Gregor Herburger, Timo Herbrecher
*
* Device Tree Include file for MBLS10xxA from TQ (MC related sections)
*/
#include <dt-bindings/net/ti-dp83867.h>
/ {
sfp1: sfp1 {
compatible = "sff,sfp";
i2c-bus = <&sfp1_i2c>;
mod-def0-gpios = <&gpioexp2 2 GPIO_ACTIVE_LOW>;
los-gpios = <&gpioexp2 3 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpioexp2 0 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&gpioexp2 1 GPIO_ACTIVE_HIGH>;
};
sfp2: sfp2 {
compatible = "sff,sfp";
i2c-bus = <&sfp2_i2c>;
mod-def0-gpios = <&gpioexp2 10 GPIO_ACTIVE_LOW>;
los-gpios = <&gpioexp2 11 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpioexp2 8 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&gpioexp2 9 GPIO_ACTIVE_HIGH>;
};
};
&dpmac1 {
pcs-handle = <&pcs1>;
};
&dpmac2 {
pcs-handle = <&pcs2>;
};
&dpmac3 {
pcs-handle = <&pcs3_0>;
};
&dpmac4 {
pcs-handle = <&pcs3_1>;
};
&dpmac5 {
pcs-handle = <&pcs3_2>;
};
&dpmac6 {
pcs-handle = <&pcs3_3>;
};
&dpmac7 {
pcs-handle = <&pcs7_0>;
};
&dpmac8 {
pcs-handle = <&pcs7_1>;
};
&dpmac9 {
pcs-handle = <&pcs7_2>;
};
&dpmac10 {
pcs-handle = <&pcs7_3>;
};
&emdio1 {
status = "okay";
qsgmii2_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x00>;
};
qsgmii2_phy2: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x01>;
};
qsgmii2_phy3: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x02>;
};
qsgmii2_phy4: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x03>;
};
rgmii_phy2: ethernet-phy@c {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0c>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
};
rgmii_phy1: ethernet-phy@e {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0e>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
};
qsgmii1_phy1: ethernet-phy@1c {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1c>;
};
qsgmii1_phy2: ethernet-phy@1d {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1d>;
};
qsgmii1_phy3: ethernet-phy@1e {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1e>;
};
qsgmii1_phy4: ethernet-phy@1f {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1f>;
};
};
&pcs_mdio1 {
status = "okay";
};
&pcs_mdio2 {
status = "okay";
};
&pcs_mdio3 {
status = "okay";
};
&pcs_mdio7 {
status = "okay";
};
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