summaryrefslogtreecommitdiffstats
path: root/drivers/irqchip/irq-riscv-aplic-main.h
blob: 4393927d8c80704579cd03c67f9ce31d6bfb892e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2021 Western Digital Corporation or its affiliates.
 * Copyright (C) 2022 Ventana Micro Systems Inc.
 */

#ifndef _IRQ_RISCV_APLIC_MAIN_H
#define _IRQ_RISCV_APLIC_MAIN_H

#include <linux/device.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/fwnode.h>

#define APLIC_DEFAULT_PRIORITY		1

struct aplic_msicfg {
	phys_addr_t		base_ppn;
	u32			hhxs;
	u32			hhxw;
	u32			lhxs;
	u32			lhxw;
};

struct aplic_priv {
	struct device		*dev;
	u32			gsi_base;
	u32			nr_irqs;
	u32			nr_idcs;
	void __iomem		*regs;
	struct aplic_msicfg	msicfg;
};

void aplic_irq_unmask(struct irq_data *d);
void aplic_irq_mask(struct irq_data *d);
int aplic_irq_set_type(struct irq_data *d, unsigned int type);
int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base,
			      unsigned long *hwirq, unsigned int *type);
void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode);
int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs);
int aplic_direct_setup(struct device *dev, void __iomem *regs);
#ifdef CONFIG_RISCV_APLIC_MSI
int aplic_msi_setup(struct device *dev, void __iomem *regs);
#else
static inline int aplic_msi_setup(struct device *dev, void __iomem *regs)
{
	return -ENODEV;
}
#endif

#endif