blob: 44eee844ab3cbafe77fbdd14b0293da616557083 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* intel_soc_dts_iosf.h
* Copyright (c) 2015, Intel Corporation.
*/
#ifndef _INTEL_SOC_DTS_IOSF_CORE_H
#define _INTEL_SOC_DTS_IOSF_CORE_H
#include <linux/thermal.h>
/* DTS0 and DTS 1 */
#define SOC_MAX_DTS_SENSORS 2
/* Only 2 out of 4 is allowed for OSPM */
#define SOC_MAX_DTS_TRIPS 2
enum intel_soc_dts_interrupt_type {
INTEL_SOC_DTS_INTERRUPT_NONE,
INTEL_SOC_DTS_INTERRUPT_APIC,
INTEL_SOC_DTS_INTERRUPT_MSI,
INTEL_SOC_DTS_INTERRUPT_SCI,
INTEL_SOC_DTS_INTERRUPT_SMI,
};
struct intel_soc_dts_sensors;
struct intel_soc_dts_sensor_entry {
int id;
u32 store_status;
struct thermal_zone_device *tzone;
struct intel_soc_dts_sensors *sensors;
};
struct intel_soc_dts_sensors {
u32 tj_max;
spinlock_t intr_notify_lock;
struct mutex dts_update_lock;
enum intel_soc_dts_interrupt_type intr_type;
struct intel_soc_dts_sensor_entry soc_dts[SOC_MAX_DTS_SENSORS];
};
struct intel_soc_dts_sensors *
intel_soc_dts_iosf_init(enum intel_soc_dts_interrupt_type intr_type,
bool critical_trip, int crit_offset);
void intel_soc_dts_iosf_exit(struct intel_soc_dts_sensors *sensors);
void intel_soc_dts_iosf_interrupt_handler(
struct intel_soc_dts_sensors *sensors);
#endif
|