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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-30 03:59:35 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-30 03:59:35 +0000
commitd1b2d29528b7794b41e66fc2136e395a02f8529b (patch)
treea4a17504b260206dec3cf55b2dca82929a348ac2 /compiler/rustc_target
parentReleasing progress-linux version 1.72.1+dfsg1-1~progress7.99u1. (diff)
downloadrustc-d1b2d29528b7794b41e66fc2136e395a02f8529b.tar.xz
rustc-d1b2d29528b7794b41e66fc2136e395a02f8529b.zip
Merging upstream version 1.73.0+dfsg1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'compiler/rustc_target')
-rw-r--r--compiler/rustc_target/Cargo.toml2
-rw-r--r--compiler/rustc_target/src/abi/call/aarch64.rs70
-rw-r--r--compiler/rustc_target/src/abi/call/csky.rs31
-rw-r--r--compiler/rustc_target/src/abi/call/m68k.rs2
-rw-r--r--compiler/rustc_target/src/abi/call/mod.rs60
-rw-r--r--compiler/rustc_target/src/abi/call/wasm.rs2
-rw-r--r--compiler/rustc_target/src/abi/call/x86.rs73
-rw-r--r--compiler/rustc_target/src/abi/call/x86_64.rs2
-rw-r--r--compiler/rustc_target/src/abi/mod.rs28
-rw-r--r--compiler/rustc_target/src/asm/csky.rs128
-rw-r--r--compiler/rustc_target/src/asm/mod.rs28
-rw-r--r--compiler/rustc_target/src/json.rs5
-rw-r--r--compiler/rustc_target/src/lib.rs2
-rw-r--r--compiler/rustc_target/src/spec/aarch64_unknown_hermit.rs14
-rw-r--r--compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs6
-rw-r--r--compiler/rustc_target/src/spec/aarch64_unknown_teeos.rs16
-rw-r--r--compiler/rustc_target/src/spec/abi.rs41
-rw-r--r--compiler/rustc_target/src/spec/abi/tests.rs6
-rw-r--r--compiler/rustc_target/src/spec/arm_unknown_linux_gnueabi.rs1
-rw-r--r--compiler/rustc_target/src/spec/arm_unknown_linux_gnueabihf.rs1
-rw-r--r--compiler/rustc_target/src/spec/armeb_unknown_linux_gnueabi.rs1
-rw-r--r--compiler/rustc_target/src/spec/armebv7r_none_eabi.rs4
-rw-r--r--compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs4
-rw-r--r--compiler/rustc_target/src/spec/armv4t_none_eabi.rs4
-rw-r--r--compiler/rustc_target/src/spec/armv4t_unknown_linux_gnueabi.rs1
-rw-r--r--compiler/rustc_target/src/spec/armv6_unknown_freebsd.rs1
-rw-r--r--compiler/rustc_target/src/spec/armv7_unknown_linux_gnueabi.rs1
-rw-r--r--compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs6
-rw-r--r--compiler/rustc_target/src/spec/armv7a_none_eabihf.rs2
-rw-r--r--compiler/rustc_target/src/spec/armv7r_none_eabi.rs4
-rw-r--r--compiler/rustc_target/src/spec/armv7r_none_eabihf.rs4
-rw-r--r--compiler/rustc_target/src/spec/avr_gnu_base.rs2
-rw-r--r--compiler/rustc_target/src/spec/csky_unknown_linux_gnuabiv2.rs20
-rw-r--r--compiler/rustc_target/src/spec/hermit_base.rs14
-rw-r--r--compiler/rustc_target/src/spec/linux_ohos_base.rs12
-rw-r--r--compiler/rustc_target/src/spec/loongarch64_unknown_none.rs3
-rw-r--r--compiler/rustc_target/src/spec/loongarch64_unknown_none_softfloat.rs3
-rw-r--r--compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs2
-rw-r--r--compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs2
-rw-r--r--compiler/rustc_target/src/spec/mod.rs75
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_ibm_aix.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_unknown_freebsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_unknown_linux_musl.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64_wrs_vxworks.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64le_unknown_freebsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64le_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc64le_unknown_linux_musl.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_freebsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_linux_gnuspe.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_linux_musl.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_netbsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_unknown_openbsd.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_wrs_vxworks.rs2
-rw-r--r--compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs2
-rw-r--r--compiler/rustc_target/src/spec/riscv64_linux_android.rs19
-rw-r--r--compiler/rustc_target/src/spec/riscv64gc_unknown_hermit.rs20
-rw-r--r--compiler/rustc_target/src/spec/sparc_unknown_linux_gnu.rs2
-rw-r--r--compiler/rustc_target/src/spec/sparc_unknown_none_elf.rs27
-rw-r--r--compiler/rustc_target/src/spec/teeos_base.rs29
-rw-r--r--compiler/rustc_target/src/spec/thumb_base.rs2
-rw-r--r--compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs2
-rw-r--r--compiler/rustc_target/src/spec/unikraft_linux_musl_base.rs15
-rw-r--r--compiler/rustc_target/src/spec/wasm32_wasi_preview1_threads.rs134
-rw-r--r--compiler/rustc_target/src/spec/x86_64_unikraft_linux_musl.rs19
-rw-r--r--compiler/rustc_target/src/spec/x86_64_unknown_hermit.rs20
-rw-r--r--compiler/rustc_target/src/spec/x86_64_unknown_linux_ohos.rs26
71 files changed, 858 insertions, 178 deletions
diff --git a/compiler/rustc_target/Cargo.toml b/compiler/rustc_target/Cargo.toml
index a71e2e8cc..393e59e8b 100644
--- a/compiler/rustc_target/Cargo.toml
+++ b/compiler/rustc_target/Cargo.toml
@@ -16,6 +16,6 @@ rustc_serialize = { path = "../rustc_serialize" }
rustc_span = { path = "../rustc_span" }
[dependencies.object]
-version = "0.31.1"
+version = "0.32.0"
default-features = false
features = ["elf"]
diff --git a/compiler/rustc_target/src/abi/call/aarch64.rs b/compiler/rustc_target/src/abi/call/aarch64.rs
index a84988fa7..b4c7b0f12 100644
--- a/compiler/rustc_target/src/abi/call/aarch64.rs
+++ b/compiler/rustc_target/src/abi/call/aarch64.rs
@@ -1,25 +1,15 @@
use crate::abi::call::{ArgAbi, FnAbi, Reg, RegKind, Uniform};
use crate::abi::{HasDataLayout, TyAbiInterface};
-/// Given integer-types M and register width N (e.g. M=u16 and N=32 bits), the
-/// `ParamExtension` policy specifies how a uM value should be treated when
-/// passed via register or stack-slot of width N. See also rust-lang/rust#97463.
+/// Indicates the variant of the AArch64 ABI we are compiling for.
+/// Used to accommodate Apple and Microsoft's deviations from the usual AAPCS ABI.
+///
+/// Corresponds to Clang's `AArch64ABIInfo::ABIKind`.
#[derive(Copy, Clone, PartialEq)]
-pub enum ParamExtension {
- /// Indicates that when passing an i8/i16, either as a function argument or
- /// as a return value, it must be sign-extended to 32 bits, and likewise a
- /// u8/u16 must be zero-extended to 32-bits. (This variant is here to
- /// accommodate Apple's deviation from the usual AArch64 ABI as defined by
- /// ARM.)
- ///
- /// See also: <https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Pass-Arguments-to-Functions-Correctly>
- ExtendTo32Bits,
-
- /// Indicates that no sign- nor zero-extension is performed: if a value of
- /// type with bitwidth M is passed as function argument or return value,
- /// then M bits are copied into the least significant M bits, and the
- /// remaining bits of the register (or word of memory) are untouched.
- NoExtension,
+pub enum AbiKind {
+ AAPCS,
+ DarwinPCS,
+ Win64,
}
fn is_homogeneous_aggregate<'a, Ty, C>(cx: &C, arg: &mut ArgAbi<'a, Ty>) -> Option<Uniform>
@@ -45,15 +35,17 @@ where
})
}
-fn classify_ret<'a, Ty, C>(cx: &C, ret: &mut ArgAbi<'a, Ty>, param_policy: ParamExtension)
+fn classify_ret<'a, Ty, C>(cx: &C, ret: &mut ArgAbi<'a, Ty>, kind: AbiKind)
where
Ty: TyAbiInterface<'a, C> + Copy,
C: HasDataLayout,
{
if !ret.layout.is_aggregate() {
- match param_policy {
- ParamExtension::ExtendTo32Bits => ret.extend_integer_width_to(32),
- ParamExtension::NoExtension => {}
+ if kind == AbiKind::DarwinPCS {
+ // On Darwin, when returning an i8/i16, it must be sign-extended to 32 bits,
+ // and likewise a u8/u16 must be zero-extended to 32-bits.
+ // See also: <https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Pass-Arguments-to-Functions-Correctly>
+ ret.extend_integer_width_to(32)
}
return;
}
@@ -70,15 +62,17 @@ where
ret.make_indirect();
}
-fn classify_arg<'a, Ty, C>(cx: &C, arg: &mut ArgAbi<'a, Ty>, param_policy: ParamExtension)
+fn classify_arg<'a, Ty, C>(cx: &C, arg: &mut ArgAbi<'a, Ty>, kind: AbiKind)
where
Ty: TyAbiInterface<'a, C> + Copy,
C: HasDataLayout,
{
if !arg.layout.is_aggregate() {
- match param_policy {
- ParamExtension::ExtendTo32Bits => arg.extend_integer_width_to(32),
- ParamExtension::NoExtension => {}
+ if kind == AbiKind::DarwinPCS {
+ // On Darwin, when passing an i8/i16, it must be sign-extended to 32 bits,
+ // and likewise a u8/u16 must be zero-extended to 32-bits.
+ // See also: <https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Pass-Arguments-to-Functions-Correctly>
+ arg.extend_integer_width_to(32);
}
return;
}
@@ -87,27 +81,39 @@ where
return;
}
let size = arg.layout.size;
- let bits = size.bits();
- if bits <= 128 {
- arg.cast_to(Uniform { unit: Reg::i64(), total: size });
+ let align = if kind == AbiKind::AAPCS {
+ // When passing small aggregates by value, the AAPCS ABI mandates using the unadjusted
+ // alignment of the type (not including `repr(align)`).
+ // This matches behavior of `AArch64ABIInfo::classifyArgumentType` in Clang.
+ // See: <https://github.com/llvm/llvm-project/blob/5e691a1c9b0ad22689d4a434ddf4fed940e58dec/clang/lib/CodeGen/TargetInfo.cpp#L5816-L5823>
+ arg.layout.unadjusted_abi_align
+ } else {
+ arg.layout.align.abi
+ };
+ if size.bits() <= 128 {
+ if align.bits() == 128 {
+ arg.cast_to(Uniform { unit: Reg::i128(), total: size });
+ } else {
+ arg.cast_to(Uniform { unit: Reg::i64(), total: size });
+ }
return;
}
arg.make_indirect();
}
-pub fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>, param_policy: ParamExtension)
+pub fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>, kind: AbiKind)
where
Ty: TyAbiInterface<'a, C> + Copy,
C: HasDataLayout,
{
if !fn_abi.ret.is_ignore() {
- classify_ret(cx, &mut fn_abi.ret, param_policy);
+ classify_ret(cx, &mut fn_abi.ret, kind);
}
for arg in fn_abi.args.iter_mut() {
if arg.is_ignore() {
continue;
}
- classify_arg(cx, arg, param_policy);
+ classify_arg(cx, arg, kind);
}
}
diff --git a/compiler/rustc_target/src/abi/call/csky.rs b/compiler/rustc_target/src/abi/call/csky.rs
new file mode 100644
index 000000000..bbe95fa20
--- /dev/null
+++ b/compiler/rustc_target/src/abi/call/csky.rs
@@ -0,0 +1,31 @@
+// See https://github.com/llvm/llvm-project/blob/d85b94bf0080dcd780656c0f5e6342800720eba9/llvm/lib/Target/CSKY/CSKYCallingConv.td
+use crate::abi::call::{ArgAbi, FnAbi};
+
+fn classify_ret<Ty>(ret: &mut ArgAbi<'_, Ty>) {
+ if ret.layout.is_aggregate() || ret.layout.size.bits() > 64 {
+ ret.make_indirect();
+ } else {
+ ret.extend_integer_width_to(32);
+ }
+}
+
+fn classify_arg<Ty>(arg: &mut ArgAbi<'_, Ty>) {
+ if arg.layout.is_aggregate() || arg.layout.size.bits() > 64 {
+ arg.make_indirect();
+ } else {
+ arg.extend_integer_width_to(32);
+ }
+}
+
+pub fn compute_abi_info<Ty>(fn_abi: &mut FnAbi<'_, Ty>) {
+ if !fn_abi.ret.is_ignore() {
+ classify_ret(&mut fn_abi.ret);
+ }
+
+ for arg in fn_abi.args.iter_mut() {
+ if arg.is_ignore() {
+ continue;
+ }
+ classify_arg(arg);
+ }
+}
diff --git a/compiler/rustc_target/src/abi/call/m68k.rs b/compiler/rustc_target/src/abi/call/m68k.rs
index c1e0f54af..1d4649ed8 100644
--- a/compiler/rustc_target/src/abi/call/m68k.rs
+++ b/compiler/rustc_target/src/abi/call/m68k.rs
@@ -10,7 +10,7 @@ fn classify_ret<Ty>(ret: &mut ArgAbi<'_, Ty>) {
fn classify_arg<Ty>(arg: &mut ArgAbi<'_, Ty>) {
if arg.layout.is_aggregate() {
- arg.make_indirect_byval();
+ arg.make_indirect_byval(None);
} else {
arg.extend_integer_width_to(32);
}
diff --git a/compiler/rustc_target/src/abi/call/mod.rs b/compiler/rustc_target/src/abi/call/mod.rs
index c4abf6f4b..8fab13d5d 100644
--- a/compiler/rustc_target/src/abi/call/mod.rs
+++ b/compiler/rustc_target/src/abi/call/mod.rs
@@ -9,6 +9,7 @@ mod amdgpu;
mod arm;
mod avr;
mod bpf;
+mod csky;
mod hexagon;
mod loongarch;
mod m68k;
@@ -494,9 +495,7 @@ impl<'a, Ty> ArgAbi<'a, Ty> {
.set(ArgAttribute::NonNull)
.set(ArgAttribute::NoUndef);
attrs.pointee_size = layout.size;
- // FIXME(eddyb) We should be doing this, but at least on
- // i686-pc-windows-msvc, it results in wrong stack offsets.
- // attrs.pointee_align = Some(layout.align.abi);
+ attrs.pointee_align = Some(layout.align.abi);
let extra_attrs = layout.is_unsized().then_some(ArgAttributes::new());
@@ -513,11 +512,19 @@ impl<'a, Ty> ArgAbi<'a, Ty> {
self.mode = Self::indirect_pass_mode(&self.layout);
}
- pub fn make_indirect_byval(&mut self) {
+ pub fn make_indirect_byval(&mut self, byval_align: Option<Align>) {
self.make_indirect();
match self.mode {
- PassMode::Indirect { attrs: _, extra_attrs: _, ref mut on_stack } => {
+ PassMode::Indirect { ref mut attrs, extra_attrs: _, ref mut on_stack } => {
*on_stack = true;
+
+ // Some platforms, like 32-bit x86, change the alignment of the type when passing
+ // `byval`. Account for that.
+ if let Some(byval_align) = byval_align {
+ // On all targets with byval align this is currently true, so let's assert it.
+ debug_assert!(byval_align >= Align::from_bytes(4).unwrap());
+ attrs.pointee_align = Some(byval_align);
+ }
}
_ => unreachable!(),
}
@@ -597,6 +604,25 @@ pub enum Conv {
AmdGpuKernel,
AvrInterrupt,
AvrNonBlockingInterrupt,
+
+ RiscvInterrupt {
+ kind: RiscvInterruptKind,
+ },
+}
+
+#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug, HashStable_Generic)]
+pub enum RiscvInterruptKind {
+ Machine,
+ Supervisor,
+}
+
+impl RiscvInterruptKind {
+ pub fn as_str(&self) -> &'static str {
+ match self {
+ Self::Machine => "machine",
+ Self::Supervisor => "supervisor",
+ }
+ }
}
/// Metadata describing how the arguments to a native function
@@ -644,7 +670,8 @@ impl<'a, Ty> FnAbi<'a, Ty> {
{
if abi == spec::abi::Abi::X86Interrupt {
if let Some(arg) = self.args.first_mut() {
- arg.make_indirect_byval();
+ // FIXME(pcwalton): This probably should use the x86 `byval` ABI...
+ arg.make_indirect_byval(None);
}
return Ok(());
}
@@ -672,20 +699,23 @@ impl<'a, Ty> FnAbi<'a, Ty> {
}
},
"aarch64" => {
- let param_policy = if cx.target_spec().is_like_osx {
- aarch64::ParamExtension::ExtendTo32Bits
+ let kind = if cx.target_spec().is_like_osx {
+ aarch64::AbiKind::DarwinPCS
+ } else if cx.target_spec().is_like_windows {
+ aarch64::AbiKind::Win64
} else {
- aarch64::ParamExtension::NoExtension
+ aarch64::AbiKind::AAPCS
};
- aarch64::compute_abi_info(cx, self, param_policy)
+ aarch64::compute_abi_info(cx, self, kind)
}
"amdgpu" => amdgpu::compute_abi_info(cx, self),
"arm" => arm::compute_abi_info(cx, self),
"avr" => avr::compute_abi_info(self),
"loongarch64" => loongarch::compute_abi_info(cx, self),
"m68k" => m68k::compute_abi_info(self),
- "mips" => mips::compute_abi_info(cx, self),
- "mips64" => mips64::compute_abi_info(cx, self),
+ "csky" => csky::compute_abi_info(self),
+ "mips" | "mips32r6" => mips::compute_abi_info(cx, self),
+ "mips64" | "mips64r6" => mips64::compute_abi_info(cx, self),
"powerpc" => powerpc::compute_abi_info(self),
"powerpc64" => powerpc64::compute_abi_info(cx, self),
"s390x" => s390x::compute_abi_info(cx, self),
@@ -744,6 +774,12 @@ impl FromStr for Conv {
"AmdGpuKernel" => Ok(Conv::AmdGpuKernel),
"AvrInterrupt" => Ok(Conv::AvrInterrupt),
"AvrNonBlockingInterrupt" => Ok(Conv::AvrNonBlockingInterrupt),
+ "RiscvInterrupt(machine)" => {
+ Ok(Conv::RiscvInterrupt { kind: RiscvInterruptKind::Machine })
+ }
+ "RiscvInterrupt(supervisor)" => {
+ Ok(Conv::RiscvInterrupt { kind: RiscvInterruptKind::Supervisor })
+ }
_ => Err(format!("'{s}' is not a valid value for entry function call convention.")),
}
}
diff --git a/compiler/rustc_target/src/abi/call/wasm.rs b/compiler/rustc_target/src/abi/call/wasm.rs
index 44427ee53..0eb2309ec 100644
--- a/compiler/rustc_target/src/abi/call/wasm.rs
+++ b/compiler/rustc_target/src/abi/call/wasm.rs
@@ -36,7 +36,7 @@ where
{
arg.extend_integer_width_to(32);
if arg.layout.is_aggregate() && !unwrap_trivial_aggregate(cx, arg) {
- arg.make_indirect_byval();
+ arg.make_indirect_byval(None);
}
}
diff --git a/compiler/rustc_target/src/abi/call/x86.rs b/compiler/rustc_target/src/abi/call/x86.rs
index 7c26335dc..b738c3133 100644
--- a/compiler/rustc_target/src/abi/call/x86.rs
+++ b/compiler/rustc_target/src/abi/call/x86.rs
@@ -1,5 +1,5 @@
use crate::abi::call::{ArgAttribute, FnAbi, PassMode, Reg, RegKind};
-use crate::abi::{HasDataLayout, TyAbiInterface};
+use crate::abi::{Abi, Align, HasDataLayout, TyAbiInterface, TyAndLayout};
use crate::spec::HasTargetSpec;
#[derive(PartialEq)]
@@ -53,8 +53,75 @@ where
if arg.is_ignore() {
continue;
}
- if arg.layout.is_aggregate() {
- arg.make_indirect_byval();
+
+ // FIXME: MSVC 2015+ will pass the first 3 vector arguments in [XYZ]MM0-2
+ // See https://reviews.llvm.org/D72114 for Clang behavior
+
+ let t = cx.target_spec();
+ let align_4 = Align::from_bytes(4).unwrap();
+ let align_16 = Align::from_bytes(16).unwrap();
+
+ if t.is_like_msvc
+ && arg.layout.is_adt()
+ && let Some(max_repr_align) = arg.layout.max_repr_align
+ && max_repr_align > align_4
+ {
+ // MSVC has special rules for overaligned arguments: https://reviews.llvm.org/D72114.
+ // Summarized here:
+ // - Arguments with _requested_ alignment > 4 are passed indirectly.
+ // - For backwards compatibility, arguments with natural alignment > 4 are still passed
+ // on stack (via `byval`). For example, this includes `double`, `int64_t`,
+ // and structs containing them, provided they lack an explicit alignment attribute.
+ assert!(arg.layout.align.abi >= max_repr_align,
+ "abi alignment {:?} less than requested alignment {max_repr_align:?}",
+ arg.layout.align.abi,
+ );
+ arg.make_indirect();
+ } else if arg.layout.is_aggregate() {
+ // We need to compute the alignment of the `byval` argument. The rules can be found in
+ // `X86_32ABIInfo::getTypeStackAlignInBytes` in Clang's `TargetInfo.cpp`. Summarized
+ // here, they are:
+ //
+ // 1. If the natural alignment of the type is <= 4, the alignment is 4.
+ //
+ // 2. Otherwise, on Linux, the alignment of any vector type is the natural alignment.
+ // This doesn't matter here because we only pass aggregates via `byval`, not vectors.
+ //
+ // 3. Otherwise, on Apple platforms, the alignment of anything that contains a vector
+ // type is 16.
+ //
+ // 4. If none of these conditions are true, the alignment is 4.
+
+ fn contains_vector<'a, Ty, C>(cx: &C, layout: TyAndLayout<'a, Ty>) -> bool
+ where
+ Ty: TyAbiInterface<'a, C> + Copy,
+ {
+ match layout.abi {
+ Abi::Uninhabited | Abi::Scalar(_) | Abi::ScalarPair(..) => false,
+ Abi::Vector { .. } => true,
+ Abi::Aggregate { .. } => {
+ for i in 0..layout.fields.count() {
+ if contains_vector(cx, layout.field(cx, i)) {
+ return true;
+ }
+ }
+ false
+ }
+ }
+ }
+
+ let byval_align = if arg.layout.align.abi < align_4 {
+ // (1.)
+ align_4
+ } else if t.is_like_osx && contains_vector(cx, arg.layout) {
+ // (3.)
+ align_16
+ } else {
+ // (4.)
+ align_4
+ };
+
+ arg.make_indirect_byval(Some(byval_align));
} else {
arg.extend_integer_width_to(32);
}
diff --git a/compiler/rustc_target/src/abi/call/x86_64.rs b/compiler/rustc_target/src/abi/call/x86_64.rs
index b1aefaf05..d1efe9776 100644
--- a/compiler/rustc_target/src/abi/call/x86_64.rs
+++ b/compiler/rustc_target/src/abi/call/x86_64.rs
@@ -213,7 +213,7 @@ where
match cls_or_mem {
Err(Memory) => {
if is_arg {
- arg.make_indirect_byval();
+ arg.make_indirect_byval(None);
} else {
// `sret` parameter thus one less integer register available
arg.make_indirect();
diff --git a/compiler/rustc_target/src/abi/mod.rs b/compiler/rustc_target/src/abi/mod.rs
index 589cd3cf9..dd435dbb0 100644
--- a/compiler/rustc_target/src/abi/mod.rs
+++ b/compiler/rustc_target/src/abi/mod.rs
@@ -39,7 +39,7 @@ impl<'a, Ty> Deref for TyAndLayout<'a, Ty> {
/// Trait that needs to be implemented by the higher-level type representation
/// (e.g. `rustc_middle::ty::Ty`), to provide `rustc_target::abi` functionality.
-pub trait TyAbiInterface<'a, C>: Sized {
+pub trait TyAbiInterface<'a, C>: Sized + std::fmt::Debug {
fn ty_and_layout_for_variant(
this: TyAndLayout<'a, Self>,
cx: &C,
@@ -135,29 +135,13 @@ impl<'a, Ty> TyAndLayout<'a, Ty> {
for index in indices {
offset += layout.fields.offset(index);
layout = layout.field(cx, index);
+ assert!(
+ layout.is_sized(),
+ "offset of unsized field (type {:?}) cannot be computed statically",
+ layout.ty
+ );
}
offset
}
}
-
-impl<'a, Ty> TyAndLayout<'a, Ty> {
- /// Returns `true` if the layout corresponds to an unsized type.
- pub fn is_unsized(&self) -> bool {
- self.abi.is_unsized()
- }
-
- #[inline]
- pub fn is_sized(&self) -> bool {
- self.abi.is_sized()
- }
-
- /// Returns `true` if the type is a ZST and not unsized.
- pub fn is_zst(&self) -> bool {
- match self.abi {
- Abi::Scalar(_) | Abi::ScalarPair(..) | Abi::Vector { .. } => false,
- Abi::Uninhabited => self.size.bytes() == 0,
- Abi::Aggregate { sized } => sized && self.size.bytes() == 0,
- }
- }
-}
diff --git a/compiler/rustc_target/src/asm/csky.rs b/compiler/rustc_target/src/asm/csky.rs
new file mode 100644
index 000000000..6f0e7f799
--- /dev/null
+++ b/compiler/rustc_target/src/asm/csky.rs
@@ -0,0 +1,128 @@
+use super::{InlineAsmArch, InlineAsmType};
+use rustc_macros::HashStable_Generic;
+use rustc_span::Symbol;
+use std::fmt;
+
+def_reg_class! {
+ CSKY CSKYInlineAsmRegClass {
+ reg,
+ freg,
+ }
+}
+
+impl CSKYInlineAsmRegClass {
+ pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
+ &[]
+ }
+
+ pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
+ None
+ }
+
+ pub fn suggest_modifier(
+ self,
+ _arch: InlineAsmArch,
+ _ty: InlineAsmType,
+ ) -> Option<(char, &'static str)> {
+ None
+ }
+
+ pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
+ None
+ }
+
+ pub fn supported_types(
+ self,
+ _arch: InlineAsmArch,
+ ) -> &'static [(InlineAsmType, Option<Symbol>)] {
+ match self {
+ Self::reg => types! { _: I8, I16, I32; },
+ Self::freg => types! { _: F32; },
+ }
+ }
+}
+
+// The reserved registers are taken from <https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/CSKY/CSKYRegisterInfo.cpp#79>
+def_regs! {
+ CSKY CSKYInlineAsmReg CSKYInlineAsmRegClass {
+ r0: reg = ["r0","a0"],
+ r1: reg = ["r1","a1"],
+ r2: reg = ["r2","a2"],
+ r3: reg = ["r3","a3"],
+ r4: reg = ["r4","l0"],
+ r5: reg = ["r5","l1"],
+ r6: reg = ["r6","l2"],
+ r9: reg = ["r9","l5"],// feature e2
+ r10: reg = ["r10","l6"],// feature e2
+ r11: reg = ["r11","l7"],// feature e2
+ r12: reg = ["r12","t0"],// feature e2
+ r13: reg = ["r13","t1"],// feature e2
+ r16: reg = ["r16","l8"],// feature high-register
+ r17: reg = ["r17","l9"],// feature high-register
+ r18: reg = ["r18","t2"],// feature high-register
+ r19: reg = ["r19","t3"],// feature high-register
+ r20: reg = ["r20","t4"],// feature high-register
+ r21: reg = ["r21","t5"],// feature high-register
+ r22: reg = ["r22","t6"],// feature high-register
+ r23: reg = ["r23","t7", "fp"],// feature high-register
+ r24: reg = ["r24","t8", "sop"],// feature high-register
+ r25: reg = ["r25","t9","tp", "bsp"],// feature high-register
+ f0: freg = ["fr0","vr0"],
+ f1: freg = ["fr1","vr1"],
+ f2: freg = ["fr2","vr2"],
+ f3: freg = ["fr3","vr3"],
+ f4: freg = ["fr4","vr4"],
+ f5: freg = ["fr5","vr5"],
+ f6: freg = ["fr6","vr6"],
+ f7: freg = ["fr7","vr7"],
+ f8: freg = ["fr8","vr8"],
+ f9: freg = ["fr9","vr9"],
+ f10: freg = ["fr10","vr10"],
+ f11: freg = ["fr11","vr11"],
+ f12: freg = ["fr12","vr12"],
+ f13: freg = ["fr13","vr13"],
+ f14: freg = ["fr14","vr14"],
+ f15: freg = ["fr15","vr15"],
+ f16: freg = ["fr16","vr16"],
+ f17: freg = ["fr17","vr17"],
+ f18: freg = ["fr18","vr18"],
+ f19: freg = ["fr19","vr19"],
+ f20: freg = ["fr20","vr20"],
+ f21: freg = ["fr21","vr21"],
+ f22: freg = ["fr22","vr22"],
+ f23: freg = ["fr23","vr23"],
+ f24: freg = ["fr24","vr24"],
+ f25: freg = ["fr25","vr25"],
+ f26: freg = ["fr26","vr26"],
+ f27: freg = ["fr27","vr27"],
+ f28: freg = ["fr28","vr28"],
+ f29: freg = ["fr29","vr29"],
+ f30: freg = ["fr30","vr30"],
+ f31: freg = ["fr31","vr31"],
+ #error = ["r7", "l3"] =>
+ "the base pointer cannot be used as an operand for inline asm",
+ #error = ["r8","l4"] =>
+ "the frame pointer cannot be used as an operand for inline asm",
+ #error = ["r14","sp"] =>
+ "the stack pointer cannot be used as an operand for inline asm",
+ #error = ["r15","lr"] =>
+ "the link register cannot be used as an operand for inline asm",
+ #error = ["r31","tls"] =>
+ "reserver for tls",
+ #error = ["r28", "gb", "rgb", "rdb"] =>
+ "the global pointer cannot be used as an operand for inline asm",
+ #error = ["r26","r27","r29","tb", "rtb", "r30","svbr"] =>
+ "reserved by the ABI",
+ }
+}
+
+impl CSKYInlineAsmReg {
+ pub fn emit(
+ self,
+ out: &mut dyn fmt::Write,
+ _arch: InlineAsmArch,
+ _modifier: Option<char>,
+ ) -> fmt::Result {
+ out.write_str(self.name())
+ }
+}
diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs
index e60b8e78e..a11884bea 100644
--- a/compiler/rustc_target/src/asm/mod.rs
+++ b/compiler/rustc_target/src/asm/mod.rs
@@ -167,6 +167,7 @@ mod aarch64;
mod arm;
mod avr;
mod bpf;
+mod csky;
mod hexagon;
mod loongarch;
mod m68k;
@@ -184,6 +185,7 @@ pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
+pub use csky::{CSKYInlineAsmReg, CSKYInlineAsmRegClass};
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
pub use loongarch::{LoongArchInlineAsmReg, LoongArchInlineAsmRegClass};
pub use m68k::{M68kInlineAsmReg, M68kInlineAsmRegClass};
@@ -220,6 +222,7 @@ pub enum InlineAsmArch {
Avr,
Msp430,
M68k,
+ CSKY,
}
impl FromStr for InlineAsmArch {
@@ -238,8 +241,8 @@ impl FromStr for InlineAsmArch {
"powerpc64" => Ok(Self::PowerPC64),
"hexagon" => Ok(Self::Hexagon),
"loongarch64" => Ok(Self::LoongArch64),
- "mips" => Ok(Self::Mips),
- "mips64" => Ok(Self::Mips64),
+ "mips" | "mips32r6" => Ok(Self::Mips),
+ "mips64" | "mips64r6" => Ok(Self::Mips64),
"s390x" => Ok(Self::S390x),
"spirv" => Ok(Self::SpirV),
"wasm32" => Ok(Self::Wasm32),
@@ -248,6 +251,7 @@ impl FromStr for InlineAsmArch {
"avr" => Ok(Self::Avr),
"msp430" => Ok(Self::Msp430),
"m68k" => Ok(Self::M68k),
+ "csky" => Ok(Self::CSKY),
_ => Err(()),
}
}
@@ -272,6 +276,7 @@ pub enum InlineAsmReg {
Avr(AvrInlineAsmReg),
Msp430(Msp430InlineAsmReg),
M68k(M68kInlineAsmReg),
+ CSKY(CSKYInlineAsmReg),
// Placeholder for invalid register constraints for the current target
Err,
}
@@ -292,6 +297,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::M68k(r) => r.name(),
+ Self::CSKY(r) => r.name(),
Self::Err => "<reg>",
}
}
@@ -311,6 +317,7 @@ impl InlineAsmReg {
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
Self::M68k(r) => InlineAsmRegClass::M68k(r.reg_class()),
+ Self::CSKY(r) => InlineAsmRegClass::CSKY(r.reg_class()),
Self::Err => InlineAsmRegClass::Err,
}
}
@@ -344,6 +351,7 @@ impl InlineAsmReg {
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?),
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmReg::parse(name)?),
+ InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmReg::parse(name)?),
})
}
@@ -371,6 +379,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
+ Self::CSKY(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Err => unreachable!(),
}
}
@@ -397,6 +406,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.emit(out, arch, modifier),
Self::Msp430(r) => r.emit(out, arch, modifier),
Self::M68k(r) => r.emit(out, arch, modifier),
+ Self::CSKY(r) => r.emit(out, arch, modifier),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@@ -416,6 +426,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
Self::Msp430(_) => cb(self),
Self::M68k(_) => cb(self),
+ Self::CSKY(_) => cb(self),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@@ -440,6 +451,7 @@ pub enum InlineAsmRegClass {
Avr(AvrInlineAsmRegClass),
Msp430(Msp430InlineAsmRegClass),
M68k(M68kInlineAsmRegClass),
+ CSKY(CSKYInlineAsmRegClass),
// Placeholder for invalid register constraints for the current target
Err,
}
@@ -463,6 +475,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::M68k(r) => r.name(),
+ Self::CSKY(r) => r.name(),
Self::Err => rustc_span::symbol::sym::reg,
}
}
@@ -488,6 +501,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
Self::M68k(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::M68k),
+ Self::CSKY(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::CSKY),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -520,6 +534,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.suggest_modifier(arch, ty),
Self::Msp430(r) => r.suggest_modifier(arch, ty),
Self::M68k(r) => r.suggest_modifier(arch, ty),
+ Self::CSKY(r) => r.suggest_modifier(arch, ty),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -548,6 +563,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.default_modifier(arch),
Self::Msp430(r) => r.default_modifier(arch),
Self::M68k(r) => r.default_modifier(arch),
+ Self::CSKY(r) => r.default_modifier(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -575,6 +591,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.supported_types(arch),
Self::Msp430(r) => r.supported_types(arch),
Self::M68k(r) => r.supported_types(arch),
+ Self::CSKY(r) => r.supported_types(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -607,6 +624,7 @@ impl InlineAsmRegClass {
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
+ InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmRegClass::parse(name)?),
})
}
@@ -630,6 +648,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.valid_modifiers(arch),
Self::Msp430(r) => r.valid_modifiers(arch),
Self::M68k(r) => r.valid_modifiers(arch),
+ Self::CSKY(r) => r.valid_modifiers(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -826,6 +845,11 @@ pub fn allocatable_registers(
m68k::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
map
}
+ InlineAsmArch::CSKY => {
+ let mut map = csky::regclass_map();
+ csky::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
+ map
+ }
}
}
diff --git a/compiler/rustc_target/src/json.rs b/compiler/rustc_target/src/json.rs
index 75bb76a9d..af455b643 100644
--- a/compiler/rustc_target/src/json.rs
+++ b/compiler/rustc_target/src/json.rs
@@ -92,6 +92,7 @@ impl<A: ToJson> ToJson for Option<A> {
impl ToJson for crate::abi::call::Conv {
fn to_json(&self) -> Json {
+ let buf: String;
let s = match self {
Self::C => "C",
Self::Rust => "Rust",
@@ -110,6 +111,10 @@ impl ToJson for crate::abi::call::Conv {
Self::AmdGpuKernel => "AmdGpuKernel",
Self::AvrInterrupt => "AvrInterrupt",
Self::AvrNonBlockingInterrupt => "AvrNonBlockingInterrupt",
+ Self::RiscvInterrupt { kind } => {
+ buf = format!("RiscvInterrupt({})", kind.as_str());
+ &buf
+ }
};
Json::String(s.to_owned())
}
diff --git a/compiler/rustc_target/src/lib.rs b/compiler/rustc_target/src/lib.rs
index a7b54766b..b52002b12 100644
--- a/compiler/rustc_target/src/lib.rs
+++ b/compiler/rustc_target/src/lib.rs
@@ -12,12 +12,14 @@
#![feature(associated_type_bounds)]
#![feature(exhaustive_patterns)]
#![feature(iter_intersperse)]
+#![feature(let_chains)]
#![feature(min_specialization)]
#![feature(never_type)]
#![feature(rustc_attrs)]
#![feature(step_trait)]
#![deny(rustc::untranslatable_diagnostic)]
#![deny(rustc::diagnostic_outside_of_impl)]
+#![cfg_attr(not(bootstrap), allow(internal_features))]
use std::path::{Path, PathBuf};
diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_hermit.rs b/compiler/rustc_target/src/spec/aarch64_unknown_hermit.rs
index 87e8d6270..2414867be 100644
--- a/compiler/rustc_target/src/spec/aarch64_unknown_hermit.rs
+++ b/compiler/rustc_target/src/spec/aarch64_unknown_hermit.rs
@@ -1,15 +1,15 @@
-use crate::spec::Target;
+use crate::spec::{Target, TargetOptions};
pub fn target() -> Target {
- let mut base = super::hermit_base::opts();
- base.max_atomic_width = Some(128);
- base.features = "+v8a,+strict-align,+neon,+fp-armv8".into();
-
Target {
llvm_target: "aarch64-unknown-hermit".into(),
pointer_width: 64,
- data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(),
arch: "aarch64".into(),
- options: base,
+ data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(),
+ options: TargetOptions {
+ features: "+v8a,+strict-align,+neon,+fp-armv8".into(),
+ max_atomic_width: Some(128),
+ ..super::hermit_base::opts()
+ },
}
}
diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs
index bf1b089f6..c8f3db00e 100644
--- a/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs
+++ b/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs
@@ -3,9 +3,7 @@ use crate::spec::{Target, TargetOptions};
use super::SanitizerSet;
pub fn target() -> Target {
- let mut base = super::linux_musl_base::opts();
- base.env = "ohos".into();
- base.crt_static_default = false;
+ let mut base = super::linux_ohos_base::opts();
base.max_atomic_width = Some(128);
Target {
@@ -17,8 +15,6 @@ pub fn target() -> Target {
options: TargetOptions {
features: "+reserve-x18".into(),
mcount: "\u{1}_mcount".into(),
- force_emulated_tls: true,
- has_thread_local: false,
supported_sanitizers: SanitizerSet::ADDRESS
| SanitizerSet::CFI
| SanitizerSet::LEAK
diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_teeos.rs b/compiler/rustc_target/src/spec/aarch64_unknown_teeos.rs
new file mode 100644
index 000000000..64a7dc681
--- /dev/null
+++ b/compiler/rustc_target/src/spec/aarch64_unknown_teeos.rs
@@ -0,0 +1,16 @@
+use crate::spec::Target;
+
+pub fn target() -> Target {
+ let mut base = super::teeos_base::opts();
+ base.features = "+strict-align,+neon,+fp-armv8".into();
+ base.max_atomic_width = Some(128);
+ base.linker = Some("aarch64-linux-gnu-ld".into());
+
+ Target {
+ llvm_target: "aarch64-unknown-none".into(),
+ pointer_width: 64,
+ data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(),
+ arch: "aarch64".into(),
+ options: base,
+ }
+}
diff --git a/compiler/rustc_target/src/spec/abi.rs b/compiler/rustc_target/src/spec/abi.rs
index eb3f66ac3..550cdf6bd 100644
--- a/compiler/rustc_target/src/spec/abi.rs
+++ b/compiler/rustc_target/src/spec/abi.rs
@@ -38,6 +38,8 @@ pub enum Abi {
PlatformIntrinsic,
Unadjusted,
RustCold,
+ RiscvInterruptM,
+ RiscvInterruptS,
}
impl Abi {
@@ -107,11 +109,29 @@ const AbiDatas: &[AbiData] = &[
AbiData { abi: Abi::PlatformIntrinsic, name: "platform-intrinsic" },
AbiData { abi: Abi::Unadjusted, name: "unadjusted" },
AbiData { abi: Abi::RustCold, name: "rust-cold" },
+ AbiData { abi: Abi::RiscvInterruptM, name: "riscv-interrupt-m" },
+ AbiData { abi: Abi::RiscvInterruptS, name: "riscv-interrupt-s" },
];
+#[derive(Copy, Clone, Debug)]
+pub enum AbiUnsupported {
+ Unrecognized,
+ Reason { explain: &'static str },
+}
+
/// Returns the ABI with the given name (if any).
-pub fn lookup(name: &str) -> Option<Abi> {
- AbiDatas.iter().find(|abi_data| name == abi_data.name).map(|&x| x.abi)
+pub fn lookup(name: &str) -> Result<Abi, AbiUnsupported> {
+ AbiDatas.iter().find(|abi_data| name == abi_data.name).map(|&x| x.abi).ok_or_else(|| match name {
+ "riscv-interrupt" => AbiUnsupported::Reason {
+ explain: "please use one of riscv-interrupt-m or riscv-interrupt-s for machine- or supervisor-level interrupts, respectively",
+ },
+ "riscv-interrupt-u" => AbiUnsupported::Reason {
+ explain: "user-mode interrupt handlers have been removed from LLVM pending standardization, see: https://reviews.llvm.org/D149314",
+ },
+
+ _ => AbiUnsupported::Unrecognized,
+
+ })
}
pub fn all_names() -> Vec<&'static str> {
@@ -150,7 +170,8 @@ pub fn is_stable(name: &str) -> Result<(), AbiDisabled> {
// Stable
"Rust" | "C" | "C-unwind" | "cdecl" | "cdecl-unwind" | "stdcall" | "stdcall-unwind"
| "fastcall" | "fastcall-unwind" | "aapcs" | "aapcs-unwind" | "win64" | "win64-unwind"
- | "sysv64" | "sysv64-unwind" | "system" | "system-unwind" | "efiapi" => Ok(()),
+ | "sysv64" | "sysv64-unwind" | "system" | "system-unwind" | "efiapi" | "thiscall"
+ | "thiscall-unwind" => Ok(()),
"rust-intrinsic" => Err(AbiDisabled::Unstable {
feature: sym::intrinsics,
explain: "intrinsics are subject to change",
@@ -167,14 +188,6 @@ pub fn is_stable(name: &str) -> Result<(), AbiDisabled> {
feature: sym::abi_vectorcall,
explain: "vectorcall-unwind ABI is experimental and subject to change",
}),
- "thiscall" => Err(AbiDisabled::Unstable {
- feature: sym::abi_thiscall,
- explain: "thiscall is experimental and subject to change",
- }),
- "thiscall-unwind" => Err(AbiDisabled::Unstable {
- feature: sym::abi_thiscall,
- explain: "thiscall-unwind ABI is experimental and subject to change",
- }),
"rust-call" => Err(AbiDisabled::Unstable {
feature: sym::unboxed_closures,
explain: "rust-call ABI is subject to change",
@@ -207,6 +220,10 @@ pub fn is_stable(name: &str) -> Result<(), AbiDisabled> {
feature: sym::abi_avr_interrupt,
explain: "avr-interrupt and avr-non-blocking-interrupt ABIs are experimental and subject to change",
}),
+ "riscv-interrupt-m" | "riscv-interrupt-s" => Err(AbiDisabled::Unstable {
+ feature: sym::abi_riscv_interrupt,
+ explain: "riscv-interrupt ABIs are experimental and subject to change",
+ }),
"C-cmse-nonsecure-call" => Err(AbiDisabled::Unstable {
feature: sym::abi_c_cmse_nonsecure_call,
explain: "C-cmse-nonsecure-call ABI is experimental and subject to change",
@@ -267,6 +284,8 @@ impl Abi {
PlatformIntrinsic => 32,
Unadjusted => 33,
RustCold => 34,
+ RiscvInterruptM => 35,
+ RiscvInterruptS => 36,
};
debug_assert!(
AbiDatas
diff --git a/compiler/rustc_target/src/spec/abi/tests.rs b/compiler/rustc_target/src/spec/abi/tests.rs
index 8bea5e5ef..251a12fe7 100644
--- a/compiler/rustc_target/src/spec/abi/tests.rs
+++ b/compiler/rustc_target/src/spec/abi/tests.rs
@@ -4,19 +4,19 @@ use super::*;
#[test]
fn lookup_Rust() {
let abi = lookup("Rust");
- assert!(abi.is_some() && abi.unwrap().data().name == "Rust");
+ assert!(abi.is_ok() && abi.unwrap().data().name == "Rust");
}
#[test]
fn lookup_cdecl() {
let abi = lookup("cdecl");
- assert!(abi.is_some() && abi.unwrap().data().name == "cdecl");
+ assert!(abi.is_ok() && abi.unwrap().data().name == "cdecl");
}
#[test]
fn lookup_baz() {
let abi = lookup("baz");
- assert!(abi.is_none());
+ assert!(matches!(abi, Err(AbiUnsupported::Unrecognized)))
}
#[test]
diff --git a/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabi.rs
index c0f1827ad..400030ca0 100644
--- a/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabi.rs
@@ -11,6 +11,7 @@ pub fn target() -> Target {
features: "+strict-align,+v6".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
..super::linux_gnu_base::opts()
},
}
diff --git a/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabihf.rs
index 79b8958c2..6228fb15a 100644
--- a/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabihf.rs
+++ b/compiler/rustc_target/src/spec/arm_unknown_linux_gnueabihf.rs
@@ -11,6 +11,7 @@ pub fn target() -> Target {
features: "+strict-align,+v6,+vfp2,-d32".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
..super::linux_gnu_base::opts()
},
}
diff --git a/compiler/rustc_target/src/spec/armeb_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/armeb_unknown_linux_gnueabi.rs
index 4836f3cf7..1d66515a7 100644
--- a/compiler/rustc_target/src/spec/armeb_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/armeb_unknown_linux_gnueabi.rs
@@ -13,6 +13,7 @@ pub fn target() -> Target {
endian: Endian::Big,
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
..super::linux_gnu_base::opts()
},
}
diff --git a/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs b/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs
index 5632bcfce..446efa90d 100644
--- a/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs
@@ -5,7 +5,7 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, Targ
pub fn target() -> Target {
Target {
- llvm_target: "armebv7r-unknown-none-eabi".into(),
+ llvm_target: "armebv7r-none-eabi".into(),
pointer_width: 32,
data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
@@ -18,7 +18,7 @@ pub fn target() -> Target {
panic_strategy: PanicStrategy::Abort,
max_atomic_width: Some(64),
emit_debug_gdb_scripts: false,
- // GCC and Clang default to 8 for arm-none here
+ // GCC defaults to 8 for arm-none here.
c_enum_min_bits: Some(8),
..Default::default()
},
diff --git a/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs
index 2815de358..0c9e99ff8 100644
--- a/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs
@@ -5,7 +5,7 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, Targ
pub fn target() -> Target {
Target {
- llvm_target: "armebv7r-unknown-none-eabihf".into(),
+ llvm_target: "armebv7r-none-eabihf".into(),
pointer_width: 32,
data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
@@ -19,7 +19,7 @@ pub fn target() -> Target {
features: "+vfp3,-d32,-fp16".into(),
max_atomic_width: Some(64),
emit_debug_gdb_scripts: false,
- // GCC and Clang default to 8 for arm-none here
+ // GCC defaults to 8 for arm-none here.
c_enum_min_bits: Some(8),
..Default::default()
},
diff --git a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs
index d0f988b27..44fdd3178 100644
--- a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs
@@ -39,9 +39,9 @@ pub fn target() -> Target {
has_thumb_interworking: true,
relocation_model: RelocModel::Static,
panic_strategy: PanicStrategy::Abort,
- // from thumb_base, rust-lang/rust#44993.
+ // From thumb_base, rust-lang/rust#44993.
emit_debug_gdb_scripts: false,
- // from thumb_base, apparently gcc/clang give enums a minimum of 8 bits on no-os targets
+ // From thumb_base, GCC gives enums a minimum of 8 bits on no-os targets.
c_enum_min_bits: Some(8),
..Default::default()
},
diff --git a/compiler/rustc_target/src/spec/armv4t_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/armv4t_unknown_linux_gnueabi.rs
index 1de63a920..cffebcc95 100644
--- a/compiler/rustc_target/src/spec/armv4t_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/armv4t_unknown_linux_gnueabi.rs
@@ -12,6 +12,7 @@ pub fn target() -> Target {
// Atomic operations provided by compiler-builtins
max_atomic_width: Some(32),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
has_thumb_interworking: true,
..super::linux_gnu_base::opts()
},
diff --git a/compiler/rustc_target/src/spec/armv6_unknown_freebsd.rs b/compiler/rustc_target/src/spec/armv6_unknown_freebsd.rs
index b7cfccc8b..4a8aa3157 100644
--- a/compiler/rustc_target/src/spec/armv6_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/armv6_unknown_freebsd.rs
@@ -13,6 +13,7 @@ pub fn target() -> Target {
features: "+v6,+vfp2,-d32".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
..super::freebsd_base::opts()
},
}
diff --git a/compiler/rustc_target/src/spec/armv7_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/armv7_unknown_linux_gnueabi.rs
index 903042d7e..73ae212a7 100644
--- a/compiler/rustc_target/src/spec/armv7_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/armv7_unknown_linux_gnueabi.rs
@@ -14,6 +14,7 @@ pub fn target() -> Target {
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
+ llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()),
..super::linux_gnu_base::opts()
},
}
diff --git a/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs
index 16da24533..e9b0bda68 100644
--- a/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs
+++ b/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs
@@ -17,12 +17,8 @@ pub fn target() -> Target {
abi: "eabi".into(),
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
- env: "ohos".into(),
- crt_static_default: false,
mcount: "\u{1}mcount".into(),
- force_emulated_tls: true,
- has_thread_local: false,
- ..super::linux_musl_base::opts()
+ ..super::linux_ohos_base::opts()
},
}
}
diff --git a/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs b/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs
index 8cdf3c36b..c134f3e09 100644
--- a/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs
@@ -18,7 +18,7 @@ pub fn target() -> Target {
max_atomic_width: Some(64),
panic_strategy: PanicStrategy::Abort,
emit_debug_gdb_scripts: false,
- // GCC and Clang default to 8 for arm-none here
+ // GCC defaults to 8 for arm-none here.
c_enum_min_bits: Some(8),
..Default::default()
};
diff --git a/compiler/rustc_target/src/spec/armv7r_none_eabi.rs b/compiler/rustc_target/src/spec/armv7r_none_eabi.rs
index 74905ed5a..68b252798 100644
--- a/compiler/rustc_target/src/spec/armv7r_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/armv7r_none_eabi.rs
@@ -4,7 +4,7 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, Targ
pub fn target() -> Target {
Target {
- llvm_target: "armv7r-unknown-none-eabi".into(),
+ llvm_target: "armv7r-none-eabi".into(),
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
@@ -17,7 +17,7 @@ pub fn target() -> Target {
panic_strategy: PanicStrategy::Abort,
max_atomic_width: Some(64),
emit_debug_gdb_scripts: false,
- // GCC and Clang default to 8 for arm-none here
+ // GCC defaults to 8 for arm-none here.
c_enum_min_bits: Some(8),
..Default::default()
},
diff --git a/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs
index 516b3f5c1..909765a31 100644
--- a/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs
@@ -4,7 +4,7 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, Targ
pub fn target() -> Target {
Target {
- llvm_target: "armv7r-unknown-none-eabihf".into(),
+ llvm_target: "armv7r-none-eabihf".into(),
pointer_width: 32,
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
@@ -18,7 +18,7 @@ pub fn target() -> Target {
features: "+vfp3,-d32,-fp16".into(),
max_atomic_width: Some(64),
emit_debug_gdb_scripts: false,
- // GCC and Clang default to 8 for arm-none here
+ // GCC defaults to 8 for arm-none here.
c_enum_min_bits: Some(8),
..Default::default()
},
diff --git a/compiler/rustc_target/src/spec/avr_gnu_base.rs b/compiler/rustc_target/src/spec/avr_gnu_base.rs
index fbec44b71..cd324c94b 100644
--- a/compiler/rustc_target/src/spec/avr_gnu_base.rs
+++ b/compiler/rustc_target/src/spec/avr_gnu_base.rs
@@ -23,7 +23,7 @@ pub fn target(target_cpu: &'static str, mmcu: &'static str) -> Target {
LinkerFlavor::Gnu(Cc::Yes, Lld::No),
&["-lgcc"],
),
- max_atomic_width: Some(0),
+ max_atomic_width: Some(16),
atomic_cas: false,
relocation_model: RelocModel::Static,
..TargetOptions::default()
diff --git a/compiler/rustc_target/src/spec/csky_unknown_linux_gnuabiv2.rs b/compiler/rustc_target/src/spec/csky_unknown_linux_gnuabiv2.rs
new file mode 100644
index 000000000..7d03dd26f
--- /dev/null
+++ b/compiler/rustc_target/src/spec/csky_unknown_linux_gnuabiv2.rs
@@ -0,0 +1,20 @@
+use crate::spec::{Cc, LinkerFlavor, Lld, Target, TargetOptions};
+
+// This target is for glibc Linux on Csky
+
+pub fn target() -> Target {
+ Target {
+ //https://github.com/llvm/llvm-project/blob/8b76aea8d8b1b71f6220bc2845abc749f18a19b7/clang/lib/Basic/Targets/CSKY.h
+ llvm_target: "csky-unknown-linux-gnuabiv2".into(),
+ pointer_width: 32,
+ data_layout: "e-m:e-S32-p:32:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:32-v128:32:32-a:0:32-Fi32-n32".into(),
+ arch: "csky".into(),
+ options: TargetOptions {
+ abi: "abiv2".into(),
+ features: "+2e3,+3e7,+7e10,+cache,+dsp1e2,+dspe60,+e1,+e2,+edsp,+elrw,+hard-tp,+high-registers,+hwdiv,+mp,+mp1e2,+nvic,+trust".into(),
+ late_link_args_static: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-l:libatomic.a"]),
+ max_atomic_width: Some(32),
+ ..super::linux_gnu_base::opts()
+ },
+ }
+}
diff --git a/compiler/rustc_target/src/spec/hermit_base.rs b/compiler/rustc_target/src/spec/hermit_base.rs
index dd9991381..c6e98fc1a 100644
--- a/compiler/rustc_target/src/spec/hermit_base.rs
+++ b/compiler/rustc_target/src/spec/hermit_base.rs
@@ -1,21 +1,15 @@
use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, TargetOptions, TlsModel};
pub fn opts() -> TargetOptions {
- let pre_link_args = TargetOptions::link_args(
- LinkerFlavor::Gnu(Cc::No, Lld::No),
- &["--build-id", "--hash-style=gnu", "--Bstatic"],
- );
-
TargetOptions {
os: "hermit".into(),
- linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
- has_thread_local: true,
- pre_link_args,
- panic_strategy: PanicStrategy::Abort,
+ linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
+ tls_model: TlsModel::InitialExec,
position_independent_executables: true,
static_position_independent_executables: true,
- tls_model: TlsModel::InitialExec,
+ has_thread_local: true,
+ panic_strategy: PanicStrategy::Abort,
..Default::default()
}
}
diff --git a/compiler/rustc_target/src/spec/linux_ohos_base.rs b/compiler/rustc_target/src/spec/linux_ohos_base.rs
new file mode 100644
index 000000000..4ad4c8373
--- /dev/null
+++ b/compiler/rustc_target/src/spec/linux_ohos_base.rs
@@ -0,0 +1,12 @@
+use crate::spec::TargetOptions;
+
+pub fn opts() -> TargetOptions {
+ let mut base = super::linux_base::opts();
+
+ base.env = "ohos".into();
+ base.crt_static_default = false;
+ base.force_emulated_tls = true;
+ base.has_thread_local = false;
+
+ base
+}
diff --git a/compiler/rustc_target/src/spec/loongarch64_unknown_none.rs b/compiler/rustc_target/src/spec/loongarch64_unknown_none.rs
index 209d481d6..dbc96d68e 100644
--- a/compiler/rustc_target/src/spec/loongarch64_unknown_none.rs
+++ b/compiler/rustc_target/src/spec/loongarch64_unknown_none.rs
@@ -10,7 +10,8 @@ pub fn target() -> Target {
options: TargetOptions {
cpu: "generic".into(),
features: "+f,+d".into(),
- linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::No),
+ linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
+ linker: Some("rust-lld".into()),
llvm_abiname: "lp64d".into(),
max_atomic_width: Some(64),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/loongarch64_unknown_none_softfloat.rs b/compiler/rustc_target/src/spec/loongarch64_unknown_none_softfloat.rs
index f444a7f24..c4d5c7bc4 100644
--- a/compiler/rustc_target/src/spec/loongarch64_unknown_none_softfloat.rs
+++ b/compiler/rustc_target/src/spec/loongarch64_unknown_none_softfloat.rs
@@ -11,7 +11,8 @@ pub fn target() -> Target {
cpu: "generic".into(),
features: "-f,-d".into(),
abi: "softfloat".into(),
- linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::No),
+ linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
+ linker: Some("rust-lld".into()),
llvm_abiname: "lp64s".into(),
max_atomic_width: Some(64),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs
index 1e066b271..983a449b0 100644
--- a/compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs
@@ -6,7 +6,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa32r6-unknown-linux-gnu".into(),
pointer_width: 32,
data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
- arch: "mips".into(),
+ arch: "mips32r6".into(),
options: TargetOptions {
endian: Endian::Big,
cpu: "mips32r6".into(),
diff --git a/compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs
index 4785929c1..ec0facdfb 100644
--- a/compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs
@@ -5,7 +5,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa32r6el-unknown-linux-gnu".into(),
pointer_width: 32,
data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
- arch: "mips".into(),
+ arch: "mips32r6".into(),
options: TargetOptions {
cpu: "mips32r6".into(),
diff --git a/compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs
index 766ac7680..16dd1c416 100644
--- a/compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs
+++ b/compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs
@@ -6,7 +6,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa64r6-unknown-linux-gnuabi64".into(),
pointer_width: 64,
data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
- arch: "mips64".into(),
+ arch: "mips64r6".into(),
options: TargetOptions {
abi: "abi64".into(),
endian: Endian::Big,
diff --git a/compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs
index d2b07c654..8d0a6aa8f 100644
--- a/compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs
+++ b/compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs
@@ -5,7 +5,7 @@ pub fn target() -> Target {
llvm_target: "mipsisa64r6el-unknown-linux-gnuabi64".into(),
pointer_width: 64,
data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
- arch: "mips64".into(),
+ arch: "mips64r6".into(),
options: TargetOptions {
abi: "abi64".into(),
// NOTE(mips64r6) matches C toolchain
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs
index 2365dfaf1..31b6961bb 100644
--- a/compiler/rustc_target/src/spec/mod.rs
+++ b/compiler/rustc_target/src/spec/mod.rs
@@ -42,7 +42,7 @@ use crate::spec::crt_objects::{CrtObjects, LinkSelfContainedDefault};
use rustc_data_structures::stable_hasher::{HashStable, StableHasher};
use rustc_fs_util::try_canonicalize;
use rustc_serialize::{Decodable, Decoder, Encodable, Encoder};
-use rustc_span::symbol::{sym, Symbol};
+use rustc_span::symbol::{kw, sym, Symbol};
use serde_json::Value;
use std::borrow::Cow;
use std::collections::BTreeMap;
@@ -74,6 +74,7 @@ mod l4re_base;
mod linux_base;
mod linux_gnu_base;
mod linux_musl_base;
+mod linux_ohos_base;
mod linux_uclibc_base;
mod msvc_base;
mod netbsd_base;
@@ -82,8 +83,10 @@ mod openbsd_base;
mod redox_base;
mod solaris_base;
mod solid_base;
+mod teeos_base;
mod thumb_base;
mod uefi_msvc_base;
+mod unikraft_linux_musl_base;
mod vxworks_base;
mod wasm_base;
mod windows_gnu_base;
@@ -335,7 +338,7 @@ impl LinkerFlavor {
|| stem == "clang++"
|| stem.ends_with("-clang++")
{
- (Some(Cc::Yes), None)
+ (Some(Cc::Yes), Some(Lld::No))
} else if stem == "wasm-ld"
|| stem.ends_with("-wasm-ld")
|| stem == "ld.lld"
@@ -652,6 +655,43 @@ pub enum RelocModel {
RopiRwpi,
}
+impl RelocModel {
+ pub fn desc(&self) -> &str {
+ match *self {
+ RelocModel::Static => "static",
+ RelocModel::Pic => "pic",
+ RelocModel::Pie => "pie",
+ RelocModel::DynamicNoPic => "dynamic-no-pic",
+ RelocModel::Ropi => "ropi",
+ RelocModel::Rwpi => "rwpi",
+ RelocModel::RopiRwpi => "ropi-rwpi",
+ }
+ }
+ pub const fn desc_symbol(&self) -> Symbol {
+ match *self {
+ RelocModel::Static => kw::Static,
+ RelocModel::Pic => sym::pic,
+ RelocModel::Pie => sym::pie,
+ RelocModel::DynamicNoPic => sym::dynamic_no_pic,
+ RelocModel::Ropi => sym::ropi,
+ RelocModel::Rwpi => sym::rwpi,
+ RelocModel::RopiRwpi => sym::ropi_rwpi,
+ }
+ }
+
+ pub const fn all() -> [Symbol; 7] {
+ [
+ RelocModel::Static.desc_symbol(),
+ RelocModel::Pic.desc_symbol(),
+ RelocModel::Pie.desc_symbol(),
+ RelocModel::DynamicNoPic.desc_symbol(),
+ RelocModel::Ropi.desc_symbol(),
+ RelocModel::Rwpi.desc_symbol(),
+ RelocModel::RopiRwpi.desc_symbol(),
+ ]
+ }
+}
+
impl FromStr for RelocModel {
type Err = ();
@@ -671,16 +711,7 @@ impl FromStr for RelocModel {
impl ToJson for RelocModel {
fn to_json(&self) -> Json {
- match *self {
- RelocModel::Static => "static",
- RelocModel::Pic => "pic",
- RelocModel::Pie => "pie",
- RelocModel::DynamicNoPic => "dynamic-no-pic",
- RelocModel::Ropi => "ropi",
- RelocModel::Rwpi => "rwpi",
- RelocModel::RopiRwpi => "ropi-rwpi",
- }
- .to_json()
+ self.desc().to_json()
}
}
@@ -1243,6 +1274,7 @@ supported_targets! {
("i586-unknown-linux-gnu", i586_unknown_linux_gnu),
("loongarch64-unknown-linux-gnu", loongarch64_unknown_linux_gnu),
("m68k-unknown-linux-gnu", m68k_unknown_linux_gnu),
+ ("csky-unknown-linux-gnuabiv2", csky_unknown_linux_gnuabiv2),
("mips-unknown-linux-gnu", mips_unknown_linux_gnu),
("mips64-unknown-linux-gnuabi64", mips64_unknown_linux_gnuabi64),
("mips64el-unknown-linux-gnuabi64", mips64el_unknown_linux_gnuabi64),
@@ -1298,6 +1330,7 @@ supported_targets! {
("armv7-linux-androideabi", armv7_linux_androideabi),
("thumbv7neon-linux-androideabi", thumbv7neon_linux_androideabi),
("aarch64-linux-android", aarch64_linux_android),
+ ("riscv64-linux-android", riscv64_linux_android),
("aarch64-unknown-freebsd", aarch64_unknown_freebsd),
("armv6-unknown-freebsd", armv6_unknown_freebsd),
@@ -1401,6 +1434,7 @@ supported_targets! {
("wasm32-unknown-emscripten", wasm32_unknown_emscripten),
("wasm32-unknown-unknown", wasm32_unknown_unknown),
("wasm32-wasi", wasm32_wasi),
+ ("wasm32-wasi-preview1-threads", wasm32_wasi_preview1_threads),
("wasm64-unknown-unknown", wasm64_unknown_unknown),
("thumbv6m-none-eabi", thumbv6m_none_eabi),
@@ -1417,8 +1451,11 @@ supported_targets! {
("msp430-none-elf", msp430_none_elf),
("aarch64-unknown-hermit", aarch64_unknown_hermit),
+ ("riscv64gc-unknown-hermit", riscv64gc_unknown_hermit),
("x86_64-unknown-hermit", x86_64_unknown_hermit),
+ ("x86_64-unikraft-linux-musl", x86_64_unikraft_linux_musl),
+
("riscv32i-unknown-none-elf", riscv32i_unknown_none_elf),
("riscv32im-unknown-none-elf", riscv32im_unknown_none_elf),
("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
@@ -1433,6 +1470,8 @@ supported_targets! {
("riscv64gc-unknown-linux-gnu", riscv64gc_unknown_linux_gnu),
("riscv64gc-unknown-linux-musl", riscv64gc_unknown_linux_musl),
+ ("sparc-unknown-none-elf", sparc_unknown_none_elf),
+
("loongarch64-unknown-none", loongarch64_unknown_none),
("loongarch64-unknown-none-softfloat", loongarch64_unknown_none_softfloat),
@@ -1485,6 +1524,8 @@ supported_targets! {
("x86_64-unknown-none", x86_64_unknown_none),
+ ("aarch64-unknown-teeos", aarch64_unknown_teeos),
+
("mips64-openwrt-linux-musl", mips64_openwrt_linux_musl),
("aarch64-unknown-nto-qnx710", aarch64_unknown_nto_qnx_710),
@@ -1493,6 +1534,7 @@ supported_targets! {
("aarch64-unknown-linux-ohos", aarch64_unknown_linux_ohos),
("armv7-unknown-linux-ohos", armv7_unknown_linux_ohos),
+ ("x86_64-unknown-linux-ohos", x86_64_unknown_linux_ohos),
}
/// Cow-Vec-Str: Cow<'static, [Cow<'static, str>]>
@@ -1908,6 +1950,9 @@ pub struct TargetOptions {
/// Use platform dependent mcount function
pub mcount: StaticCow<str>,
+ /// Use LLVM intrinsic for mcount function name
+ pub llvm_mcount_intrinsic: Option<StaticCow<str>>,
+
/// LLVM ABI name, corresponds to the '-mabi' parameter available in multilib C compilers
pub llvm_abiname: StaticCow<str>,
@@ -2169,6 +2214,7 @@ impl Default for TargetOptions {
override_export_symbols: None,
merge_functions: MergeFunctions::Aliases,
mcount: "mcount".into(),
+ llvm_mcount_intrinsic: None,
llvm_abiname: "".into(),
relax_elf_relocations: false,
llvm_args: cvs![],
@@ -2257,6 +2303,7 @@ impl Target {
PtxKernel => self.arch == "nvptx64",
Msp430Interrupt => self.arch == "msp430",
AmdGpuKernel => self.arch == "amdgcn",
+ RiscvInterruptM | RiscvInterruptS => ["riscv32", "riscv64"].contains(&&self.arch[..]),
AvrInterrupt | AvrNonBlockingInterrupt => self.arch == "avr",
Wasm => ["wasm32", "wasm64"].contains(&&self.arch[..]),
Thiscall { .. } => self.arch == "x86",
@@ -2688,7 +2735,7 @@ impl Target {
let name = (stringify!($key_name)).replace("_", "-");
obj.remove(&name).and_then(|o| o.as_str().and_then(|s| {
match lookup_abi(s) {
- Some(abi) => base.$key_name = Some(abi),
+ Ok(abi) => base.$key_name = Some(abi),
_ => return Some(Err(format!("'{}' is not a valid value for abi", s))),
}
Some(Ok(()))
@@ -2825,6 +2872,7 @@ impl Target {
key!(override_export_symbols, opt_list);
key!(merge_functions, MergeFunctions)?;
key!(mcount = "target-mcount");
+ key!(llvm_mcount_intrinsic, optional);
key!(llvm_abiname);
key!(relax_elf_relocations, bool);
key!(llvm_args, list);
@@ -3081,6 +3129,7 @@ impl ToJson for Target {
target_option_val!(override_export_symbols);
target_option_val!(merge_functions);
target_option_val!(mcount, "target-mcount");
+ target_option_val!(llvm_mcount_intrinsic);
target_option_val!(llvm_abiname);
target_option_val!(relax_elf_relocations);
target_option_val!(llvm_args);
diff --git a/compiler/rustc_target/src/spec/powerpc64_ibm_aix.rs b/compiler/rustc_target/src/spec/powerpc64_ibm_aix.rs
index 34934379c..4e105a03e 100644
--- a/compiler/rustc_target/src/spec/powerpc64_ibm_aix.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_ibm_aix.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-ibm-aix".into(),
pointer_width: 64,
- data_layout: "E-m:a-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: base,
}
diff --git a/compiler/rustc_target/src/spec/powerpc64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/powerpc64_unknown_freebsd.rs
index 08b273207..e8fe55a00 100644
--- a/compiler/rustc_target/src/spec/powerpc64_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_unknown_freebsd.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-unknown-freebsd".into(),
pointer_width: 64,
- data_layout: "E-m:e-i64:64-n32:64".into(),
+ data_layout: "E-m:e-Fn32-i64:64-n32:64".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/powerpc64_unknown_linux_gnu.rs
index ce64de861..7a0cc539f 100644
--- a/compiler/rustc_target/src/spec/powerpc64_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_unknown_linux_gnu.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-unknown-linux-gnu".into(),
pointer_width: 64,
- data_layout: "E-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc64_unknown_linux_musl.rs
index 81286a668..f80b22828 100644
--- a/compiler/rustc_target/src/spec/powerpc64_unknown_linux_musl.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_unknown_linux_musl.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-unknown-linux-musl".into(),
pointer_width: 64,
- data_layout: "E-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs
index 7232dce3e..3643f7b0c 100644
--- a/compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-unknown-openbsd".into(),
pointer_width: 64,
- data_layout: "E-m:e-i64:64-n32:64".into(),
+ data_layout: "E-m:e-Fn32-i64:64-n32:64".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/powerpc64_wrs_vxworks.rs
index 10da7872c..b0472e64e 100644
--- a/compiler/rustc_target/src/spec/powerpc64_wrs_vxworks.rs
+++ b/compiler/rustc_target/src/spec/powerpc64_wrs_vxworks.rs
@@ -11,7 +11,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64-unknown-linux-gnu".into(),
pointer_width: 64,
- data_layout: "E-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64le_unknown_freebsd.rs b/compiler/rustc_target/src/spec/powerpc64le_unknown_freebsd.rs
index 8c941e106..342b1cf4f 100644
--- a/compiler/rustc_target/src/spec/powerpc64le_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc64le_unknown_freebsd.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64le-unknown-freebsd".into(),
pointer_width: 64,
- data_layout: "e-m:e-i64:64-n32:64".into(),
+ data_layout: "e-m:e-Fn32-i64:64-n32:64".into(),
arch: "powerpc64".into(),
options: TargetOptions { mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_gnu.rs
index fd896e086..815e3d278 100644
--- a/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_gnu.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64le-unknown-linux-gnu".into(),
pointer_width: 64,
- data_layout: "e-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: TargetOptions { mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_musl.rs
index 3cffcf497..0b9b78bce 100644
--- a/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_musl.rs
+++ b/compiler/rustc_target/src/spec/powerpc64le_unknown_linux_musl.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc64le-unknown-linux-musl".into(),
pointer_width: 64,
- data_layout: "e-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
+ data_layout: "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(),
arch: "powerpc64".into(),
options: TargetOptions { mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_freebsd.rs b/compiler/rustc_target/src/spec/powerpc_unknown_freebsd.rs
index 342f321bd..e036f5bdb 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_freebsd.rs
@@ -14,7 +14,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-freebsd13.0".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions {
endian: Endian::Big,
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnu.rs
index c8c61dc46..c8d6f8b9c 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnu.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-linux-gnu".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnuspe.rs b/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnuspe.rs
index 5c51ec91f..fdaa9d366 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnuspe.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_linux_gnuspe.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-linux-gnuspe".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions {
abi: "spe".into(),
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/powerpc_unknown_linux_musl.rs
index fc7d802cb..7fe708cf5 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_linux_musl.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_linux_musl.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-linux-musl".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_netbsd.rs b/compiler/rustc_target/src/spec/powerpc_unknown_netbsd.rs
index 912149c79..6f8875ba7 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_netbsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_netbsd.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-netbsd".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions { endian: Endian::Big, mcount: "__mcount".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc_unknown_openbsd.rs b/compiler/rustc_target/src/spec/powerpc_unknown_openbsd.rs
index dec85f996..280d36698 100644
--- a/compiler/rustc_target/src/spec/powerpc_unknown_openbsd.rs
+++ b/compiler/rustc_target/src/spec/powerpc_unknown_openbsd.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-openbsd".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: base,
}
diff --git a/compiler/rustc_target/src/spec/powerpc_wrs_vxworks.rs b/compiler/rustc_target/src/spec/powerpc_wrs_vxworks.rs
index a8c1c2a61..6f245e6ab 100644
--- a/compiler/rustc_target/src/spec/powerpc_wrs_vxworks.rs
+++ b/compiler/rustc_target/src/spec/powerpc_wrs_vxworks.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-linux-gnu".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions { endian: Endian::Big, features: "+secure-plt".into(), ..base },
}
diff --git a/compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs b/compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs
index abb8d13da..1d5a5e5c6 100644
--- a/compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs
+++ b/compiler/rustc_target/src/spec/powerpc_wrs_vxworks_spe.rs
@@ -10,7 +10,7 @@ pub fn target() -> Target {
Target {
llvm_target: "powerpc-unknown-linux-gnuspe".into(),
pointer_width: 32,
- data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
+ data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(),
arch: "powerpc".into(),
options: TargetOptions {
abi: "spe".into(),
diff --git a/compiler/rustc_target/src/spec/riscv64_linux_android.rs b/compiler/rustc_target/src/spec/riscv64_linux_android.rs
new file mode 100644
index 000000000..af0d68554
--- /dev/null
+++ b/compiler/rustc_target/src/spec/riscv64_linux_android.rs
@@ -0,0 +1,19 @@
+use crate::spec::{CodeModel, SanitizerSet, Target, TargetOptions};
+
+pub fn target() -> Target {
+ Target {
+ llvm_target: "riscv64-linux-android".into(),
+ pointer_width: 64,
+ data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
+ arch: "riscv64".into(),
+ options: TargetOptions {
+ code_model: Some(CodeModel::Medium),
+ cpu: "generic-rv64".into(),
+ features: "+m,+a,+f,+d,+c".into(),
+ llvm_abiname: "lp64d".into(),
+ supported_sanitizers: SanitizerSet::ADDRESS,
+ max_atomic_width: Some(64),
+ ..super::android_base::opts()
+ },
+ }
+}
diff --git a/compiler/rustc_target/src/spec/riscv64gc_unknown_hermit.rs b/compiler/rustc_target/src/spec/riscv64gc_unknown_hermit.rs
new file mode 100644
index 000000000..1f6a34c0c
--- /dev/null
+++ b/compiler/rustc_target/src/spec/riscv64gc_unknown_hermit.rs
@@ -0,0 +1,20 @@
+use crate::spec::{CodeModel, RelocModel, Target, TargetOptions, TlsModel};
+
+pub fn target() -> Target {
+ Target {
+ llvm_target: "riscv64-unknown-hermit".into(),
+ pointer_width: 64,
+ arch: "riscv64".into(),
+ data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
+ options: TargetOptions {
+ cpu: "generic-rv64".into(),
+ features: "+m,+a,+f,+d,+c".into(),
+ relocation_model: RelocModel::Pic,
+ code_model: Some(CodeModel::Medium),
+ tls_model: TlsModel::LocalExec,
+ max_atomic_width: Some(64),
+ llvm_abiname: "lp64d".into(),
+ ..super::hermit_base::opts()
+ },
+ }
+}
diff --git a/compiler/rustc_target/src/spec/sparc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/sparc_unknown_linux_gnu.rs
index 12968abda..b10e6264b 100644
--- a/compiler/rustc_target/src/spec/sparc_unknown_linux_gnu.rs
+++ b/compiler/rustc_target/src/spec/sparc_unknown_linux_gnu.rs
@@ -5,7 +5,7 @@ pub fn target() -> Target {
let mut base = super::linux_gnu_base::opts();
base.endian = Endian::Big;
base.cpu = "v9".into();
- base.max_atomic_width = Some(64);
+ base.max_atomic_width = Some(32);
base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mv8plus"]);
Target {
diff --git a/compiler/rustc_target/src/spec/sparc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/sparc_unknown_none_elf.rs
new file mode 100644
index 000000000..7e908a0f3
--- /dev/null
+++ b/compiler/rustc_target/src/spec/sparc_unknown_none_elf.rs
@@ -0,0 +1,27 @@
+use crate::abi::Endian;
+use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+
+pub fn target() -> Target {
+ let options = TargetOptions {
+ linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
+ linker: Some("sparc-elf-gcc".into()),
+ endian: Endian::Big,
+ cpu: "v7".into(),
+ abi: "elf".into(),
+ max_atomic_width: Some(32),
+ atomic_cas: true,
+ panic_strategy: PanicStrategy::Abort,
+ relocation_model: RelocModel::Static,
+ no_default_libraries: false,
+ emit_debug_gdb_scripts: false,
+ eh_frame_header: false,
+ ..Default::default()
+ };
+ Target {
+ data_layout: "E-m:e-p:32:32-i64:64-f128:64-n32-S64".into(),
+ llvm_target: "sparc-unknown-none-elf".into(),
+ pointer_width: 32,
+ arch: "sparc".into(),
+ options,
+ }
+}
diff --git a/compiler/rustc_target/src/spec/teeos_base.rs b/compiler/rustc_target/src/spec/teeos_base.rs
new file mode 100644
index 000000000..1bc71bab0
--- /dev/null
+++ b/compiler/rustc_target/src/spec/teeos_base.rs
@@ -0,0 +1,29 @@
+use super::{Cc, LinkerFlavor, Lld, PanicStrategy};
+use crate::spec::{RelroLevel, TargetOptions};
+
+pub fn opts() -> TargetOptions {
+ let lld_args = &["-zmax-page-size=4096", "-znow", "-ztext", "--execute-only"];
+ let cc_args = &["-Wl,-zmax-page-size=4096", "-Wl,-znow", "-Wl,-ztext", "-mexecute-only"];
+
+ let mut pre_link_args = TargetOptions::link_args(LinkerFlavor::Gnu(Cc::No, Lld::No), lld_args);
+ super::add_link_args(&mut pre_link_args, LinkerFlavor::Gnu(Cc::Yes, Lld::No), cc_args);
+
+ TargetOptions {
+ os: "teeos".into(),
+ vendor: "unknown".into(),
+ dynamic_linking: true,
+ linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
+ // rpath hardcodes -Wl, so it can't be used together with ld.lld.
+ // C TAs also don't support rpath, so this is fine.
+ has_rpath: false,
+ // Note: Setting has_thread_local to true causes an error when
+ // loading / dyn-linking the TA
+ has_thread_local: false,
+ position_independent_executables: true,
+ relro_level: RelroLevel::Full,
+ crt_static_respected: true,
+ pre_link_args,
+ panic_strategy: PanicStrategy::Abort,
+ ..Default::default()
+ }
+}
diff --git a/compiler/rustc_target/src/spec/thumb_base.rs b/compiler/rustc_target/src/spec/thumb_base.rs
index 2220b9326..0decfecb4 100644
--- a/compiler/rustc_target/src/spec/thumb_base.rs
+++ b/compiler/rustc_target/src/spec/thumb_base.rs
@@ -52,7 +52,7 @@ pub fn opts() -> TargetOptions {
// breaks debugging. Preserve LR by default to prevent that from happening.
frame_pointer: FramePointer::Always,
// ARM supports multiple ABIs for enums, the linux one matches the default of 32 here
- // but any arm-none or thumb-none target will be defaulted to 8 on GCC and clang
+ // but any arm-none or thumb-none target will be defaulted to 8 on GCC.
c_enum_min_bits: Some(8),
..Default::default()
}
diff --git a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs
index 9c59bb911..88a76f49a 100644
--- a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs
@@ -45,8 +45,6 @@ pub fn target() -> Target {
relocation_model: RelocModel::Static,
// suggested from thumb_base, rust-lang/rust#44993.
emit_debug_gdb_scripts: false,
- // suggested from thumb_base, with no-os gcc/clang use 8-bit enums
- c_enum_min_bits: Some(8),
frame_pointer: FramePointer::MayOmit,
main_needs_argc_argv: false,
diff --git a/compiler/rustc_target/src/spec/unikraft_linux_musl_base.rs b/compiler/rustc_target/src/spec/unikraft_linux_musl_base.rs
new file mode 100644
index 000000000..9ccd0a1e7
--- /dev/null
+++ b/compiler/rustc_target/src/spec/unikraft_linux_musl_base.rs
@@ -0,0 +1,15 @@
+use crate::spec::{cvs, PanicStrategy, RelocModel, TargetOptions};
+
+pub fn opts() -> TargetOptions {
+ TargetOptions {
+ os: "linux".into(),
+ env: "musl".into(),
+ vendor: "unikraft".into(),
+ linker: Some("kraftld".into()),
+ relocation_model: RelocModel::Static,
+ families: cvs!["unix"],
+ has_thread_local: true,
+ panic_strategy: PanicStrategy::Abort,
+ ..Default::default()
+ }
+}
diff --git a/compiler/rustc_target/src/spec/wasm32_wasi_preview1_threads.rs b/compiler/rustc_target/src/spec/wasm32_wasi_preview1_threads.rs
new file mode 100644
index 000000000..c567155fe
--- /dev/null
+++ b/compiler/rustc_target/src/spec/wasm32_wasi_preview1_threads.rs
@@ -0,0 +1,134 @@
+//! The `wasm32-wasi-preview1-threads` target is a new and still (as of July 2023) an
+//! experimental target. The definition in this file is likely to be tweaked
+//! over time and shouldn't be relied on too much.
+//!
+//! The `wasi-threads` target is a proposal to define a standardized set of syscalls
+//! that WebAssembly files can interoperate with. This set of syscalls is
+//! intended to empower WebAssembly binaries with native capabilities such as
+//! threads, filesystem access, network access, etc.
+//!
+//! You can see more about the proposal at <https://github.com/WebAssembly/wasi-threads>.
+//!
+//! The Rust target definition here is interesting in a few ways. We want to
+//! serve two use cases here with this target:
+//!
+//! * First, we want Rust usage of the target to be as hassle-free as possible,
+//! ideally avoiding the need to configure and install a local wasm32-wasi-preview1-threads
+//! toolchain.
+//!
+//! * Second, one of the primary use cases of LLVM's new wasm backend and the
+//! wasm support in LLD is that any compiled language can interoperate with
+//! any other. To that the `wasm32-wasi-preview1-threads` target is the first with a viable C
+//! standard library and sysroot common definition, so we want Rust and C/C++
+//! code to interoperate when compiled to `wasm32-unknown-unknown`.
+//!
+//! You'll note, however, that the two goals above are somewhat at odds with one
+//! another. To attempt to solve both use cases in one go we define a target
+//! that (ab)uses the `crt-static` target feature to indicate which one you're
+//! in.
+//!
+//! ## No interop with C required
+//!
+//! By default the `crt-static` target feature is enabled, and when enabled
+//! this means that the bundled version of `libc.a` found in `liblibc.rlib`
+//! is used. This isn't intended really for interoperation with a C because it
+//! may be the case that Rust's bundled C library is incompatible with a
+//! foreign-compiled C library. In this use case, though, we use `rust-lld` and
+//! some copied crt startup object files to ensure that you can download the
+//! wasi target for Rust and you're off to the races, no further configuration
+//! necessary.
+//!
+//! All in all, by default, no external dependencies are required. You can
+//! compile `wasm32-wasi-preview1-threads` binaries straight out of the box. You can't, however,
+//! reliably interoperate with C code in this mode (yet).
+//!
+//! ## Interop with C required
+//!
+//! For the second goal we repurpose the `target-feature` flag, meaning that
+//! you'll need to do a few things to have C/Rust code interoperate.
+//!
+//! 1. All Rust code needs to be compiled with `-C target-feature=-crt-static`,
+//! indicating that the bundled C standard library in the Rust sysroot will
+//! not be used.
+//!
+//! 2. If you're using rustc to build a linked artifact then you'll need to
+//! specify `-C linker` to a `clang` binary that supports
+//! `wasm32-wasi-preview1-threads` and is configured with the `wasm32-wasi-preview1-threads` sysroot. This
+//! will cause Rust code to be linked against the libc.a that the specified
+//! `clang` provides.
+//!
+//! 3. If you're building a staticlib and integrating Rust code elsewhere, then
+//! compiling with `-C target-feature=-crt-static` is all you need to do.
+//!
+//! You can configure the linker via Cargo using the
+//! `CARGO_TARGET_WASM32_WASI_LINKER` env var. Be sure to also set
+//! `CC_wasm32-wasi-preview1-threads` if any crates in the dependency graph are using the `cc`
+//! crate.
+//!
+//! ## Remember, this is all in flux
+//!
+//! The wasi target is **very** new in its specification. It's likely going to
+//! be a long effort to get it standardized and stable. We'll be following it as
+//! best we can with this target. Don't start relying on too much here unless
+//! you know what you're getting in to!
+
+use super::crt_objects::{self, LinkSelfContainedDefault};
+use super::{wasm_base, Cc, LinkerFlavor, Target};
+
+pub fn target() -> Target {
+ let mut options = wasm_base::options();
+
+ options.os = "wasi".into();
+
+ options.add_pre_link_args(
+ LinkerFlavor::WasmLld(Cc::No),
+ &["--import-memory", "--export-memory", "--shared-memory"],
+ );
+ options.add_pre_link_args(
+ LinkerFlavor::WasmLld(Cc::Yes),
+ &[
+ "--target=wasm32-wasi-threads",
+ "-Wl,--import-memory",
+ "-Wl,--export-memory,",
+ "-Wl,--shared-memory",
+ ],
+ );
+
+ options.pre_link_objects_self_contained = crt_objects::pre_wasi_self_contained();
+ options.post_link_objects_self_contained = crt_objects::post_wasi_self_contained();
+
+ // FIXME: Figure out cases in which WASM needs to link with a native toolchain.
+ options.link_self_contained = LinkSelfContainedDefault::True;
+
+ // Right now this is a bit of a workaround but we're currently saying that
+ // the target by default has a static crt which we're taking as a signal
+ // for "use the bundled crt". If that's turned off then the system's crt
+ // will be used, but this means that default usage of this target doesn't
+ // need an external compiler but it's still interoperable with an external
+ // compiler if configured correctly.
+ options.crt_static_default = true;
+ options.crt_static_respected = true;
+
+ // Allow `+crt-static` to create a "cdylib" output which is just a wasm file
+ // without a main function.
+ options.crt_static_allows_dylibs = true;
+
+ // WASI's `sys::args::init` function ignores its arguments; instead,
+ // `args::args()` makes the WASI API calls itself.
+ options.main_needs_argc_argv = false;
+
+ // And, WASI mangles the name of "main" to distinguish between different
+ // signatures.
+ options.entry_name = "__main_void".into();
+
+ options.singlethread = false;
+ options.features = "+atomics,+bulk-memory,+mutable-globals".into();
+
+ Target {
+ llvm_target: "wasm32-wasi".into(),
+ pointer_width: 32,
+ data_layout: "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-n32:64-S128-ni:1:10:20".into(),
+ arch: "wasm32".into(),
+ options,
+ }
+}
diff --git a/compiler/rustc_target/src/spec/x86_64_unikraft_linux_musl.rs b/compiler/rustc_target/src/spec/x86_64_unikraft_linux_musl.rs
new file mode 100644
index 000000000..2aa093b13
--- /dev/null
+++ b/compiler/rustc_target/src/spec/x86_64_unikraft_linux_musl.rs
@@ -0,0 +1,19 @@
+use crate::spec::{Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions};
+
+pub fn target() -> Target {
+ Target {
+ llvm_target: "x86_64-unknown-linux-musl".into(),
+ pointer_width: 64,
+ arch: "x86_64".into(),
+ data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+ .into(),
+ options: TargetOptions {
+ cpu: "x86-64".into(),
+ plt_by_default: false,
+ pre_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]),
+ max_atomic_width: Some(64),
+ stack_probes: StackProbeType::X86,
+ ..super::unikraft_linux_musl_base::opts()
+ },
+ }
+}
diff --git a/compiler/rustc_target/src/spec/x86_64_unknown_hermit.rs b/compiler/rustc_target/src/spec/x86_64_unknown_hermit.rs
index 74ef2527c..1eb069301 100644
--- a/compiler/rustc_target/src/spec/x86_64_unknown_hermit.rs
+++ b/compiler/rustc_target/src/spec/x86_64_unknown_hermit.rs
@@ -1,19 +1,19 @@
-use crate::spec::{StackProbeType, Target};
+use crate::spec::{StackProbeType, Target, TargetOptions};
pub fn target() -> Target {
- let mut base = super::hermit_base::opts();
- base.cpu = "x86-64".into();
- base.plt_by_default = false;
- base.max_atomic_width = Some(64);
- base.features = "+rdrnd,+rdseed".into();
- base.stack_probes = StackProbeType::X86;
-
Target {
llvm_target: "x86_64-unknown-hermit".into(),
pointer_width: 64,
+ arch: "x86_64".into(),
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
.into(),
- arch: "x86_64".into(),
- options: base,
+ options: TargetOptions {
+ cpu: "x86-64".into(),
+ features: "+rdrnd,+rdseed".into(),
+ plt_by_default: false,
+ max_atomic_width: Some(64),
+ stack_probes: StackProbeType::X86,
+ ..super::hermit_base::opts()
+ },
}
}
diff --git a/compiler/rustc_target/src/spec/x86_64_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/x86_64_unknown_linux_ohos.rs
new file mode 100644
index 000000000..a96be8cd5
--- /dev/null
+++ b/compiler/rustc_target/src/spec/x86_64_unknown_linux_ohos.rs
@@ -0,0 +1,26 @@
+use crate::spec::{Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target};
+
+pub fn target() -> Target {
+ let mut base = super::linux_ohos_base::opts();
+ base.cpu = "x86-64".into();
+ base.max_atomic_width = Some(64);
+ base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]);
+ base.stack_probes = StackProbeType::X86;
+ base.static_position_independent_executables = true;
+ base.supported_sanitizers = SanitizerSet::ADDRESS
+ | SanitizerSet::CFI
+ | SanitizerSet::LEAK
+ | SanitizerSet::MEMORY
+ | SanitizerSet::THREAD;
+ base.supports_xray = true;
+
+ Target {
+ // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead.
+ llvm_target: "x86_64-unknown-linux-musl".into(),
+ pointer_width: 64,
+ data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+ .into(),
+ arch: "x86_64".into(),
+ options: base,
+ }
+}