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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:18:32 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:18:32 +0000
commit4547b622d8d29df964fa2914213088b148c498fc (patch)
tree9fc6b25f3c3add6b745be9a2400a6e96140046e9 /src/test/mir-opt/inline/inline_instruction_set.rs
parentReleasing progress-linux version 1.66.0+dfsg1-1~progress7.99u1. (diff)
downloadrustc-4547b622d8d29df964fa2914213088b148c498fc.tar.xz
rustc-4547b622d8d29df964fa2914213088b148c498fc.zip
Merging upstream version 1.67.1+dfsg1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'src/test/mir-opt/inline/inline_instruction_set.rs')
-rw-r--r--src/test/mir-opt/inline/inline_instruction_set.rs61
1 files changed, 61 insertions, 0 deletions
diff --git a/src/test/mir-opt/inline/inline_instruction_set.rs b/src/test/mir-opt/inline/inline_instruction_set.rs
new file mode 100644
index 000000000..5dfb04943
--- /dev/null
+++ b/src/test/mir-opt/inline/inline_instruction_set.rs
@@ -0,0 +1,61 @@
+// Checks that only functions with the compatible instruction_set attributes are inlined.
+//
+// A function is "compatible" when the *callee* has the same attribute or no attribute.
+//
+// compile-flags: --target thumbv4t-none-eabi
+// needs-llvm-components: arm
+
+#![crate_type = "lib"]
+#![feature(rustc_attrs)]
+#![feature(no_core, lang_items)]
+#![feature(isa_attribute)]
+#![no_core]
+
+#[rustc_builtin_macro]
+#[macro_export]
+macro_rules! asm {
+ ("assembly template",
+ $(operands,)*
+ $(options($(option),*))?
+ ) => {
+ /* compiler built-in */
+ };
+}
+
+#[lang = "sized"]
+trait Sized {}
+#[lang = "copy"]
+trait Copy {}
+
+#[instruction_set(arm::a32)]
+#[inline]
+fn instruction_set_a32() {}
+
+#[instruction_set(arm::t32)]
+#[inline]
+fn instruction_set_t32() {}
+
+#[inline]
+fn instruction_set_default() {}
+
+#[inline(always)]
+fn inline_always_and_using_inline_asm() {
+ unsafe { asm!("/* do nothing */") };
+}
+
+// EMIT_MIR inline_instruction_set.t32.Inline.diff
+#[instruction_set(arm::t32)]
+pub fn t32() {
+ instruction_set_a32();
+ instruction_set_t32();
+ instruction_set_default();
+ inline_always_and_using_inline_asm();
+}
+
+// EMIT_MIR inline_instruction_set.default.Inline.diff
+pub fn default() {
+ instruction_set_a32();
+ instruction_set_t32();
+ instruction_set_default();
+ inline_always_and_using_inline_asm();
+}