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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:19:13 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:19:13 +0000
commit218caa410aa38c29984be31a5229b9fa717560ee (patch)
treec54bd55eeb6e4c508940a30e94c0032fbd45d677 /vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs
parentReleasing progress-linux version 1.67.1+dfsg1-1~progress7.99u1. (diff)
downloadrustc-218caa410aa38c29984be31a5229b9fa717560ee.tar.xz
rustc-218caa410aa38c29984be31a5229b9fa717560ee.zip
Merging upstream version 1.68.2+dfsg1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs')
-rw-r--r--vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs26
1 files changed, 14 insertions, 12 deletions
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs b/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs
index 1987af7a9..41c3cbc58 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs
+++ b/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs
@@ -15,10 +15,7 @@ macro_rules! arm_128_v7_neon_impl {
vec: $id,
}
let halves = U { vec: self }.halves;
- let h: $half = transmute($vpmin(
- transmute(halves.0),
- transmute(halves.1),
- ));
+ let h: $half = transmute($vpmin(transmute(halves.0), transmute(halves.1)));
h.all()
}
}
@@ -33,10 +30,7 @@ macro_rules! arm_128_v7_neon_impl {
vec: $id,
}
let halves = U { vec: self }.halves;
- let h: $half = transmute($vpmax(
- transmute(halves.0),
- transmute(halves.1),
- ));
+ let h: $half = transmute($vpmax(transmute(halves.0), transmute(halves.1)));
h.any()
}
}
@@ -46,9 +40,17 @@ macro_rules! arm_128_v7_neon_impl {
/// Mask reduction implementation for `arm` targets
macro_rules! impl_mask_reductions {
// 128-bit wide masks
- (m8x16) => { arm_128_v7_neon_impl!(m8x16, m8x8, vpmin_u8, vpmax_u8); };
- (m16x8) => { arm_128_v7_neon_impl!(m16x8, m16x4, vpmin_u16, vpmax_u16); };
- (m32x4) => { arm_128_v7_neon_impl!(m32x4, m32x2, vpmin_u32, vpmax_u32); };
+ (m8x16) => {
+ arm_128_v7_neon_impl!(m8x16, m8x8, vpmin_u8, vpmax_u8);
+ };
+ (m16x8) => {
+ arm_128_v7_neon_impl!(m16x8, m16x4, vpmin_u16, vpmax_u16);
+ };
+ (m32x4) => {
+ arm_128_v7_neon_impl!(m32x4, m32x2, vpmin_u32, vpmax_u32);
+ };
// Fallback to LLVM's default code-generation:
- ($id:ident) => { fallback_impl!($id); };
+ ($id:ident) => {
+ fallback_impl!($id);
+ };
}