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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:02:58 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:02:58 +0000
commit698f8c2f01ea549d77d7dc3338a12e04c11057b9 (patch)
tree173a775858bd501c378080a10dca74132f05bc50 /vendor/perf-event/examples
parentInitial commit. (diff)
downloadrustc-698f8c2f01ea549d77d7dc3338a12e04c11057b9.tar.xz
rustc-698f8c2f01ea549d77d7dc3338a12e04c11057b9.zip
Adding upstream version 1.64.0+dfsg1.upstream/1.64.0+dfsg1
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'vendor/perf-event/examples')
-rw-r--r--vendor/perf-event/examples/big-group.rs72
-rw-r--r--vendor/perf-event/examples/group.rs45
-rw-r--r--vendor/perf-event/examples/insns-for-pid.rs27
-rw-r--r--vendor/perf-event/examples/println-cpi.rs22
-rw-r--r--vendor/perf-event/examples/println.rs15
5 files changed, 181 insertions, 0 deletions
diff --git a/vendor/perf-event/examples/big-group.rs b/vendor/perf-event/examples/big-group.rs
new file mode 100644
index 000000000..73b557827
--- /dev/null
+++ b/vendor/perf-event/examples/big-group.rs
@@ -0,0 +1,72 @@
+use perf_event::{Builder, Group};
+use perf_event::events::{Cache, CacheOp, CacheResult, Hardware, WhichCache};
+
+fn main() -> std::io::Result<()> {
+ const ACCESS: Cache = Cache {
+ which: WhichCache::L1D,
+ operation: CacheOp::READ,
+ result: CacheResult::ACCESS,
+ };
+ const MISS: Cache = Cache { result: CacheResult::MISS, ..ACCESS };
+
+ let mut group = Group::new()?;
+ let access_counter = Builder::new().group(&mut group).kind(ACCESS).build()?;
+ let miss_counter = Builder::new().group(&mut group).kind(MISS).build()?;
+ let branches = Builder::new().group(&mut group).kind(Hardware::BRANCH_INSTRUCTIONS).build()?;
+ let missed_branches = Builder::new().group(&mut group).kind(Hardware::BRANCH_MISSES).build()?;
+ let insns = Builder::new().group(&mut group).kind(Hardware::INSTRUCTIONS).build()?;
+ let cycles = Builder::new().group(&mut group).kind(Hardware::CPU_CYCLES).build()?;
+
+ // Note that if you add more counters than you actually have hardware for,
+ // the kernel will time-slice them, which means you may get no coverage for
+ // short measurements. See the documentation.
+ //
+ // On my machine, this program won't collect any data unless I disable the
+ // NMI watchdog, as described in the documentation for `Group`. My machine
+ // has four counters, and this program tries to use all of them, but the NMI
+ // watchdog uses one up.
+
+ let mut vec = (0..=100000).collect::<Vec<_>>();
+
+ group.enable()?;
+ vec.sort();
+ println!("{:?}", &vec[0..10]);
+ group.disable()?;
+
+ let counts = group.read()?;
+
+ println!("enabled for {}ns, actually running for {}ns",
+ counts.time_enabled(),
+ counts.time_running());
+
+ if counts.time_running() == 0 {
+ println!("Group was never running; no results available.");
+ return Ok(());
+ }
+
+ if counts.time_running() < counts.time_enabled() {
+ println!("Counts cover only a portion of the execution.");
+ }
+
+ println!("L1D cache misses/references: {} / {} ({:.0}%)",
+ counts[&miss_counter],
+ counts[&access_counter],
+ (counts[&miss_counter] as f64 / counts[&access_counter] as f64) * 100.0);
+
+ println!("branch prediction misses/total: {} / {} ({:.0}%)",
+ counts[&missed_branches],
+ counts[&branches],
+ (counts[&missed_branches] as f64 / counts[&branches] as f64) * 100.0);
+
+ println!("{} instructions, {} cycles ({:.2} cpi)",
+ counts[&insns],
+ counts[&cycles],
+ counts[&cycles] as f64 / counts[&insns] as f64);
+
+ // You can iterate over a `Counts` value:
+ for (id, value) in &counts {
+ println!("Counter id {} has value {}", id, value);
+ }
+
+ Ok(())
+}
diff --git a/vendor/perf-event/examples/group.rs b/vendor/perf-event/examples/group.rs
new file mode 100644
index 000000000..0312485c9
--- /dev/null
+++ b/vendor/perf-event/examples/group.rs
@@ -0,0 +1,45 @@
+use perf_event::{Builder, Group};
+use perf_event::events::{Cache, CacheOp, CacheResult, Hardware, WhichCache};
+
+fn main() -> std::io::Result<()> {
+ const ACCESS: Cache = Cache {
+ which: WhichCache::L1D,
+ operation: CacheOp::READ,
+ result: CacheResult::ACCESS,
+ };
+ const MISS: Cache = Cache { result: CacheResult::MISS, ..ACCESS };
+
+ let mut group = Group::new()?;
+ let access_counter = Builder::new().group(&mut group).kind(ACCESS).build()?;
+ let miss_counter = Builder::new().group(&mut group).kind(MISS).build()?;
+ let branches = Builder::new().group(&mut group).kind(Hardware::BRANCH_INSTRUCTIONS).build()?;
+ let missed_branches = Builder::new().group(&mut group).kind(Hardware::BRANCH_MISSES).build()?;
+
+ // Note that if you add more counters than you actually have hardware for,
+ // the kernel will time-slice them, which means you may get no coverage for
+ // short measurements. See the documentation.
+
+ let vec = (0..=51).collect::<Vec<_>>();
+
+ group.enable()?;
+ println!("{:?}", vec);
+ group.disable()?;
+
+ let counts = group.read()?;
+ println!("L1D cache misses/references: {} / {} ({:.0}%)",
+ counts[&miss_counter],
+ counts[&access_counter],
+ (counts[&miss_counter] as f64 / counts[&access_counter] as f64) * 100.0);
+
+ println!("branch prediction misses/total: {} / {} ({:.0}%)",
+ counts[&missed_branches],
+ counts[&branches],
+ (counts[&missed_branches] as f64 / counts[&branches] as f64) * 100.0);
+
+ // You can iterate over a `Counts` value:
+ for (id, value) in &counts {
+ println!("Counter id {} has value {}", id, value);
+ }
+
+ Ok(())
+}
diff --git a/vendor/perf-event/examples/insns-for-pid.rs b/vendor/perf-event/examples/insns-for-pid.rs
new file mode 100644
index 000000000..09d4ef36d
--- /dev/null
+++ b/vendor/perf-event/examples/insns-for-pid.rs
@@ -0,0 +1,27 @@
+use libc::pid_t;
+use perf_event::Builder;
+use perf_event::events::Hardware;
+use std::thread::sleep;
+use std::time::Duration;
+
+fn main() -> std::io::Result<()> {
+ let pid: pid_t = std::env::args()
+ .nth(1)
+ .expect("Usage: insns-for-pid PID")
+ .parse()
+ .expect("Usage: insns-for-pid PID");
+
+ let mut insns = Builder::new()
+ .observe_pid(pid)
+ .kind(Hardware::BRANCH_INSTRUCTIONS)
+ .build()?;
+
+ // Count instructions in PID for five seconds.
+ insns.enable()?;
+ sleep(Duration::from_secs(5));
+ insns.disable()?;
+
+ println!("instructions in last five seconds: {}", insns.read()?);
+
+ Ok(())
+}
diff --git a/vendor/perf-event/examples/println-cpi.rs b/vendor/perf-event/examples/println-cpi.rs
new file mode 100644
index 000000000..31d24f640
--- /dev/null
+++ b/vendor/perf-event/examples/println-cpi.rs
@@ -0,0 +1,22 @@
+fn main() -> std::io::Result<()> {
+ use perf_event::{Builder, Group};
+ use perf_event::events::Hardware;
+
+ let mut group = Group::new()?;
+ let cycles = Builder::new().group(&mut group).kind(Hardware::CPU_CYCLES).build()?;
+ let insns = Builder::new().group(&mut group).kind(Hardware::INSTRUCTIONS).build()?;
+
+ let vec = (0..=51).collect::<Vec<_>>();
+
+ group.enable()?;
+ println!("{:?}", vec);
+ group.disable()?;
+
+ let counts = group.read()?;
+ println!("cycles / instructions: {} / {} ({:.2} cpi)",
+ counts[&cycles],
+ counts[&insns],
+ (counts[&cycles] as f64 / counts[&insns] as f64));
+
+ Ok(())
+}
diff --git a/vendor/perf-event/examples/println.rs b/vendor/perf-event/examples/println.rs
new file mode 100644
index 000000000..8760e3dcd
--- /dev/null
+++ b/vendor/perf-event/examples/println.rs
@@ -0,0 +1,15 @@
+use perf_event::Builder;
+
+fn main() -> std::io::Result<()> {
+ let mut counter = Builder::new().build()?;
+
+ let vec = (0..=51).collect::<Vec<_>>();
+
+ counter.enable()?;
+ println!("{:?}", vec);
+ counter.disable()?;
+
+ println!("{} instructions retired", counter.read()?);
+
+ Ok(())
+}