diff options
Diffstat (limited to 'compiler/rustc_codegen_cranelift/src/intrinsics')
5 files changed, 20 insertions, 25 deletions
diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs index f722e5228..f67fdb592 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs @@ -42,7 +42,7 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>( _ => { fx.tcx .sess - .warn(&format!("unsupported llvm intrinsic {}; replacing with trap", intrinsic)); + .warn(format!("unsupported llvm intrinsic {}; replacing with trap", intrinsic)); crate::trap::trap_unimplemented(fx, intrinsic); return; } diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs index b431158d2..33b2f4702 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs @@ -207,7 +207,7 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>( } */ _ => { - fx.tcx.sess.warn(&format!( + fx.tcx.sess.warn(format!( "unsupported AArch64 llvm intrinsic {}; replacing with trap", intrinsic )); diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs index 0f32d1a25..56d8f13ce 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/llvm_x86.rs @@ -138,10 +138,9 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>( llvm_add_sub(fx, BinOp::Sub, ret, b_in, a, b); } _ => { - fx.tcx.sess.warn(&format!( - "unsupported x86 llvm intrinsic {}; replacing with trap", - intrinsic - )); + fx.tcx + .sess + .warn(format!("unsupported x86 llvm intrinsic {}; replacing with trap", intrinsic)); crate::trap::trap_unimplemented(fx, intrinsic); return; } diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs index 03f2a65fc..0a513b08b 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs @@ -42,7 +42,7 @@ fn report_atomic_type_validation_error<'tcx>( ) { fx.tcx.sess.span_err( span, - &format!( + format!( "`{}` intrinsic: expected basic integer or raw pointer type, found `{:?}`", intrinsic, ty ), @@ -51,17 +51,13 @@ fn report_atomic_type_validation_error<'tcx>( fx.bcx.ins().trap(TrapCode::UnreachableCodeReached); } -pub(crate) fn clif_vector_type<'tcx>(tcx: TyCtxt<'tcx>, layout: TyAndLayout<'tcx>) -> Option<Type> { +pub(crate) fn clif_vector_type<'tcx>(tcx: TyCtxt<'tcx>, layout: TyAndLayout<'tcx>) -> Type { let (element, count) = match layout.abi { Abi::Vector { element, count } => (element, count), _ => unreachable!(), }; - match scalar_to_clif_type(tcx, element).by(u32::try_from(count).unwrap()) { - // Cranelift currently only implements icmp for 128bit vectors. - Some(vector_ty) if vector_ty.bits() == 128 => Some(vector_ty), - _ => None, - } + scalar_to_clif_type(tcx, element).by(u32::try_from(count).unwrap()).unwrap() } fn simd_for_each_lane<'tcx>( @@ -534,7 +530,7 @@ fn codegen_regular_intrinsic_call<'tcx>( // The only difference between offset and arith_offset is regarding UB. Because Cranelift // doesn't have UB both are codegen'ed the same way - sym::offset | sym::arith_offset => { + sym::arith_offset => { intrinsic_args!(fx, args => (base, offset); intrinsic); let offset = offset.load_scalar(fx); @@ -1107,8 +1103,8 @@ fn codegen_regular_intrinsic_call<'tcx>( fx.bcx.ins().call_indirect(f_sig, f, &[data]); - let layout = ret.layout(); - let ret_val = CValue::const_val(fx, layout, ty::ScalarInt::null(layout.size)); + let layout = fx.layout_of(fx.tcx.types.i32); + let ret_val = CValue::by_val(fx.bcx.ins().iconst(types::I32, 0), layout); ret.write_cvalue(fx, ret_val); } @@ -1206,7 +1202,7 @@ fn codegen_regular_intrinsic_call<'tcx>( _ => { fx.tcx .sess - .span_fatal(source_info.span, &format!("unsupported intrinsic {}", intrinsic)); + .span_fatal(source_info.span, format!("unsupported intrinsic {}", intrinsic)); } } diff --git a/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs b/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs index 6f54a8d49..5a038bfca 100644 --- a/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs +++ b/compiler/rustc_codegen_cranelift/src/intrinsics/simd.rs @@ -13,7 +13,7 @@ fn report_simd_type_validation_error( span: Span, ty: Ty<'_>, ) { - fx.tcx.sess.span_err(span, &format!("invalid monomorphization of `{}` intrinsic: expected SIMD input type, found non-SIMD `{}`", intrinsic, ty)); + fx.tcx.sess.span_err(span, format!("invalid monomorphization of `{}` intrinsic: expected SIMD input type, found non-SIMD `{}`", intrinsic, ty)); // Prevent verifier error fx.bcx.ins().trap(TrapCode::UnreachableCodeReached); } @@ -150,7 +150,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( _ => { fx.tcx.sess.span_err( span, - &format!( + format!( "simd_shuffle index must be an array of `u32`, got `{}`", idx_ty, ), @@ -248,12 +248,12 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( if idx >= lane_count.into() { fx.tcx.sess.span_fatal( fx.mir.span, - &format!("[simd_insert] idx {} >= lane_count {}", idx, lane_count), + format!("[simd_insert] idx {} >= lane_count {}", idx, lane_count), ); } ret.write_cvalue(fx, base); - let ret_lane = ret.place_field(fx, FieldIdx::new(idx.try_into().unwrap())); + let ret_lane = ret.place_lane(fx, idx.try_into().unwrap()); ret_lane.write_cvalue(fx, val); } @@ -296,7 +296,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( if idx >= lane_count.into() { fx.tcx.sess.span_fatal( fx.mir.span, - &format!("[simd_extract] idx {} >= lane_count {}", idx, lane_count), + format!("[simd_extract] idx {} >= lane_count {}", idx, lane_count), ); } @@ -699,7 +699,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( _ => { fx.tcx.sess.span_fatal( span, - &format!( + format!( "invalid monomorphization of `simd_bitmask` intrinsic: \ vector argument `{}`'s element type `{}`, expected integer element \ type", @@ -739,7 +739,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( _ => { fx.tcx.sess.span_fatal( span, - &format!( + format!( "invalid monomorphization of `simd_bitmask` intrinsic: \ cannot return `{}`, expected `u{}` or `[u8; {}]`", ret.layout().ty, @@ -875,7 +875,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>( } _ => { - fx.tcx.sess.span_err(span, &format!("Unknown SIMD intrinsic {}", intrinsic)); + fx.tcx.sess.span_err(span, format!("Unknown SIMD intrinsic {}", intrinsic)); // Prevent verifier error fx.bcx.ins().trap(TrapCode::UnreachableCodeReached); } |