diff options
Diffstat (limited to 'compiler/rustc_hir_analysis/src/check/intrinsicck.rs')
| -rw-r--r-- | compiler/rustc_hir_analysis/src/check/intrinsicck.rs | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/compiler/rustc_hir_analysis/src/check/intrinsicck.rs b/compiler/rustc_hir_analysis/src/check/intrinsicck.rs index cd7e99172..d86ebc2c9 100644 --- a/compiler/rustc_hir_analysis/src/check/intrinsicck.rs +++ b/compiler/rustc_hir_analysis/src/check/intrinsicck.rs @@ -49,7 +49,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { 16 => InlineAsmType::I16, 32 => InlineAsmType::I32, 64 => InlineAsmType::I64, - _ => unreachable!(), + width => bug!("unsupported pointer width: {width}"), }; match *ty.kind() { @@ -101,7 +101,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { 16 => InlineAsmType::VecI16(size), 32 => InlineAsmType::VecI32(size), 64 => InlineAsmType::VecI64(size), - _ => unreachable!(), + width => bug!("unsupported pointer width: {width}"), }) } ty::Float(FloatTy::F32) => Some(InlineAsmType::VecF32(size)), @@ -109,7 +109,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { _ => None, } } - ty::Infer(_) => unreachable!(), + ty::Infer(_) => bug!("unexpected infer ty in asm operand"), _ => None, } } @@ -136,8 +136,15 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { ty::Adt(adt, args) if Some(adt.did()) == self.tcx.lang_items().maybe_uninit() => { let fields = &adt.non_enum_variant().fields; let ty = fields[FieldIdx::from_u32(1)].ty(self.tcx, args); - let ty::Adt(ty, args) = ty.kind() else { unreachable!() }; - assert!(ty.is_manually_drop()); + // FIXME: Are we just trying to map to the `T` in `MaybeUninit<T>`? + // If so, just get it from the args. + let ty::Adt(ty, args) = ty.kind() else { + unreachable!("expected first field of `MaybeUninit` to be an ADT") + }; + assert!( + ty.is_manually_drop(), + "expected first field of `MaybeUnit` to be `ManuallyDrop`" + ); let fields = &ty.non_enum_variant().fields; let ty = fields[FieldIdx::from_u32(0)].ty(self.tcx, args); self.get_asm_ty(ty) @@ -269,7 +276,6 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { lint.help(format!( "or use `{{{idx}:{default_modifier}}}` to keep the default formatting of `{default_result}`", )); - lint }, ); } @@ -281,7 +287,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { pub fn check_asm(&self, asm: &hir::InlineAsm<'tcx>, enclosing_id: LocalDefId) { let target_features = self.tcx.asm_target_features(enclosing_id.to_def_id()); let Some(asm_arch) = self.tcx.sess.asm_arch else { - self.tcx.sess.delay_span_bug(DUMMY_SP, "target architecture does not support asm"); + self.tcx.sess.span_delayed_bug(DUMMY_SP, "target architecture does not support asm"); return; }; for (idx, (op, op_sp)) in asm.operands.iter().enumerate() { @@ -307,7 +313,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { if let Err(msg) = reg.validate( asm_arch, self.tcx.sess.relocation_model(), - &target_features, + target_features, &self.tcx.sess.target, op.is_clobber(), ) { @@ -382,7 +388,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { asm.template, true, None, - &target_features, + target_features, ); } hir::InlineAsmOperand::Out { reg, late: _, expr } => { @@ -394,7 +400,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { asm.template, false, None, - &target_features, + target_features, ); } } @@ -406,7 +412,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { asm.template, false, None, - &target_features, + target_features, ); } hir::InlineAsmOperand::SplitInOut { reg, late: _, in_expr, out_expr } => { @@ -417,7 +423,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { asm.template, true, None, - &target_features, + target_features, ); if let Some(out_expr) = out_expr { self.check_asm_operand_type( @@ -427,7 +433,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> { asm.template, false, Some((in_expr, in_ty)), - &target_features, + target_features, ); } } |