diff options
Diffstat (limited to 'compiler/rustc_target/src/spec/targets')
227 files changed, 5595 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_darwin.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_darwin.rs new file mode 100644 index 000000000..8e6c00b12 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_darwin.rs @@ -0,0 +1,27 @@ +use crate::spec::base::apple::{macos_llvm_target, opts, Arch}; +use crate::spec::{FramePointer, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64; + let mut base = opts("macos", arch); + base.cpu = "apple-m1".into(); + base.max_atomic_width = Some(128); + + // FIXME: The leak sanitizer currently fails the tests, see #88132. + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::THREAD; + + Target { + // Clang automatically chooses a more specific target based on + // MACOSX_DEPLOYMENT_TARGET. To enable cross-language LTO to work + // correctly, we do too. + llvm_target: macos_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + mcount: "\u{1}mcount".into(), + frame_pointer: FramePointer::NonLeaf, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_ios.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios.rs new file mode 100644 index 000000000..9fc5b5de4 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios.rs @@ -0,0 +1,37 @@ +use crate::spec::base::apple::{ios_llvm_target, opts, Arch}; +use crate::spec::{FramePointer, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64; + let mut base = opts("ios", arch); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::THREAD; + + Target { + // Clang automatically chooses a more specific target based on + // IPHONEOS_DEPLOYMENT_TARGET. + // This is required for the target to pick the right + // MACH-O commands, so we do too. + llvm_target: ios_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64-apple-ios11.0.0\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_macabi.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_macabi.rs new file mode 100644 index 000000000..0172a3a9c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_macabi.rs @@ -0,0 +1,34 @@ +use crate::spec::base::apple::{opts, Arch}; +use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + let llvm_target = "arm64-apple-ios14.0-macabi"; + + let arch = Arch::Arm64_macabi; + let mut base = opts("ios", arch); + base.add_pre_link_args(LinkerFlavor::Darwin(Cc::Yes, Lld::No), &["-target", llvm_target]); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::LEAK | SanitizerSet::THREAD; + + Target { + llvm_target: llvm_target.into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a12".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64-apple-ios-macabi\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -Os\0" + .into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_sim.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_sim.rs new file mode 100644 index 000000000..602a68777 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_ios_sim.rs @@ -0,0 +1,37 @@ +use crate::spec::base::apple::{ios_sim_llvm_target, opts, Arch}; +use crate::spec::{FramePointer, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64_sim; + let mut base = opts("ios", arch); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::THREAD; + + Target { + // Clang automatically chooses a more specific target based on + // IPHONEOS_DEPLOYMENT_TARGET. + // This is required for the simulator target to pick the right + // MACH-O commands, so we do too. + llvm_target: ios_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64-apple-ios14.0-simulator\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos.rs new file mode 100644 index 000000000..a1a319355 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos.rs @@ -0,0 +1,19 @@ +use crate::spec::base::apple::{opts, tvos_llvm_target, Arch}; +use crate::spec::{FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64; + Target { + llvm_target: tvos_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + ..opts("tvos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos_sim.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos_sim.rs new file mode 100644 index 000000000..7b0bbb28e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_tvos_sim.rs @@ -0,0 +1,31 @@ +use crate::spec::base::apple::{opts, tvos_sim_llvm_target, Arch}; +use crate::spec::{FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64_sim; + Target { + llvm_target: tvos_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + // Taken from (and slightly modified) the aarch64-apple-ios-sim spec which says: + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64-apple-tvos15.0-simulator\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..opts("tvos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_apple_watchos_sim.rs b/compiler/rustc_target/src/spec/targets/aarch64_apple_watchos_sim.rs new file mode 100644 index 000000000..014560d22 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_apple_watchos_sim.rs @@ -0,0 +1,34 @@ +use crate::spec::base::apple::{opts, watchos_sim_llvm_target, Arch}; +use crate::spec::{FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Arm64_sim; + Target { + // Clang automatically chooses a more specific target based on + // WATCHOS_DEPLOYMENT_TARGET. + // This is required for the simulator target to pick the right + // MACH-O commands, so we do too. + llvm_target: watchos_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-i64:64-i128:128-n32:64-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + frame_pointer: FramePointer::NonLeaf, + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64-apple-watchos5.0-simulator\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..opts("watchos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu.rs new file mode 100644 index 000000000..bbaa870ec --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64_be-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a,+outline-atomics".into(), + max_atomic_width: Some(128), + mcount: "\u{1}_mcount".into(), + endian: Endian::Big, + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu_ilp32.rs b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu_ilp32.rs new file mode 100644 index 000000000..7536e507b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_linux_gnu_ilp32.rs @@ -0,0 +1,21 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.max_atomic_width = Some(128); + + Target { + llvm_target: "aarch64_be-unknown-linux-gnu_ilp32".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + abi: "ilp32".into(), + features: "+v8a,+outline-atomics".into(), + mcount: "\u{1}_mcount".into(), + endian: Endian::Big, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_netbsd.rs new file mode 100644 index 000000000..21de8a71a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_be_unknown_netbsd.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64_be-unknown-netbsd".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + mcount: "__mcount".into(), + max_atomic_width: Some(128), + endian: Endian::Big, + ..base::netbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_fuchsia.rs b/compiler/rustc_target/src/spec/targets/aarch64_fuchsia.rs new file mode 100644 index 000000000..3668db912 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_fuchsia.rs @@ -0,0 +1 @@ +pub use crate::spec::targets::aarch64_unknown_fuchsia::target; diff --git a/compiler/rustc_target/src/spec/targets/aarch64_kmc_solid_asp3.rs b/compiler/rustc_target/src/spec/targets/aarch64_kmc_solid_asp3.rs new file mode 100644 index 000000000..e5e22fd1e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_kmc_solid_asp3.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let base = base::solid::opts("asp3"); + Target { + llvm_target: "aarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + linker: Some("aarch64-kmc-elf-gcc".into()), + features: "+v8a,+neon,+fp-armv8".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(128), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs b/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs new file mode 100644 index 000000000..7c6fed7ab --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_linux_android.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +// See https://developer.android.com/ndk/guides/abis.html#arm64-v8a +// for target ABI requirements. + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-linux-android".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + max_atomic_width: Some(128), + // As documented in https://developer.android.com/ndk/guides/cpu-features.html + // the neon (ASIMD) and FP must exist on all android aarch64 targets. + features: "+v8a,+neon,+fp-armv8".into(), + supported_sanitizers: SanitizerSet::CFI + | SanitizerSet::HWADDRESS + | SanitizerSet::MEMTAG + | SanitizerSet::SHADOWCALLSTACK + | SanitizerSet::ADDRESS, + supports_xray: true, + ..base::android::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding.rs b/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding.rs new file mode 100644 index 000000000..02fcc2bb4 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding.rs @@ -0,0 +1,26 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelroLevel, Target, TargetOptions}; + +const LINKER_SCRIPT: &str = include_str!("./aarch64_nintendo_switch_freestanding_linker_script.ld"); + +/// A base target for Nintendo Switch devices using a pure LLVM toolchain. +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + link_script: Some(LINKER_SCRIPT.into()), + os: "horizon".into(), + max_atomic_width: Some(128), + panic_strategy: PanicStrategy::Abort, + position_independent_executables: true, + dynamic_linking: true, + relro_level: RelroLevel::Off, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding_linker_script.ld b/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding_linker_script.ld new file mode 100644 index 000000000..f3441e659 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_nintendo_switch_freestanding_linker_script.ld @@ -0,0 +1,78 @@ +OUTPUT_FORMAT(elf64-littleaarch64) +OUTPUT_ARCH(aarch64) +ENTRY(_start) + +PHDRS +{ + text PT_LOAD FLAGS(5); + rodata PT_LOAD FLAGS(4); + data PT_LOAD FLAGS(6); + bss PT_LOAD FLAGS(6); + dynamic PT_DYNAMIC; +} + +SECTIONS +{ + . = 0; + + .text : ALIGN(0x1000) { + HIDDEN(__text_start = .); + KEEP(*(.text.jmp)) + + . = 0x80; + + *(.text .text.*) + *(.plt .plt.*) + } + + /* Read-only sections */ + + . = ALIGN(0x1000); + + .module_name : { *(.module_name) } :rodata + + .rodata : { *(.rodata .rodata.*) } :rodata + .hash : { *(.hash) } + .dynsym : { *(.dynsym .dynsym.*) } + .dynstr : { *(.dynstr .dynstr.*) } + .rela.dyn : { *(.rela.dyn) } + + .eh_frame : { + HIDDEN(__eh_frame_start = .); + *(.eh_frame .eh_frame.*) + HIDDEN(__eh_frame_end = .); + } + + .eh_frame_hdr : { + HIDDEN(__eh_frame_hdr_start = .); + *(.eh_frame_hdr .eh_frame_hdr.*) + HIDDEN(__eh_frame_hdr_end = .); + } + + /* Read-write sections */ + + . = ALIGN(0x1000); + + .data : { + *(.data .data.*) + *(.got .got.*) + *(.got.plt .got.plt.*) + } :data + + .dynamic : { + HIDDEN(__dynamic_start = .); + *(.dynamic) + } + + /* BSS section */ + + . = ALIGN(0x1000); + + .bss : { + HIDDEN(__bss_start = .); + *(.bss .bss.*) + *(COMMON) + . = ALIGN(8); + HIDDEN(__bss_end = .); + } :bss +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs new file mode 100644 index 000000000..1ea738142 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_gnullvm.rs @@ -0,0 +1,16 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_gnullvm::opts(); + base.max_atomic_width = Some(128); + base.features = "+v8a,+neon,+fp-armv8".into(); + base.linker = Some("aarch64-w64-mingw32-clang".into()); + + Target { + llvm_target: "aarch64-pc-windows-gnu".into(), + pointer_width: 64, + data_layout: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs new file mode 100644 index 000000000..cbd132972 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_pc_windows_msvc.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_msvc::opts(); + base.max_atomic_width = Some(128); + base.features = "+v8a,+neon,+fp-armv8".into(); + + Target { + llvm_target: "aarch64-pc-windows-msvc".into(), + pointer_width: 64, + data_layout: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs new file mode 100644 index 000000000..0f95984a3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_freebsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-freebsd".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + max_atomic_width: Some(128), + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::MEMORY + | SanitizerSet::THREAD, + ..base::freebsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs new file mode 100644 index 000000000..cacc6ea23 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_fuchsia.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + max_atomic_width: Some(128), + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::SHADOWCALLSTACK, + ..base::fuchsia::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_hermit.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_hermit.rs new file mode 100644 index 000000000..3839e0b9c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_hermit.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-hermit".into(), + pointer_width: 64, + arch: "aarch64".into(), + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + options: TargetOptions { + features: "+v8a,+strict-align,+neon,+fp-armv8".into(), + max_atomic_width: Some(128), + ..base::hermit::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu.rs new file mode 100644 index 000000000..c0b07db38 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu.rs @@ -0,0 +1,24 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a,+outline-atomics".into(), + mcount: "\u{1}_mcount".into(), + max_atomic_width: Some(128), + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::MEMTAG + | SanitizerSet::THREAD + | SanitizerSet::HWADDRESS, + supports_xray: true, + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu_ilp32.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu_ilp32.rs new file mode 100644 index 000000000..d4c6271b2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_gnu_ilp32.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-linux-gnu_ilp32".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + abi: "ilp32".into(), + features: "+v8a,+outline-atomics".into(), + max_atomic_width: Some(128), + mcount: "\u{1}_mcount".into(), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_musl.rs new file mode 100644 index 000000000..364df677e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_musl.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.max_atomic_width = Some(128); + base.supports_xray = true; + base.features = "+v8a".into(); + base.supported_sanitizers = SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::THREAD; + + Target { + llvm_target: "aarch64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { mcount: "\u{1}_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_ohos.rs new file mode 100644 index 000000000..5f3bef63a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_linux_ohos.rs @@ -0,0 +1,27 @@ +use crate::spec::SanitizerSet; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_ohos::opts(); + base.max_atomic_width = Some(128); + + Target { + // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead. + llvm_target: "aarch64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+reserve-x18".into(), + mcount: "\u{1}_mcount".into(), + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::MEMTAG + | SanitizerSet::THREAD + | SanitizerSet::HWADDRESS, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_netbsd.rs new file mode 100644 index 000000000..3194d16ff --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_netbsd.rs @@ -0,0 +1,16 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-netbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + mcount: "__mcount".into(), + max_atomic_width: Some(128), + ..base::netbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_none.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_none.rs new file mode 100644 index 000000000..88fa6d5a7 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_none.rs @@ -0,0 +1,32 @@ +// Generic AArch64 target for bare-metal code - Floating point enabled +// +// Can be used in conjunction with the `target-feature` and +// `target-cpu` compiler flags to opt-in more hardware-specific +// features. +// +// For example, `-C target-cpu=cortex-a53`. + +use crate::spec::{ + Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, Target, TargetOptions, +}; + +pub fn target() -> Target { + let opts = TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: "+v8a,+strict-align,+neon,+fp-armv8".into(), + supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS, + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(128), + panic_strategy: PanicStrategy::Abort, + ..Default::default() + }; + Target { + llvm_target: "aarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_none_softfloat.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_none_softfloat.rs new file mode 100644 index 000000000..48b79b0b9 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_none_softfloat.rs @@ -0,0 +1,30 @@ +// Generic AArch64 target for bare-metal code - Floating point disabled +// +// Can be used in conjunction with the `target-feature` and +// `target-cpu` compiler flags to opt-in more hardware-specific +// features. +// +// For example, `-C target-cpu=cortex-a53`. + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let opts = TargetOptions { + abi: "softfloat".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: "+v8a,+strict-align,-neon,-fp-armv8".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(128), + panic_strategy: PanicStrategy::Abort, + ..Default::default() + }; + Target { + llvm_target: "aarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_nto_qnx_710.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_nto_qnx_710.rs new file mode 100644 index 000000000..aeeaab3af --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_nto_qnx_710.rs @@ -0,0 +1,29 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-unknown".into(), + pointer_width: 64, + // from: https://llvm.org/docs/LangRef.html#data-layout + // e = little endian + // m:e = ELF mangling: Private symbols get a .L prefix + // i8:8:32 = 8-bit-integer, minimum_alignment=8, preferred_alignment=32 + // i16:16:32 = 16-bit-integer, minimum_alignment=16, preferred_alignment=32 + // i64:64 = 64-bit-integer, minimum_alignment=64, preferred_alignment=64 + // i128:128 = 128-bit-integer, minimum_alignment=128, preferred_alignment=128 + // n32:64 = 32 and 64 are native integer widths; Elements of this set are considered to support most general arithmetic operations efficiently. + // S128 = 128 bits are the natural alignment of the stack in bits. + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + max_atomic_width: Some(128), + pre_link_args: TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-Vgcc_ntoaarch64le_cxx"], + ), + env: "nto71".into(), + ..base::nto_qnx::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs new file mode 100644 index 000000000..e3f5aafc7 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_openbsd.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-openbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + max_atomic_width: Some(128), + ..base::openbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_redox.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_redox.rs new file mode 100644 index 000000000..de875e29f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_redox.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::redox::opts(); + base.max_atomic_width = Some(128); + base.features = "+v8a".into(); + + Target { + llvm_target: "aarch64-unknown-redox".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_teeos.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_teeos.rs new file mode 100644 index 000000000..eec2668d4 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_teeos.rs @@ -0,0 +1,16 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::teeos::opts(); + base.features = "+strict-align,+neon,+fp-armv8".into(); + base.max_atomic_width = Some(128); + base.linker = Some("aarch64-linux-gnu-ld".into()); + + Target { + llvm_target: "aarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_unknown_uefi.rs b/compiler/rustc_target/src/spec/targets/aarch64_unknown_uefi.rs new file mode 100644 index 000000000..9ed6ed265 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_unknown_uefi.rs @@ -0,0 +1,20 @@ +// This defines the aarch64 target for UEFI systems as described in the UEFI specification. See the +// uefi-base module for generic UEFI options. + +use crate::spec::{base, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::uefi_msvc::opts(); + + base.max_atomic_width = Some(128); + base.add_pre_link_args(LinkerFlavor::Msvc(Lld::No), &["/machine:arm64"]); + base.features = "+v8a".into(); + + Target { + llvm_target: "aarch64-unknown-windows".into(), + pointer_width: 64, + data_layout: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_uwp_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/aarch64_uwp_windows_msvc.rs new file mode 100644 index 000000000..c64b2c7d1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_uwp_windows_msvc.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_uwp_msvc::opts(); + base.max_atomic_width = Some(128); + base.features = "+v8a".into(); + + Target { + llvm_target: "aarch64-pc-windows-msvc".into(), + pointer_width: 64, + data_layout: "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs new file mode 100644 index 000000000..29f61d857 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/aarch64_wrs_vxworks.rs @@ -0,0 +1,15 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "aarch64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a".into(), + max_atomic_width: Some(128), + ..base::vxworks::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm64_32_apple_watchos.rs b/compiler/rustc_target/src/spec/targets/arm64_32_apple_watchos.rs new file mode 100644 index 000000000..9931b7b86 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm64_32_apple_watchos.rs @@ -0,0 +1,30 @@ +use crate::spec::base::apple::{opts, Arch}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + let base = opts("watchos", Arch::Arm64_32); + Target { + llvm_target: "arm64_32-apple-watchos".into(), + pointer_width: 32, + data_layout: "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+v8a,+neon,+fp-armv8,+apple-a7".into(), + max_atomic_width: Some(128), + forces_embed_bitcode: true, + dynamic_linking: false, + position_independent_executables: true, + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + arm64_32-apple-watchos5.0.0\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs new file mode 100644 index 000000000..43b27b414 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "arm-linux-androideabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + // https://developer.android.com/ndk/guides/abis.html#armeabi + features: "+strict-align,+v5te".into(), + supported_sanitizers: SanitizerSet::ADDRESS, + max_atomic_width: Some(32), + ..base::android::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs new file mode 100644 index 000000000..e4fa54c4b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "arm-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+strict-align,+v6".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs new file mode 100644 index 000000000..f379ea35e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "arm-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + features: "+strict-align,+v6,+vfp2,-d32".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs new file mode 100644 index 000000000..f3d5ff892 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs @@ -0,0 +1,22 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + // It's important we use "gnueabi" and not "musleabi" here. LLVM uses it + // to determine the calling convention and float ABI, and it doesn't + // support the "musleabi" value. + llvm_target: "arm-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + // Most of these settings are copied from the arm_unknown_linux_gnueabi + // target. + features: "+strict-align,+v6".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs new file mode 100644 index 000000000..f3e366d59 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs @@ -0,0 +1,22 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + // It's important we use "gnueabihf" and not "musleabihf" here. LLVM + // uses it to determine the calling convention and float ABI, and it + // doesn't support the "musleabihf" value. + llvm_target: "arm-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // Most of these settings are copied from the arm_unknown_linux_gnueabihf + // target. + features: "+strict-align,+v6,+vfp2,-d32".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs new file mode 100644 index 000000000..07c7e1c58 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs @@ -0,0 +1,20 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armeb-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+strict-align,+v8,+crc".into(), + endian: Endian::Big, + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs new file mode 100644 index 000000000..446efa90d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs @@ -0,0 +1,26 @@ +// Targets the Big endian Cortex-R4/R5 processor (ARMv7-R) + +use crate::abi::Endian; +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armebv7r-none-eabi".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + endian: Endian::Big, + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + max_atomic_width: Some(64), + emit_debug_gdb_scripts: false, + // GCC defaults to 8 for arm-none here. + c_enum_min_bits: Some(8), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs new file mode 100644 index 000000000..0c9e99ff8 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs @@ -0,0 +1,27 @@ +// Targets the Cortex-R4F/R5F processor (ARMv7-R) + +use crate::abi::Endian; +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armebv7r-none-eabihf".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + endian: Endian::Big, + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + features: "+vfp3,-d32,-fp16".into(), + max_atomic_width: Some(64), + emit_debug_gdb_scripts: false, + // GCC defaults to 8 for arm-none here. + c_enum_min_bits: Some(8), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs new file mode 100644 index 000000000..44fdd3178 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs @@ -0,0 +1,49 @@ +//! Targets the ARMv4T, with code as `a32` code by default. +//! +//! Primarily of use for the GBA, but usable with other devices too. +//! +//! Please ping @Lokathor if changes are needed. +//! +//! **Important:** This target profile **does not** specify a linker script. You +//! just get the default link script when you build a binary for this target. +//! The default link script is very likely wrong, so you should use +//! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script. + +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv4t-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + options: TargetOptions { + abi: "eabi".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + asm_args: cvs!["-mthumb-interwork", "-march=armv4t", "-mlittle-endian",], + // Force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + main_needs_argc_argv: false, + atomic_cas: false, + has_thumb_interworking: true, + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + // From thumb_base, rust-lang/rust#44993. + emit_debug_gdb_scripts: false, + // From thumb_base, GCC gives enums a minimum of 8 bits on no-os targets. + c_enum_min_bits: Some(8), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs new file mode 100644 index 000000000..5ab753c3d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv4t-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+soft-float,+strict-align".into(), + // Atomic operations provided by compiler-builtins + max_atomic_width: Some(32), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + has_thumb_interworking: true, + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs new file mode 100644 index 000000000..5e23efecd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs @@ -0,0 +1,41 @@ +//! Targets the ARMv5TE, with code as `a32` code by default. + +use crate::spec::{base, cvs, FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv5te-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + + options: TargetOptions { + abi: "eabi".into(), + // extra args passed to the external assembler (assuming `arm-none-eabi-as`): + // * activate t32/a32 interworking + // * use arch ARMv5TE + // * use little-endian + asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",], + // minimum extra features, these cannot be disabled via -C + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + frame_pointer: FramePointer::MayOmit, + main_needs_argc_argv: false, + // don't have atomic compare-and-swap + atomic_cas: false, + has_thumb_interworking: true, + + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs new file mode 100644 index 000000000..7155ab289 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv5te-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+soft-float,+strict-align".into(), + // Atomic operations provided by compiler-builtins + max_atomic_width: Some(32), + mcount: "\u{1}__gnu_mcount_nc".into(), + has_thumb_interworking: true, + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs new file mode 100644 index 000000000..3f25ab2bc --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs @@ -0,0 +1,23 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + // FIXME: this comment below does not seem applicable? + // It's important we use "gnueabihf" and not "musleabihf" here. LLVM + // uses it to determine the calling convention and float ABI, and LLVM + // doesn't support the "musleabihf" value. + llvm_target: "armv5te-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+soft-float,+strict-align".into(), + // Atomic operations provided by compiler-builtins + max_atomic_width: Some(32), + mcount: "\u{1}mcount".into(), + has_thumb_interworking: true, + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs new file mode 100644 index 000000000..af6e3baa2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv5te-unknown-linux-uclibcgnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+soft-float,+strict-align".into(), + // Atomic operations provided by compiler-builtins + max_atomic_width: Some(32), + mcount: "\u{1}__gnu_mcount_nc".into(), + has_thumb_interworking: true, + ..base::linux_uclibc::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs new file mode 100644 index 000000000..22f6ee810 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv6-unknown-freebsd-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // FIXME: change env to "gnu" when cfg_target_abi becomes stable + env: "gnueabihf".into(), + features: "+v6,+vfp2,-d32".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + ..base::freebsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs new file mode 100644 index 000000000..84d9ceac0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv6-unknown-netbsdelf-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // FIXME: remove env when cfg_target_abi becomes stable + env: "eabihf".into(), + features: "+v6,+vfp2,-d32".into(), + max_atomic_width: Some(64), + mcount: "__mcount".into(), + ..base::netbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs b/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs new file mode 100644 index 000000000..23f4a5abf --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs @@ -0,0 +1,36 @@ +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, RelocModel, Target, TargetOptions}; + +/// A base target for Nintendo 3DS devices using the devkitARM toolchain. +/// +/// Requires the devkitARM toolchain for 3DS targets on the host system. + +pub fn target() -> Target { + let pre_link_args = TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-specs=3dsx.specs", "-mtune=mpcore", "-mfloat-abi=hard", "-mtp=soft"], + ); + + Target { + llvm_target: "armv6k-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + os: "horizon".into(), + env: "newlib".into(), + vendor: "nintendo".into(), + abi: "eabihf".into(), + cpu: "mpcore".into(), + families: cvs!["unix"], + linker: Some("arm-none-eabi-gcc".into()), + relocation_model: RelocModel::Static, + features: "+vfp2".into(), + pre_link_args, + exe_suffix: ".elf".into(), + no_default_libraries: false, + has_thread_local: true, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs new file mode 100644 index 000000000..bb3e574e3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs @@ -0,0 +1,27 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, Target, TargetOptions}; + +// This target if is for the baseline of the Android v7a ABI +// in thumb mode. It's named armv7-* instead of thumbv7-* +// for historical reasons. See the thumbv7neon variant for +// enabling NEON. + +// See https://developer.android.com/ndk/guides/abis.html#v7a +// for target ABI requirements. + +pub fn target() -> Target { + let mut base = base::android::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-march=armv7-a"]); + Target { + llvm_target: "armv7-none-linux-android".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb-mode,+thumb2,+vfp3,-d32,-neon".into(), + supported_sanitizers: SanitizerSet::ADDRESS, + max_atomic_width: Some(64), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs new file mode 100644 index 000000000..62c936036 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs @@ -0,0 +1,41 @@ +use crate::abi::Endian; +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, RelocModel, Target, TargetOptions}; + +/// A base target for PlayStation Vita devices using the VITASDK toolchain (using newlib). +/// +/// Requires the VITASDK toolchain on the host system. + +pub fn target() -> Target { + let pre_link_args = TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-Wl,-q", "-Wl,--pic-veneer"], + ); + + Target { + llvm_target: "thumbv7a-vita-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + os: "vita".into(), + endian: Endian::Little, + c_int_width: "32".into(), + env: "newlib".into(), + vendor: "sony".into(), + abi: "eabihf".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No), + no_default_libraries: false, + cpu: "cortex-a9".into(), + families: cvs!["unix"], + linker: Some("arm-vita-eabi-gcc".into()), + relocation_model: RelocModel::Static, + features: "+v7,+neon,+vfp3,+thumb2,+thumb-mode".into(), + pre_link_args, + exe_suffix: ".elf".into(), + has_thumb_interworking: true, + max_atomic_width: Some(64), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs new file mode 100644 index 000000000..9f4a432c6 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-freebsd-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // FIXME: change env to "gnu" when cfg_target_abi becomes stable + env: "gnueabihf".into(), + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + ..base::freebsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs new file mode 100644 index 000000000..ad9fd773b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for glibc Linux on ARMv7 without thumb-mode, NEON or +// hardfloat. + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb2,+soft-float,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + llvm_mcount_intrinsic: Some("llvm.arm.gnu.eabi.mcount".into()), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs new file mode 100644 index 000000000..aad7977d5 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for glibc Linux on ARMv7 without NEON or +// thumb-mode. See the thumbv7neon variant for enabling both. + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // Info about features at https://wiki.debian.org/ArmHardFloatPort + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}__gnu_mcount_nc".into(), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs new file mode 100644 index 000000000..7f30a5ad7 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for musl Linux on ARMv7 without thumb-mode, NEON or +// hardfloat. + +pub fn target() -> Target { + // Most of these settings are copied from the armv7_unknown_linux_gnueabi + // target. + Target { + // It's important we use "gnueabi" and not "musleabi" here. LLVM uses it + // to determine the calling convention and float ABI, and it doesn't + // support the "musleabi" value. + llvm_target: "armv7-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb2,+soft-float,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs new file mode 100644 index 000000000..ec5c6419f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs @@ -0,0 +1,25 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for musl Linux on ARMv7 without thumb-mode or NEON. + +pub fn target() -> Target { + Target { + // It's important we use "gnueabihf" and not "musleabihf" here. LLVM + // uses it to determine the calling convention and float ABI, and LLVM + // doesn't support the "musleabihf" value. + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + // Most of these settings are copied from the armv7_unknown_linux_gnueabihf + // target. + options: TargetOptions { + abi: "eabihf".into(), + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs new file mode 100644 index 000000000..9f2ac541d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs @@ -0,0 +1,24 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for OpenHarmony on ARMv7 Linux with thumb-mode, but no NEON or +// hardfloat. + +pub fn target() -> Target { + // Most of these settings are copied from the armv7_unknown_linux_musleabi + // target. + Target { + // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead. + llvm_target: "armv7-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb2,+soft-float,-neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_ohos::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs new file mode 100644 index 000000000..212c80718 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs @@ -0,0 +1,23 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for uclibc Linux on ARMv7 without NEON, +// thumb-mode or hardfloat. + +pub fn target() -> Target { + let base = base::linux_uclibc::opts(); + Target { + llvm_target: "armv7-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + features: "+v7,+thumb2,+soft-float,-neon".into(), + cpu: "generic".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + abi: "eabi".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs new file mode 100644 index 000000000..f760ad9e7 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs @@ -0,0 +1,24 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for uclibc Linux on ARMv7 without NEON or +// thumb-mode. See the thumbv7neon variant for enabling both. + +pub fn target() -> Target { + let base = base::linux_uclibc::opts(); + Target { + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + // Info about features at https://wiki.debian.org/ArmHardFloatPort + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + cpu: "generic".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + abi: "eabihf".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs new file mode 100644 index 000000000..e5518c6da --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-netbsdelf-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // FIXME: remove env when cfg_target_abi becomes stable + env: "eabihf".into(), + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + max_atomic_width: Some(64), + mcount: "__mcount".into(), + ..base::netbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs new file mode 100644 index 000000000..0b4e64307 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // Info about features at https://wiki.debian.org/ArmHardFloatPort + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + max_atomic_width: Some(64), + ..base::vxworks::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs new file mode 100644 index 000000000..57d40d54c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let base = base::solid::opts("asp3"); + Target { + llvm_target: "armv7a-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + linker: Some("arm-kmc-eabi-gcc".into()), + features: "+v7,+soft-float,+thumb2,-neon".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(64), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs new file mode 100644 index 000000000..3d21213c5 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let base = base::solid::opts("asp3"); + Target { + llvm_target: "armv7a-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + linker: Some("arm-kmc-eabi-gcc".into()), + features: "+v7,+vfp3,-d32,+thumb2,-neon".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(64), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs new file mode 100644 index 000000000..c5b61427e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs @@ -0,0 +1,40 @@ +// Generic ARMv7-A target for bare-metal code - floating point disabled +// +// This is basically the `armv7-unknown-linux-gnueabi` target with some changes +// (listed below) to bring it closer to the bare-metal `thumb` & `aarch64` +// targets: +// +// - `TargetOptions.features`: added `+strict-align`. rationale: unaligned +// memory access is disabled on boot on these cores +// - linker changed to LLD. rationale: C is not strictly needed to build +// bare-metal binaries (the `gcc` linker has the advantage that it knows where C +// libraries and crt*.o are but it's not much of an advantage here); LLD is also +// faster +// - `panic_strategy` set to `abort`. rationale: matches `thumb` targets +// - `relocation-model` set to `static`; also no PIE, no relro and no dynamic +// linking. rationale: matches `thumb` targets + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let opts = TargetOptions { + abi: "eabi".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: "+v7,+thumb2,+soft-float,-neon,+strict-align".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(64), + panic_strategy: PanicStrategy::Abort, + emit_debug_gdb_scripts: false, + c_enum_min_bits: Some(8), + ..Default::default() + }; + Target { + llvm_target: "armv7a-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs new file mode 100644 index 000000000..ba3caad6a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs @@ -0,0 +1,32 @@ +// Generic ARMv7-A target for bare-metal code - floating point enabled (assumes +// FPU is present and emits FPU instructions) +// +// This is basically the `armv7-unknown-linux-gnueabihf` target with some +// changes (list in `armv7a_none_eabi.rs`) to bring it closer to the bare-metal +// `thumb` & `aarch64` targets. + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let opts = TargetOptions { + abi: "eabihf".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: "+v7,+vfp3,-d32,+thumb2,-neon,+strict-align".into(), + relocation_model: RelocModel::Static, + disable_redzone: true, + max_atomic_width: Some(64), + panic_strategy: PanicStrategy::Abort, + emit_debug_gdb_scripts: false, + // GCC defaults to 8 for arm-none here. + c_enum_min_bits: Some(8), + ..Default::default() + }; + Target { + llvm_target: "armv7a-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7k_apple_watchos.rs b/compiler/rustc_target/src/spec/targets/armv7k_apple_watchos.rs new file mode 100644 index 000000000..751fdcb20 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7k_apple_watchos.rs @@ -0,0 +1,30 @@ +use crate::spec::base::apple::{opts, Arch}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Armv7k; + Target { + llvm_target: "armv7k-apple-watchos".into(), + pointer_width: 32, + data_layout: "e-m:o-p:32:32-Fi8-i64:64-a:0:32-n32-S128".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+v7,+vfp4,+neon".into(), + max_atomic_width: Some(64), + forces_embed_bitcode: true, + dynamic_linking: false, + position_independent_executables: true, + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + armv7k-apple-watchos3.0.0\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..opts("watchos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs new file mode 100644 index 000000000..68b252798 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs @@ -0,0 +1,25 @@ +// Targets the Little-endian Cortex-R4/R5 processor (ARMv7-R) + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv7r-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + max_atomic_width: Some(64), + emit_debug_gdb_scripts: false, + // GCC defaults to 8 for arm-none here. + c_enum_min_bits: Some(8), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs new file mode 100644 index 000000000..909765a31 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs @@ -0,0 +1,26 @@ +// Targets the Little-endian Cortex-R4F/R5F processor (ARMv7-R) + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "armv7r-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabihf".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + features: "+vfp3,-d32,-fp16".into(), + max_atomic_width: Some(64), + emit_debug_gdb_scripts: false, + // GCC defaults to 8 for arm-none here. + c_enum_min_bits: Some(8), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv7s_apple_ios.rs b/compiler/rustc_target/src/spec/targets/armv7s_apple_ios.rs new file mode 100644 index 000000000..44c624c4e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv7s_apple_ios.rs @@ -0,0 +1,17 @@ +use crate::spec::base::apple::{ios_llvm_target, opts, Arch}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::Armv7s; + Target { + llvm_target: ios_llvm_target(arch).into(), + pointer_width: 32, + data_layout: "e-m:o-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32".into(), + arch: arch.target_arch(), + options: TargetOptions { + features: "+v7,+vfp4,+neon".into(), + max_atomic_width: Some(64), + ..opts("ios", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/asmjs_unknown_emscripten.rs b/compiler/rustc_target/src/spec/targets/asmjs_unknown_emscripten.rs new file mode 100644 index 000000000..e4768c67a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/asmjs_unknown_emscripten.rs @@ -0,0 +1,7 @@ +use crate::spec::{targets::wasm32_unknown_emscripten, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut target = wasm32_unknown_emscripten::target(); + target.add_post_link_args(LinkerFlavor::EmCc, &["-sWASM=0", "--memory-init-file", "0"]); + target +} diff --git a/compiler/rustc_target/src/spec/targets/avr_unknown_gnu_atmega328.rs b/compiler/rustc_target/src/spec/targets/avr_unknown_gnu_atmega328.rs new file mode 100644 index 000000000..bf01413a8 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/avr_unknown_gnu_atmega328.rs @@ -0,0 +1,5 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + base::avr_gnu::target("atmega328", "-mmcu=atmega328") +} diff --git a/compiler/rustc_target/src/spec/targets/bpfeb_unknown_none.rs b/compiler/rustc_target/src/spec/targets/bpfeb_unknown_none.rs new file mode 100644 index 000000000..91e091e23 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/bpfeb_unknown_none.rs @@ -0,0 +1,12 @@ +use crate::spec::Target; +use crate::{abi::Endian, spec::base}; + +pub fn target() -> Target { + Target { + llvm_target: "bpfeb".into(), + data_layout: "E-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + pointer_width: 64, + arch: "bpf".into(), + options: base::bpf::opts(Endian::Big), + } +} diff --git a/compiler/rustc_target/src/spec/targets/bpfel_unknown_none.rs b/compiler/rustc_target/src/spec/targets/bpfel_unknown_none.rs new file mode 100644 index 000000000..45ab750ea --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/bpfel_unknown_none.rs @@ -0,0 +1,12 @@ +use crate::spec::Target; +use crate::{abi::Endian, spec::base}; + +pub fn target() -> Target { + Target { + llvm_target: "bpfel".into(), + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + pointer_width: 64, + arch: "bpf".into(), + options: base::bpf::opts(Endian::Little), + } +} diff --git a/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2.rs b/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2.rs new file mode 100644 index 000000000..14cd33a26 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +// This target is for glibc Linux on Csky + +pub fn target() -> Target { + Target { + //https://github.com/llvm/llvm-project/blob/8b76aea8d8b1b71f6220bc2845abc749f18a19b7/clang/lib/Basic/Targets/CSKY.h + llvm_target: "csky-unknown-linux-gnuabiv2".into(), + pointer_width: 32, + data_layout: "e-m:e-S32-p:32:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:32-v128:32:32-a:0:32-Fi32-n32".into(), + arch: "csky".into(), + options: TargetOptions { + abi: "abiv2".into(), + features: "+2e3,+3e7,+7e10,+cache,+dsp1e2,+dspe60,+e1,+e2,+edsp,+elrw,+hard-tp,+high-registers,+hwdiv,+mp,+mp1e2,+nvic,+trust".into(), + late_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-l:libatomic.a"]), + max_atomic_width: Some(32), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2hf.rs b/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2hf.rs new file mode 100644 index 000000000..0ce271c60 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/csky_unknown_linux_gnuabiv2hf.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +// This target is for glibc Linux on Csky + +pub fn target() -> Target { + Target { + //https://github.com/llvm/llvm-project/blob/8b76aea8d8b1b71f6220bc2845abc749f18a19b7/clang/lib/Basic/Targets/CSKY.h + llvm_target: "csky-unknown-linux-gnuabiv2".into(), + pointer_width: 32, + data_layout: "e-m:e-S32-p:32:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:32-v128:32:32-a:0:32-Fi32-n32".into(), + arch: "csky".into(), + options: TargetOptions { + abi: "abiv2hf".into(), + cpu: "ck860fv".into(), + features: "+hard-float,+hard-float-abi,+2e3,+3e7,+7e10,+cache,+dsp1e2,+dspe60,+e1,+e2,+edsp,+elrw,+hard-tp,+high-registers,+hwdiv,+mp,+mp1e2,+nvic,+trust".into(), + late_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-l:libatomic.a", "-mhard-float"]), + max_atomic_width: Some(32), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/hexagon_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/hexagon_unknown_linux_musl.rs new file mode 100644 index 000000000..98a5e7abd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/hexagon_unknown_linux_musl.rs @@ -0,0 +1,29 @@ +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "hexagonv60".into(); + base.max_atomic_width = Some(32); + // FIXME: HVX length defaults are per-CPU + base.features = "-small-data,+hvx-length128b".into(); + + base.crt_static_default = false; + base.has_rpath = true; + base.linker_flavor = LinkerFlavor::Unix(Cc::Yes); + + base.c_enum_min_bits = Some(8); + + Target { + llvm_target: "hexagon-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: concat!( + "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32", + ":32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32", + ":32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048", + ":2048:2048" + ) + .into(), + arch: "hexagon".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i386_apple_ios.rs b/compiler/rustc_target/src/spec/targets/i386_apple_ios.rs new file mode 100644 index 000000000..ed2c990ff --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i386_apple_ios.rs @@ -0,0 +1,23 @@ +use crate::spec::base::apple::{ios_sim_llvm_target, opts, Arch}; +use crate::spec::{StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::I386; + Target { + // Clang automatically chooses a more specific target based on + // IPHONEOS_DEPLOYMENT_TARGET. + // This is required for the target to pick the right + // MACH-O commands, so we do too. + llvm_target: ios_sim_llvm_target(arch).into(), + pointer_width: 32, + data_layout: "e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:128-n8:16:32-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { + max_atomic_width: Some(64), + stack_probes: StackProbeType::X86, + ..opts("ios", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i386_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/i386_unknown_linux_gnu.rs new file mode 100644 index 000000000..801a88933 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i386_unknown_linux_gnu.rs @@ -0,0 +1,8 @@ +use crate::spec::Target; + +pub fn target() -> Target { + let mut base = super::i686_unknown_linux_gnu::target(); + base.cpu = "i386".into(); + base.llvm_target = "i386-unknown-linux-gnu".into(); + base +} diff --git a/compiler/rustc_target/src/spec/targets/i486_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/i486_unknown_linux_gnu.rs new file mode 100644 index 000000000..a11fbecc3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i486_unknown_linux_gnu.rs @@ -0,0 +1,8 @@ +use crate::spec::Target; + +pub fn target() -> Target { + let mut base = super::i686_unknown_linux_gnu::target(); + base.cpu = "i486".into(); + base.llvm_target = "i486-unknown-linux-gnu".into(); + base +} diff --git a/compiler/rustc_target/src/spec/targets/i586_pc_nto_qnx700.rs b/compiler/rustc_target/src/spec/targets/i586_pc_nto_qnx700.rs new file mode 100644 index 000000000..060893916 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i586_pc_nto_qnx700.rs @@ -0,0 +1,23 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "i586-pc-unknown".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: TargetOptions { + cpu: "pentium4".into(), + max_atomic_width: Some(64), + pre_link_args: TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-Vgcc_ntox86_cxx"], + ), + env: "nto70".into(), + stack_probes: StackProbeType::X86, + ..base::nto_qnx::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i586_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/i586_pc_windows_msvc.rs new file mode 100644 index 000000000..befb0f89f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i586_pc_windows_msvc.rs @@ -0,0 +1,8 @@ +use crate::spec::Target; + +pub fn target() -> Target { + let mut base = super::i686_pc_windows_msvc::target(); + base.cpu = "pentium".into(); + base.llvm_target = "i586-pc-windows-msvc".into(); + base +} diff --git a/compiler/rustc_target/src/spec/targets/i586_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/i586_unknown_linux_gnu.rs new file mode 100644 index 000000000..b699a7af1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i586_unknown_linux_gnu.rs @@ -0,0 +1,8 @@ +use crate::spec::Target; + +pub fn target() -> Target { + let mut base = super::i686_unknown_linux_gnu::target(); + base.cpu = "pentium".into(); + base.llvm_target = "i586-unknown-linux-gnu".into(); + base +} diff --git a/compiler/rustc_target/src/spec/targets/i586_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/i586_unknown_linux_musl.rs new file mode 100644 index 000000000..55a26eb00 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i586_unknown_linux_musl.rs @@ -0,0 +1,8 @@ +use crate::spec::Target; + +pub fn target() -> Target { + let mut base = super::i686_unknown_linux_musl::target(); + base.cpu = "pentium".into(); + base.llvm_target = "i586-unknown-linux-musl".into(); + base +} diff --git a/compiler/rustc_target/src/spec/targets/i586_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/i586_unknown_netbsd.rs new file mode 100644 index 000000000..8375fa4c0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i586_unknown_netbsd.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.cpu = "pentium".into(); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Call; + + Target { + llvm_target: "i586-unknown-netbsdelf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: TargetOptions { mcount: "__mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_apple_darwin.rs b/compiler/rustc_target/src/spec/targets/i686_apple_darwin.rs new file mode 100644 index 000000000..242fe5ed9 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_apple_darwin.rs @@ -0,0 +1,27 @@ +use crate::spec::base::apple::{macos_llvm_target, opts, Arch}; +use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + // ld64 only understands i386 and not i686 + let arch = Arch::I386; + let mut base = opts("macos", arch); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Darwin(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::X86; + base.frame_pointer = FramePointer::Always; + + Target { + // Clang automatically chooses a more specific target based on + // MACOSX_DEPLOYMENT_TARGET. To enable cross-language LTO to work + // correctly, we do too. + // + // While ld64 doesn't understand i686, LLVM does. + llvm_target: macos_llvm_target(Arch::I686).into(), + pointer_width: 32, + data_layout: "e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:128-n8:16:32-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { mcount: "\u{1}mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_linux_android.rs b/compiler/rustc_target/src/spec/targets/i686_linux_android.rs new file mode 100644 index 000000000..987265598 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_linux_android.rs @@ -0,0 +1,25 @@ +use crate::spec::{base, SanitizerSet, StackProbeType, Target, TargetOptions}; + +// See https://developer.android.com/ndk/guides/abis.html#x86 +// for target ABI requirements. + +pub fn target() -> Target { + let mut base = base::android::opts(); + + base.max_atomic_width = Some(64); + + // https://developer.android.com/ndk/guides/abis.html#x86 + base.cpu = "pentiumpro".into(); + base.features = "+mmx,+sse,+sse2,+sse3,+ssse3".into(); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-linux-android".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: TargetOptions { supported_sanitizers: SanitizerSet::ADDRESS, ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnu.rs b/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnu.rs new file mode 100644 index 000000000..8d4a39b58 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnu.rs @@ -0,0 +1,27 @@ +use crate::spec::{base, Cc, FramePointer, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_gnu::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.frame_pointer = FramePointer::Always; // Required for backtraces + base.linker = Some("i686-w64-mingw32-gcc".into()); + + // Mark all dynamic libraries and executables as compatible with the larger 4GiB address + // space available to x86 Windows binaries on x86_64. + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["-m", "i386pe", "--large-address-aware"], + ); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-Wl,--large-address-aware"]); + + Target { + llvm_target: "i686-pc-windows-gnu".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:32-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnullvm.rs b/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnullvm.rs new file mode 100644 index 000000000..bb410cd8c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_pc_windows_gnullvm.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Cc, FramePointer, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_gnullvm::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.frame_pointer = FramePointer::Always; // Required for backtraces + base.linker = Some("i686-w64-mingw32-clang".into()); + + // Mark all dynamic libraries and executables as compatible with the larger 4GiB address + // space available to x86 Windows binaries on x86_64. + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["-m", "i386pe", "--large-address-aware"], + ); + + Target { + llvm_target: "i686-pc-windows-gnu".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:32-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/i686_pc_windows_msvc.rs new file mode 100644 index 000000000..ba80c2319 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_pc_windows_msvc.rs @@ -0,0 +1,32 @@ +use crate::spec::{base, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_msvc::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + + base.add_pre_link_args( + LinkerFlavor::Msvc(Lld::No), + &[ + // Mark all dynamic libraries and executables as compatible with the larger 4GiB address + // space available to x86 Windows binaries on x86_64. + "/LARGEADDRESSAWARE", + // Ensure the linker will only produce an image if it can also produce a table of + // the image's safe exception handlers. + // https://docs.microsoft.com/en-us/cpp/build/reference/safeseh-image-has-safe-exception-handlers + "/SAFESEH", + ], + ); + // Workaround for #95429 + base.has_thread_local = false; + + Target { + llvm_target: "i686-pc-windows-msvc".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:128-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_freebsd.rs new file mode 100644 index 000000000..70aa0b479 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_freebsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::freebsd::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32", "-Wl,-znotext"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-freebsd".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_haiku.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_haiku.rs new file mode 100644 index 000000000..9715f6c21 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_haiku.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::haiku::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-haiku".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_hurd_gnu.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_hurd_gnu.rs new file mode 100644 index 000000000..9102673ef --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_hurd_gnu.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::hurd_gnu::opts(); + base.cpu = "pentiumpro".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::InlineOrCall { min_llvm_version_for_inline: (11, 0, 1) }; + + Target { + llvm_target: "i686-unknown-hurd-gnu".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_linux_gnu.rs new file mode 100644 index 000000000..0ca058b2f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_linux_gnu.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.supported_sanitizers = SanitizerSet::ADDRESS; + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_linux_musl.rs new file mode 100644 index 000000000..ce0df3a72 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_linux_musl.rs @@ -0,0 +1,33 @@ +use crate::spec::{base, Cc, FramePointer, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32", "-Wl,-melf_i386"]); + base.stack_probes = StackProbeType::X86; + + // The unwinder used by i686-unknown-linux-musl, the LLVM libunwind + // implementation, apparently relies on frame pointers existing... somehow. + // It's not clear to me why nor where this dependency is introduced, but the + // test suite does not pass with frame pointers eliminated and it passes + // with frame pointers present. + // + // If you think that this is no longer necessary, then please feel free to + // ignore! If it still passes the test suite and the bots then sounds good + // to me. + // + // This may or may not be related to this bug: + // https://llvm.org/bugs/show_bug.cgi?id=30879 + base.frame_pointer = FramePointer::Always; + + Target { + llvm_target: "i686-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_netbsd.rs new file mode 100644 index 000000000..2a3ac5932 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_netbsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-netbsdelf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: TargetOptions { mcount: "__mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_openbsd.rs new file mode 100644 index 000000000..45883542b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_openbsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::openbsd::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32", "-fuse-ld=lld"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-openbsd".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_unknown_uefi.rs b/compiler/rustc_target/src/spec/targets/i686_unknown_uefi.rs new file mode 100644 index 000000000..25315e19c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_unknown_uefi.rs @@ -0,0 +1,89 @@ +// This defines the ia32 target for UEFI systems as described in the UEFI specification. See the +// uefi-base module for generic UEFI options. On ia32 systems +// UEFI systems always run in protected-mode, have the interrupt-controller pre-configured and +// force a single-CPU execution. +// The cdecl ABI is used. It differs from the stdcall or fastcall ABI. +// "i686-unknown-windows" is used to get the minimal subset of windows-specific features. + +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::uefi_msvc::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + + // We disable MMX and SSE for now, even though UEFI allows using them. Problem is, you have to + // enable these CPU features explicitly before their first use, otherwise their instructions + // will trigger an exception. Rust does not inject any code that enables AVX/MMX/SSE + // instruction sets, so this must be done by the firmware. However, existing firmware is known + // to leave these uninitialized, thus triggering exceptions if we make use of them. Which is + // why we avoid them and instead use soft-floats. This is also what GRUB and friends did so + // far. + // If you initialize FP units yourself, you can override these flags with custom linker + // arguments, thus giving you access to full MMX/SSE acceleration. + base.features = "-mmx,-sse,+soft-float".into(); + + // Use -GNU here, because of the reason below: + // Background and Problem: + // If we use i686-unknown-windows, the LLVM IA32 MSVC generates compiler intrinsic + // _alldiv, _aulldiv, _allrem, _aullrem, _allmul, which will cause undefined symbol. + // A real issue is __aulldiv() is referred by __udivdi3() - udivmod_inner!(), from + // https://github.com/rust-lang-nursery/compiler-builtins. + // As result, rust-lld generates link error finally. + // Root-cause: + // In rust\src\llvm-project\llvm\lib\Target\X86\X86ISelLowering.cpp, + // we have below code to use MSVC intrinsics. It assumes MSVC target + // will link MSVC library. But that is NOT true in UEFI environment. + // UEFI does not link any MSVC or GCC standard library. + // if (Subtarget.isTargetKnownWindowsMSVC() || + // Subtarget.isTargetWindowsItanium()) { + // // Setup Windows compiler runtime calls. + // setLibcallName(RTLIB::SDIV_I64, "_alldiv"); + // setLibcallName(RTLIB::UDIV_I64, "_aulldiv"); + // setLibcallName(RTLIB::SREM_I64, "_allrem"); + // setLibcallName(RTLIB::UREM_I64, "_aullrem"); + // setLibcallName(RTLIB::MUL_I64, "_allmul"); + // setLibcallCallingConv(RTLIB::SDIV_I64, CallingConv::X86_StdCall); + // setLibcallCallingConv(RTLIB::UDIV_I64, CallingConv::X86_StdCall); + // setLibcallCallingConv(RTLIB::SREM_I64, CallingConv::X86_StdCall); + // setLibcallCallingConv(RTLIB::UREM_I64, CallingConv::X86_StdCall); + // setLibcallCallingConv(RTLIB::MUL_I64, CallingConv::X86_StdCall); + // } + // The compiler intrinsics should be implemented by compiler-builtins. + // Unfortunately, compiler-builtins has not provided those intrinsics yet. Such as: + // i386/divdi3.S + // i386/lshrdi3.S + // i386/moddi3.S + // i386/muldi3.S + // i386/udivdi3.S + // i386/umoddi3.S + // Possible solution: + // 1. Eliminate Intrinsics generation. + // 1.1 Choose different target to bypass isTargetKnownWindowsMSVC(). + // 1.2 Remove the "Setup Windows compiler runtime calls" in LLVM + // 2. Implement Intrinsics. + // We evaluated all options. + // #2 is hard because we need implement the intrinsics (_aulldiv) generated + // from the other intrinsics (__udivdi3) implementation with the same + // functionality (udivmod_inner). If we let _aulldiv() call udivmod_inner!(), + // then we are in loop. We may have to find another way to implement udivmod_inner!(). + // #1.2 may break the existing usage. + // #1.1 seems the simplest solution today. + // The IA32 -gnu calling convention is same as the one defined in UEFI specification. + // It uses cdecl, EAX/ECX/EDX as volatile register, and EAX/EDX as return value. + // We also checked the LLVM X86TargetLowering, the differences between -gnu and -msvc + // is fmodf(f32), longjmp() and TLS. None of them impacts the UEFI code. + // As a result, we choose -gnu for i686 version before those intrinsics are implemented in + // compiler-builtins. After compiler-builtins implements all required intrinsics, we may + // remove -gnu and use the default one. + Target { + llvm_target: "i686-unknown-windows-gnu".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:32-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_uwp_windows_gnu.rs b/compiler/rustc_target/src/spec/targets/i686_uwp_windows_gnu.rs new file mode 100644 index 000000000..ec211a710 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_uwp_windows_gnu.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Cc, FramePointer, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_uwp_gnu::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.frame_pointer = FramePointer::Always; // Required for backtraces + + // Mark all dynamic libraries and executables as compatible with the larger 4GiB address + // space available to x86 Windows binaries on x86_64. + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["-m", "i386pe", "--large-address-aware"], + ); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-Wl,--large-address-aware"]); + + Target { + llvm_target: "i686-pc-windows-gnu".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:32-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_uwp_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/i686_uwp_windows_msvc.rs new file mode 100644 index 000000000..7cca2fc6b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_uwp_windows_msvc.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_uwp_msvc::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "i686-pc-windows-msvc".into(), + pointer_width: 32, + data_layout: "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:128-n8:16:32-a:0:32-S32" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/i686_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/i686_wrs_vxworks.rs new file mode 100644 index 000000000..965a89597 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/i686_wrs_vxworks.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::vxworks::opts(); + base.cpu = "pentium4".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "i686-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/loongarch64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_linux_gnu.rs new file mode 100644 index 000000000..0f05e7c47 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_linux_gnu.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "loongarch64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".into(), + arch: "loongarch64".into(), + options: TargetOptions { + cpu: "generic".into(), + features: "+f,+d".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none.rs b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none.rs new file mode 100644 index 000000000..3b1ea8e20 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none.rs @@ -0,0 +1,23 @@ +use crate::spec::{Cc, CodeModel, LinkerFlavor, Lld, PanicStrategy, RelocModel}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "loongarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".into(), + arch: "loongarch64".into(), + options: TargetOptions { + cpu: "generic".into(), + features: "+f,+d".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + code_model: Some(CodeModel::Small), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none_softfloat.rs b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none_softfloat.rs new file mode 100644 index 000000000..ab9300ef9 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/loongarch64_unknown_none_softfloat.rs @@ -0,0 +1,24 @@ +use crate::spec::{Cc, CodeModel, LinkerFlavor, Lld, PanicStrategy, RelocModel}; +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "loongarch64-unknown-none".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".into(), + arch: "loongarch64".into(), + options: TargetOptions { + cpu: "generic".into(), + features: "-f,-d".into(), + abi: "softfloat".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + llvm_abiname: "lp64s".into(), + max_atomic_width: Some(64), + relocation_model: RelocModel::Static, + panic_strategy: PanicStrategy::Abort, + code_model: Some(CodeModel::Small), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/m68k_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/m68k_unknown_linux_gnu.rs new file mode 100644 index 000000000..b54f5d753 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/m68k_unknown_linux_gnu.rs @@ -0,0 +1,16 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "M68020".into(); + base.max_atomic_width = Some(32); + + Target { + llvm_target: "m68k-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:16:32-i8:8:8-i16:16:16-i32:16:32-n8:16:32-a:0:16-S16".into(), + arch: "m68k".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips64_openwrt_linux_musl.rs b/compiler/rustc_target/src/spec/targets/mips64_openwrt_linux_musl.rs new file mode 100644 index 000000000..6191a6dfd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips64_openwrt_linux_musl.rs @@ -0,0 +1,26 @@ +/// A target tuple for OpenWrt MIPS64 targets +/// +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "mips64r2".into(); + base.features = "+mips64r2,+soft-float".into(); + base.max_atomic_width = Some(64); + base.crt_static_default = false; + + Target { + // LLVM doesn't recognize "muslabi64" yet. + llvm_target: "mips64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64".into(), + options: TargetOptions { + abi: "abi64".into(), + endian: Endian::Big, + mcount: "_mcount".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_gnuabi64.rs new file mode 100644 index 000000000..e1131f07f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_gnuabi64.rs @@ -0,0 +1,22 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mips64-unknown-linux-gnuabi64".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64".into(), + options: TargetOptions { + abi: "abi64".into(), + endian: Endian::Big, + // NOTE(mips64r2) matches C toolchain + cpu: "mips64r2".into(), + features: "+mips64r2,+xgot".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_muslabi64.rs b/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_muslabi64.rs new file mode 100644 index 000000000..147c1c224 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips64_unknown_linux_muslabi64.rs @@ -0,0 +1,22 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "mips64r2".into(); + base.features = "+mips64r2".into(); + base.max_atomic_width = Some(64); + Target { + // LLVM doesn't recognize "muslabi64" yet. + llvm_target: "mips64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64".into(), + options: TargetOptions { + abi: "abi64".into(), + endian: Endian::Big, + mcount: "_mcount".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_gnuabi64.rs new file mode 100644 index 000000000..4c612554d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_gnuabi64.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mips64el-unknown-linux-gnuabi64".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64".into(), + options: TargetOptions { + abi: "abi64".into(), + // NOTE(mips64r2) matches C toolchain + cpu: "mips64r2".into(), + features: "+mips64r2,+xgot".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_muslabi64.rs b/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_muslabi64.rs new file mode 100644 index 000000000..d60404f0c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips64el_unknown_linux_muslabi64.rs @@ -0,0 +1,16 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "mips64r2".into(); + base.features = "+mips64r2".into(); + base.max_atomic_width = Some(64); + Target { + // LLVM doesn't recognize "muslabi64" yet. + llvm_target: "mips64el-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64".into(), + options: TargetOptions { abi: "abi64".into(), mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_gnu.rs new file mode 100644 index 000000000..c49b89bbd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_gnu.rs @@ -0,0 +1,20 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mips-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + options: TargetOptions { + endian: Endian::Big, + cpu: "mips32r2".into(), + features: "+mips32r2,+fpxx,+nooddspreg".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_musl.rs new file mode 100644 index 000000000..92d2d9d84 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_musl.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "mips32r2".into(); + base.features = "+mips32r2,+soft-float".into(); + base.max_atomic_width = Some(32); + base.crt_static_default = false; + Target { + llvm_target: "mips-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mips_unknown_linux_uclibc.rs b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_uclibc.rs new file mode 100644 index 000000000..51df0a974 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mips_unknown_linux_uclibc.rs @@ -0,0 +1,20 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mips-unknown-linux-uclibc".into(), + pointer_width: 32, + data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + options: TargetOptions { + endian: Endian::Big, + cpu: "mips32r2".into(), + features: "+mips32r2,+soft-float".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_uclibc::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_sony_psp.rs b/compiler/rustc_target/src/spec/targets/mipsel_sony_psp.rs new file mode 100644 index 000000000..75beb91b1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_sony_psp.rs @@ -0,0 +1,36 @@ +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, RelocModel, Target, TargetOptions}; + +// The PSP has custom linker requirements. +const LINKER_SCRIPT: &str = include_str!("./mipsel_sony_psp_linker_script.ld"); + +pub fn target() -> Target { + let pre_link_args = TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["--emit-relocs", "--nmagic"], + ); + + Target { + llvm_target: "mipsel-sony-psp".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + + options: TargetOptions { + os: "psp".into(), + vendor: "sony".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + cpu: "mips2".into(), + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + + // PSP FPU only supports single precision floats. + features: "+single-float".into(), + + // PSP does not support trap-on-condition instructions. + llvm_args: cvs!["-mno-check-zero-division"], + pre_link_args, + link_script: Some(LINKER_SCRIPT.into()), + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_sony_psp_linker_script.ld b/compiler/rustc_target/src/spec/targets/mipsel_sony_psp_linker_script.ld new file mode 100644 index 000000000..9eb35ad9f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_sony_psp_linker_script.ld @@ -0,0 +1,45 @@ +ENTRY(module_start) +SECTIONS +{ + /* PRX format requires text to begin at 0 */ + .text 0 : { *(.text .text.*) } + + /* Sort stubs for convenient ordering */ + .sceStub.text : { *(.sceStub.text) *(SORT(.sceStub.text.*)) } + + /* PSP import library stub sections. Bundles together `.lib.stub.entry.*` + * sections for better `--gc-sections` support. */ + .lib.stub.top : { *(.lib.stub.top) } + .lib.stub : { *(.lib.stub) *(.lib.stub.entry.*) } + .lib.stub.btm : { *(.lib.stub.btm) } + + /* Keep these sections around, even though they may appear unused to the linker */ + .lib.ent.top : { KEEP(*(.lib.ent.top)) } + .lib.ent : { KEEP(*(.lib.ent)) } + .lib.ent.btm : { KEEP(*(.lib.ent.btm)) } + + .eh_frame_hdr : { *(.eh_frame_hdr) } + + /* Add symbols for LLVM's libunwind */ + __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0; + __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0; + .eh_frame : + { + __eh_frame_start = .; + KEEP(*(.eh_frame)) + __eh_frame_end = .; + } + + /* These are explicitly listed to avoid being merged into .rodata */ + .rodata.sceResident : { *(.rodata.sceResident) *(.rodata.sceResident.*) } + .rodata.sceModuleInfo : { *(.rodata.sceModuleInfo) } + /* Sort NIDs for convenient ordering */ + .rodata.sceNid : { *(.rodata.sceNid) *(SORT(.rodata.sceNid.*)) } + + .rodata : { *(.rodata .rodata.*) } + .data : { *(.data .data.*) } + .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*) } + .bss : { *(.bss .bss.*) } + + /DISCARD/ : { *(.rel.sceStub.text .MIPS.abiflags .reginfo) } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_sony_psx.rs b/compiler/rustc_target/src/spec/targets/mipsel_sony_psx.rs new file mode 100644 index 000000000..12a66efdd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_sony_psx.rs @@ -0,0 +1,37 @@ +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsel-sony-psx".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + + options: TargetOptions { + os: "none".into(), + env: "psx".into(), + vendor: "sony".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + cpu: "mips1".into(), + executables: true, + linker: Some("rust-lld".into()), + relocation_model: RelocModel::Static, + exe_suffix: ".exe".into(), + + // PSX doesn't natively support floats. + features: "+soft-float".into(), + + // This should be 16 bits, but LLVM incorrectly tries emitting MIPS-II SYNC instructions + // for atomic loads and stores. This crashes rustc so we have to disable the Atomic* API + // until this is fixed upstream. See https://reviews.llvm.org/D122427#3420144 for more + // info. + max_atomic_width: Some(0), + + // PSX does not support trap-on-condition instructions. + llvm_args: cvs!["-mno-check-zero-division"], + llvm_abiname: "o32".into(), + panic_strategy: PanicStrategy::Abort, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_gnu.rs new file mode 100644 index 000000000..c2e482148 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_gnu.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsel-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + + options: TargetOptions { + cpu: "mips32r2".into(), + features: "+mips32r2,+fpxx,+nooddspreg".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_musl.rs new file mode 100644 index 000000000..5eed05045 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_musl.rs @@ -0,0 +1,16 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "mips32r2".into(); + base.features = "+mips32r2,+soft-float".into(); + base.max_atomic_width = Some(32); + base.crt_static_default = false; + Target { + llvm_target: "mipsel-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + options: TargetOptions { mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_uclibc.rs b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_uclibc.rs new file mode 100644 index 000000000..77e69119d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_uclibc.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsel-unknown-linux-uclibc".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + + options: TargetOptions { + cpu: "mips32r2".into(), + features: "+mips32r2,+soft-float".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_uclibc::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/mipsel_unknown_netbsd.rs new file mode 100644 index 000000000..706a1af3e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_unknown_netbsd.rs @@ -0,0 +1,21 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.max_atomic_width = Some(32); + base.cpu = "mips32".into(); + + Target { + llvm_target: "mipsel-unknown-netbsd".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + options: TargetOptions { + features: "+soft-float".into(), + mcount: "__mcount".into(), + endian: Endian::Little, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsel_unknown_none.rs b/compiler/rustc_target/src/spec/targets/mipsel_unknown_none.rs new file mode 100644 index 000000000..43b01e7a0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsel_unknown_none.rs @@ -0,0 +1,26 @@ +//! Bare MIPS32r2, little endian, softfloat, O32 calling convention +//! +//! Can be used for MIPS M4K core (e.g. on PIC32MX devices) + +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsel-unknown-none".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + cpu: "mips32r2".into(), + features: "+mips32r2,+soft-float,+noabicalls".into(), + max_atomic_width: Some(32), + linker: Some("rust-lld".into()), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsisa32r6_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/mipsisa32r6_unknown_linux_gnu.rs new file mode 100644 index 000000000..59783882e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsisa32r6_unknown_linux_gnu.rs @@ -0,0 +1,20 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsisa32r6-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips32r6".into(), + options: TargetOptions { + endian: Endian::Big, + cpu: "mips32r6".into(), + features: "+mips32r6".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsisa32r6el_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/mipsisa32r6el_unknown_linux_gnu.rs new file mode 100644 index 000000000..c3d79412e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsisa32r6el_unknown_linux_gnu.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsisa32r6el-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), + arch: "mips32r6".into(), + + options: TargetOptions { + cpu: "mips32r6".into(), + features: "+mips32r6".into(), + max_atomic_width: Some(32), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsisa64r6_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/targets/mipsisa64r6_unknown_linux_gnuabi64.rs new file mode 100644 index 000000000..2ae6e7521 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsisa64r6_unknown_linux_gnuabi64.rs @@ -0,0 +1,22 @@ +use crate::abi::Endian; +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsisa64r6-unknown-linux-gnuabi64".into(), + pointer_width: 64, + data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64r6".into(), + options: TargetOptions { + abi: "abi64".into(), + endian: Endian::Big, + // NOTE(mips64r6) matches C toolchain + cpu: "mips64r6".into(), + features: "+mips64r6".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/mipsisa64r6el_unknown_linux_gnuabi64.rs b/compiler/rustc_target/src/spec/targets/mipsisa64r6el_unknown_linux_gnuabi64.rs new file mode 100644 index 000000000..31637e9f6 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/mipsisa64r6el_unknown_linux_gnuabi64.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "mipsisa64r6el-unknown-linux-gnuabi64".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(), + arch: "mips64r6".into(), + options: TargetOptions { + abi: "abi64".into(), + // NOTE(mips64r6) matches C toolchain + cpu: "mips64r6".into(), + features: "+mips64r6".into(), + max_atomic_width: Some(64), + mcount: "_mcount".into(), + + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs b/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs new file mode 100644 index 000000000..251fd2a0a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/msp430_none_elf.rs @@ -0,0 +1,59 @@ +use crate::spec::{cvs, Cc, LinkerFlavor, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "msp430-none-elf".into(), + pointer_width: 16, + data_layout: "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16".into(), + arch: "msp430".into(), + + options: TargetOptions { + c_int_width: "16".into(), + + // The LLVM backend currently can't generate object files. To + // workaround this LLVM generates assembly files which then we feed + // to gcc to get object files. For this reason we have a hard + // dependency on this specific gcc. + asm_args: cvs!["-mcpu=msp430"], + linker: Some("msp430-elf-gcc".into()), + linker_flavor: LinkerFlavor::Unix(Cc::Yes), + + // There are no atomic CAS instructions available in the MSP430 + // instruction set, and the LLVM backend doesn't currently support + // compiler fences so the Atomic* API is missing on this target. + // When the LLVM backend gains support for compile fences uncomment + // the `singlethread: true` line and set `max_atomic_width` to + // `Some(16)`. + max_atomic_width: Some(0), + atomic_cas: false, + // singlethread: true, + + // Because these devices have very little resources having an + // unwinder is too onerous so we default to "abort" because the + // "unwind" strategy is very rare. + panic_strategy: PanicStrategy::Abort, + + // Similarly, one almost always never wants to use relocatable + // code because of the extra costs it involves. + relocation_model: RelocModel::Static, + + // Right now we invoke an external assembler and this isn't + // compatible with multiple codegen units, and plus we probably + // don't want to invoke that many gcc instances. + default_codegen_units: Some(1), + + // Since MSP430 doesn't meaningfully support faulting on illegal + // instructions, LLVM generates a call to abort() function instead + // of a trap instruction. Such calls are 4 bytes long, and that is + // too much overhead for such small target. + trap_unreachable: false, + + // See the thumb_base.rs file for an explanation of this value + emit_debug_gdb_scripts: false, + + eh_frame_header: false, + + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/nvptx64_nvidia_cuda.rs b/compiler/rustc_target/src/spec/targets/nvptx64_nvidia_cuda.rs new file mode 100644 index 000000000..b0582b235 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/nvptx64_nvidia_cuda.rs @@ -0,0 +1,52 @@ +use crate::spec::{LinkerFlavor, MergeFunctions, PanicStrategy, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + arch: "nvptx64".into(), + data_layout: "e-i64:64-i128:128-v16:16-v32:32-n16:32:64".into(), + llvm_target: "nvptx64-nvidia-cuda".into(), + pointer_width: 64, + + options: TargetOptions { + os: "cuda".into(), + vendor: "nvidia".into(), + linker_flavor: LinkerFlavor::Ptx, + // The linker can be installed from `crates.io`. + linker: Some("rust-ptx-linker".into()), + + // With `ptx-linker` approach, it can be later overridden via link flags. + cpu: "sm_30".into(), + + // FIXME: create tests for the atomics. + max_atomic_width: Some(64), + + // Unwinding on CUDA is neither feasible nor useful. + panic_strategy: PanicStrategy::Abort, + + // Needed to use `dylib` and `bin` crate types and the linker. + dynamic_linking: true, + + // Avoid using dylib because it contain metadata not supported + // by LLVM NVPTX backend. + only_cdylib: true, + + // Let the `ptx-linker` to handle LLVM lowering into MC / assembly. + obj_is_bitcode: true, + + // Convenient and predicable naming scheme. + dll_prefix: "".into(), + dll_suffix: ".ptx".into(), + exe_suffix: ".ptx".into(), + + // Disable MergeFunctions LLVM optimisation pass because it can + // produce kernel functions that call other kernel functions. + // This behavior is not supported by PTX ISA. + merge_functions: MergeFunctions::Disabled, + + // The LLVM backend does not support stack canaries for this target + supports_stack_protector: false, + + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_ibm_aix.rs b/compiler/rustc_target/src/spec/targets/powerpc64_ibm_aix.rs new file mode 100644 index 000000000..c512e4c7c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_ibm_aix.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut base = base::aix::opts(); + base.max_atomic_width = Some(64); + base.add_pre_link_args( + LinkerFlavor::Unix(Cc::No), + &["-b64", "-bpT:0x100000000", "-bpD:0x110000000", "-bcdtors:all:0:s"], + ); + + Target { + llvm_target: "powerpc64-ibm-aix".into(), + pointer_width: 64, + data_layout: "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs new file mode 100644 index 000000000..e470ec05e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_freebsd.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::freebsd::opts(); + base.cpu = "ppc64".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64-unknown-freebsd".into(), + pointer_width: 64, + data_layout: "E-m:e-Fn32-i64:64-n32:64".into(), + arch: "powerpc64".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs new file mode 100644 index 000000000..34e3184d3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_gnu.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "ppc64".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs new file mode 100644 index 000000000..e2e707f4a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_linux_musl.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "ppc64".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs new file mode 100644 index 000000000..ebaeb04be --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_unknown_openbsd.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::openbsd::opts(); + base.cpu = "ppc64".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64-unknown-openbsd".into(), + pointer_width: 64, + data_layout: "E-m:e-Fn32-i64:64-n32:64".into(), + arch: "powerpc64".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs new file mode 100644 index 000000000..e2085ba7c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64_wrs_vxworks.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::vxworks::opts(); + base.cpu = "ppc64".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "E-m:e-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: TargetOptions { endian: Endian::Big, ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs new file mode 100644 index 000000000..b399d36d8 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_freebsd.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::freebsd::opts(); + base.cpu = "ppc64le".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64le-unknown-freebsd".into(), + pointer_width: 64, + data_layout: "e-m:e-Fn32-i64:64-n32:64".into(), + arch: "powerpc64".into(), + options: TargetOptions { mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs new file mode 100644 index 000000000..194c3170e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_gnu.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "ppc64le".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64le-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: TargetOptions { mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs new file mode 100644 index 000000000..1f53e6895 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc64le_unknown_linux_musl.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "ppc64le".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc64le-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512".into(), + arch: "powerpc64".into(), + options: TargetOptions { mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_freebsd.rs new file mode 100644 index 000000000..6d094f9a3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_freebsd.rs @@ -0,0 +1,26 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::freebsd::opts(); + // Extra hint to linker that we are generating secure-PLT code. + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-m32", "--target=powerpc-unknown-freebsd13.0"], + ); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-freebsd13.0".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { + endian: Endian::Big, + features: "+secure-plt".into(), + mcount: "_mcount".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnu.rs new file mode 100644 index 000000000..1600698da --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnu.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs new file mode 100644 index 000000000..af0fbfebe --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs @@ -0,0 +1,22 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mspe"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-linux-gnuspe".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { + abi: "spe".into(), + endian: Endian::Big, + mcount: "_mcount".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_musl.rs new file mode 100644 index 000000000..9b0ac4a0f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_musl.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_netbsd.rs new file mode 100644 index 000000000..bc2e239d9 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_netbsd.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-netbsd".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { endian: Endian::Big, mcount: "__mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_openbsd.rs new file mode 100644 index 000000000..081aaaea2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_openbsd.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::openbsd::opts(); + base.endian = Endian::Big; + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-openbsd".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks.rs new file mode 100644 index 000000000..e8bccc153 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::vxworks::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m32", "--secure-plt"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { endian: Endian::Big, features: "+secure-plt".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs new file mode 100644 index 000000000..fa4ef098e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs @@ -0,0 +1,23 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::vxworks::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mspe", "--secure-plt"]); + base.max_atomic_width = Some(32); + base.stack_probes = StackProbeType::Inline; + + Target { + llvm_target: "powerpc-unknown-linux-gnuspe".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-Fn32-i64:64-n32".into(), + arch: "powerpc".into(), + options: TargetOptions { + abi: "spe".into(), + endian: Endian::Big, + // feature msync would disable instruction 'fsync' which is not supported by fsl_p1p2 + features: "+secure-plt,+msync".into(), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs new file mode 100644 index 000000000..06e8f1837 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv32-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + arch: "riscv32".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv32".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "ilp32d".into(), + max_atomic_width: Some(32), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs new file mode 100644 index 000000000..722703d23 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv32-unknown-linux-musl".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + arch: "riscv32".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv32".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "ilp32d".into(), + max_atomic_width: Some(32), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32i_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32i_unknown_none_elf.rs new file mode 100644 index 000000000..75a65a268 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32i_unknown_none_elf.rs @@ -0,0 +1,23 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(0), + atomic_cas: false, + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32im_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32im_unknown_none_elf.rs new file mode 100644 index 000000000..f2242bbe0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32im_unknown_none_elf.rs @@ -0,0 +1,24 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(0), + atomic_cas: false, + features: "+m".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32imac_esp_espidf.rs b/compiler/rustc_target/src/spec/targets/riscv32imac_esp_espidf.rs new file mode 100644 index 000000000..25f5c3bc2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32imac_esp_espidf.rs @@ -0,0 +1,31 @@ +use crate::spec::{cvs, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + families: cvs!["unix"], + os: "espidf".into(), + env: "newlib".into(), + vendor: "espressif".into(), + linker: Some("riscv32-esp-elf-gcc".into()), + cpu: "generic-rv32".into(), + + // As RiscV32IMAC architecture does natively support atomics, + // automatically enable the support for the Rust STD library. + max_atomic_width: Some(32), + atomic_cas: true, + + features: "+m,+a,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_none_elf.rs new file mode 100644 index 000000000..55c6e4d16 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_none_elf.rs @@ -0,0 +1,23 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(32), + features: "+m,+a,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_xous_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_xous_elf.rs new file mode 100644 index 000000000..a263e5d5c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32imac_unknown_xous_elf.rs @@ -0,0 +1,22 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + os: "xous".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(32), + features: "+m,+a,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32imc_esp_espidf.rs b/compiler/rustc_target/src/spec/targets/riscv32imc_esp_espidf.rs new file mode 100644 index 000000000..3aa9923ee --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32imc_esp_espidf.rs @@ -0,0 +1,34 @@ +use crate::spec::{cvs, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + families: cvs!["unix"], + os: "espidf".into(), + env: "newlib".into(), + vendor: "espressif".into(), + linker: Some("riscv32-esp-elf-gcc".into()), + cpu: "generic-rv32".into(), + + // While the RiscV32IMC architecture does not natively support atomics, ESP-IDF does support + // the __atomic* and __sync* GCC builtins, so setting `max_atomic_width` to `Some(32)` + // and `atomic_cas` to `true` will cause the compiler to emit libcalls to these builtins. + // + // Support for atomics is necessary for the Rust STD library, which is supported by the ESP-IDF framework. + max_atomic_width: Some(32), + atomic_cas: true, + + features: "+m,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv32imc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv32imc_unknown_none_elf.rs new file mode 100644 index 000000000..01e773fae --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv32imc_unknown_none_elf.rs @@ -0,0 +1,24 @@ +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(), + llvm_target: "riscv32".into(), + pointer_width: 32, + arch: "riscv32".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv32".into(), + max_atomic_width: Some(0), + atomic_cas: false, + features: "+m,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs new file mode 100644 index 000000000..40e447dbb --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, CodeModel, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-linux-android".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(), + llvm_abiname: "lp64d".into(), + supported_sanitizers: SanitizerSet::ADDRESS, + max_atomic_width: Some(64), + ..base::android::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs new file mode 100644 index 000000000..2c7878de8 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-freebsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..base::freebsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs new file mode 100644 index 000000000..a29470c24 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, CodeModel, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + supported_sanitizers: SanitizerSet::SHADOWCALLSTACK, + ..base::fuchsia::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs new file mode 100644 index 000000000..b7e29d2da --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, CodeModel, RelocModel, Target, TargetOptions, TlsModel}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-hermit".into(), + pointer_width: 64, + arch: "riscv64".into(), + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + options: TargetOptions { + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + relocation_model: RelocModel::Pic, + code_model: Some(CodeModel::Medium), + tls_model: TlsModel::LocalExec, + max_atomic_width: Some(64), + llvm_abiname: "lp64d".into(), + ..base::hermit::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs new file mode 100644 index 000000000..c0969d4e1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs new file mode 100644 index 000000000..656e260d0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs new file mode 100644 index 000000000..43a313a94 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-netbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + mcount: "__mcount".into(), + ..base::netbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs new file mode 100644 index 000000000..f29e22424 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs @@ -0,0 +1,28 @@ +use crate::spec::SanitizerSet; +use crate::spec::{Cc, CodeModel, LinkerFlavor, Lld, PanicStrategy}; +use crate::spec::{RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + llvm_target: "riscv64".into(), + pointer_width: 64, + arch: "riscv64".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + llvm_abiname: "lp64d".into(), + cpu: "generic-rv64".into(), + max_atomic_width: Some(64), + features: "+m,+a,+f,+d,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + code_model: Some(CodeModel::Medium), + emit_debug_gdb_scripts: false, + eh_frame_header: false, + supported_sanitizers: SanitizerSet::KERNELADDRESS, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs new file mode 100644 index 000000000..1f1da7d5a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, CodeModel, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-openbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..base::openbsd::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/riscv64imac_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64imac_unknown_none_elf.rs new file mode 100644 index 000000000..0f1821c99 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/riscv64imac_unknown_none_elf.rs @@ -0,0 +1,26 @@ +use crate::spec::{Cc, CodeModel, LinkerFlavor, Lld, PanicStrategy}; +use crate::spec::{RelocModel, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + llvm_target: "riscv64".into(), + pointer_width: 64, + arch: "riscv64".into(), + + options: TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + cpu: "generic-rv64".into(), + max_atomic_width: Some(64), + features: "+m,+a,+c".into(), + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + code_model: Some(CodeModel::Medium), + emit_debug_gdb_scripts: false, + eh_frame_header: false, + supported_sanitizers: SanitizerSet::KERNELADDRESS, + ..Default::default() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_gnu.rs new file mode 100644 index 000000000..6fc410eb2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_gnu.rs @@ -0,0 +1,26 @@ +use crate::abi::Endian; +use crate::spec::{base, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.endian = Endian::Big; + // z10 is the oldest CPU supported by LLVM + base.cpu = "z10".into(); + // FIXME: The ABI implementation in cabi_s390x.rs is for now hard-coded to assume the no-vector + // ABI. Pass the -vector feature string to LLVM to respect this assumption. On LLVM < 16, we + // also strip v128 from the data_layout below to match the older LLVM's expectation. + base.features = "-vector".into(); + base.max_atomic_width = Some(64); + base.min_global_align = Some(16); + base.stack_probes = StackProbeType::Inline; + base.supported_sanitizers = + SanitizerSet::ADDRESS | SanitizerSet::LEAK | SanitizerSet::MEMORY | SanitizerSet::THREAD; + + Target { + llvm_target: "s390x-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64".into(), + arch: "s390x".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_musl.rs new file mode 100644 index 000000000..03772aab3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_musl.rs @@ -0,0 +1,27 @@ +use crate::abi::Endian; +use crate::spec::{base, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.endian = Endian::Big; + // z10 is the oldest CPU supported by LLVM + base.cpu = "z10".into(); + // FIXME: The ABI implementation in cabi_s390x.rs is for now hard-coded to assume the no-vector + // ABI. Pass the -vector feature string to LLVM to respect this assumption. On LLVM < 16, we + // also strip v128 from the data_layout below to match the older LLVM's expectation. + base.features = "-vector".into(); + base.max_atomic_width = Some(64); + base.min_global_align = Some(16); + base.static_position_independent_executables = true; + base.stack_probes = StackProbeType::Inline; + base.supported_sanitizers = + SanitizerSet::ADDRESS | SanitizerSet::LEAK | SanitizerSet::MEMORY | SanitizerSet::THREAD; + + Target { + llvm_target: "s390x-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64".into(), + arch: "s390x".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparc64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/sparc64_unknown_linux_gnu.rs new file mode 100644 index 000000000..20ec9a84e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparc64_unknown_linux_gnu.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.endian = Endian::Big; + base.cpu = "v9".into(); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "sparc64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "E-m:e-i64:64-n32:64-S128".into(), + arch: "sparc64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparc64_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/sparc64_unknown_netbsd.rs new file mode 100644 index 000000000..c8c0fd2e1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparc64_unknown_netbsd.rs @@ -0,0 +1,17 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.cpu = "v9".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "sparc64-unknown-netbsd".into(), + pointer_width: 64, + data_layout: "E-m:e-i64:64-n32:64-S128".into(), + arch: "sparc64".into(), + options: TargetOptions { endian: Endian::Big, mcount: "__mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparc64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/sparc64_unknown_openbsd.rs new file mode 100644 index 000000000..82ce61006 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparc64_unknown_openbsd.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::openbsd::opts(); + base.endian = Endian::Big; + base.cpu = "v9".into(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "sparc64-unknown-openbsd".into(), + pointer_width: 64, + data_layout: "E-m:e-i64:64-n32:64-S128".into(), + arch: "sparc64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/sparc_unknown_linux_gnu.rs new file mode 100644 index 000000000..548fbb9ed --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparc_unknown_linux_gnu.rs @@ -0,0 +1,18 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.endian = Endian::Big; + base.cpu = "v9".into(); + base.max_atomic_width = Some(32); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mv8plus"]); + + Target { + llvm_target: "sparc-unknown-linux-gnu".into(), + pointer_width: 32, + data_layout: "E-m:e-p:32:32-i64:64-f128:64-n32-S64".into(), + arch: "sparc".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/sparc_unknown_none_elf.rs new file mode 100644 index 000000000..7e908a0f3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparc_unknown_none_elf.rs @@ -0,0 +1,27 @@ +use crate::abi::Endian; +use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; + +pub fn target() -> Target { + let options = TargetOptions { + linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No), + linker: Some("sparc-elf-gcc".into()), + endian: Endian::Big, + cpu: "v7".into(), + abi: "elf".into(), + max_atomic_width: Some(32), + atomic_cas: true, + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + no_default_libraries: false, + emit_debug_gdb_scripts: false, + eh_frame_header: false, + ..Default::default() + }; + Target { + data_layout: "E-m:e-p:32:32-i64:64-f128:64-n32-S64".into(), + llvm_target: "sparc-unknown-none-elf".into(), + pointer_width: 32, + arch: "sparc".into(), + options, + } +} diff --git a/compiler/rustc_target/src/spec/targets/sparcv9_sun_solaris.rs b/compiler/rustc_target/src/spec/targets/sparcv9_sun_solaris.rs new file mode 100644 index 000000000..16cd991dd --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/sparcv9_sun_solaris.rs @@ -0,0 +1,24 @@ +use crate::abi::Endian; +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut base = base::solaris::opts(); + base.endian = Endian::Big; + base.add_pre_link_args(LinkerFlavor::Unix(Cc::Yes), &["-m64"]); + // llvm calls this "v9" + base.cpu = "v9".into(); + base.vendor = "sun".into(); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "sparcv9-sun-solaris".into(), + pointer_width: 64, + data_layout: "E-m:e-i64:64-n32:64-S128".into(), + // Use "sparc64" instead of "sparcv9" here, since the former is already + // used widely in the source base. If we ever needed ABI + // differentiation from the sparc64, we could, but that would probably + // just be confusing. + arch: "sparc64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs new file mode 100644 index 000000000..7b5c019b1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs @@ -0,0 +1,59 @@ +//! Targets the ARMv4T, with code as `t32` code by default. +//! +//! Primarily of use for the GBA, but usable with other devices too. +//! +//! Please ping @Lokathor if changes are needed. +//! +//! **Important:** This target profile **does not** specify a linker script. You +//! just get the default link script when you build a binary for this target. +//! The default link script is very likely wrong, so you should use +//! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script. + +use crate::spec::{base, PanicStrategy, RelocModel, Target, TargetOptions}; +use crate::spec::{cvs, FramePointer}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv4t-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + options: TargetOptions { + abi: "eabi".into(), + + // extra args passed to the external assembler (assuming `arm-none-eabi-as`): + // * activate t32/a32 interworking + // * use arch ARMv4T + // * use little-endian + asm_args: cvs!["-mthumb-interwork", "-march=armv4t", "-mlittle-endian",], + + // minimum extra features, these cannot be disabled via -C + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + + panic_strategy: PanicStrategy::Abort, + relocation_model: RelocModel::Static, + // suggested from thumb_base, rust-lang/rust#44993. + emit_debug_gdb_scripts: false, + frame_pointer: FramePointer::MayOmit, + + main_needs_argc_argv: false, + + // don't have atomic compare-and-swap + atomic_cas: false, + has_thumb_interworking: true, + + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs new file mode 100644 index 000000000..d9212afb0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs @@ -0,0 +1,41 @@ +//! Targets the ARMv5TE, with code as `t32` code by default. + +use crate::spec::{base, cvs, FramePointer, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv5te-none-eabi".into(), + pointer_width: 32, + arch: "arm".into(), + /* Data layout args are '-' separated: + * little endian + * stack is 64-bit aligned (EABI) + * pointers are 32-bit + * i64 must be 64-bit aligned (EABI) + * mangle names with ELF style + * native integers are 32-bit + * All other elements are default + */ + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + + options: TargetOptions { + abi: "eabi".into(), + // extra args passed to the external assembler (assuming `arm-none-eabi-as`): + // * activate t32/a32 interworking + // * use arch ARMv5TE + // * use little-endian + asm_args: cvs!["-mthumb-interwork", "-march=armv5te", "-mlittle-endian",], + // minimum extra features, these cannot be disabled via -C + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+soft-float,+strict-align,+atomics-32".into(), + frame_pointer: FramePointer::MayOmit, + main_needs_argc_argv: false, + // don't have atomic compare-and-swap + atomic_cas: false, + has_thumb_interworking: true, + + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs new file mode 100644 index 000000000..ac076fb88 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs @@ -0,0 +1,25 @@ +// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture) + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv6m-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them + // with +strict-align. + // Also force-enable 32-bit atomics, which allows the use of atomic load/store only. + // The resulting atomics are ABI incompatible with atomics backed by libatomic. + features: "+strict-align,+atomics-32".into(), + // There are no atomic CAS instructions available in the instruction set of the ARMv6-M + // architecture + atomic_cas: false, + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs new file mode 100644 index 000000000..128ac1dd1 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs @@ -0,0 +1,28 @@ +use crate::spec::{base, LinkerFlavor, Lld, PanicStrategy, Target, TargetOptions}; + +pub fn target() -> Target { + let mut base = base::windows_msvc::opts(); + // Prevent error LNK2013: BRANCH24(T) fixup overflow + // The LBR optimization tries to eliminate branch islands, + // but if the displacement is larger than can fit + // in the instruction, this error will occur. The linker + // should be smart enough to insert branch islands only + // where necessary, but this is not the observed behavior. + // Disabling the LBR optimization works around the issue. + base.add_pre_link_args(LinkerFlavor::Msvc(Lld::No), &["/OPT:NOLBR"]); + + Target { + llvm_target: "thumbv7a-pc-windows-msvc".into(), + pointer_width: 32, + data_layout: "e-m:w-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + features: "+vfp3,+neon".into(), + max_atomic_width: Some(64), + // FIXME(jordanrh): use PanicStrategy::Unwind when SEH is + // implemented for windows/arm in LLVM + panic_strategy: PanicStrategy::Abort, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs new file mode 100644 index 000000000..810ed6a24 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, PanicStrategy, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv7a-pc-windows-msvc".into(), + pointer_width: 32, + data_layout: "e-m:w-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + features: "+vfp3,+neon".into(), + max_atomic_width: Some(64), + // FIXME(jordanrh): use PanicStrategy::Unwind when SEH is + // implemented for windows/arm in LLVM + panic_strategy: PanicStrategy::Abort, + ..base::windows_uwp_msvc::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs new file mode 100644 index 000000000..1752f1d9a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs @@ -0,0 +1,27 @@ +// Targets the Cortex-M4 and Cortex-M7 processors (ARMv7E-M) +// +// This target assumes that the device doesn't have a FPU (Floating Point Unit) and lowers all the +// floating point operations to software routines (intrinsics). +// +// As such, this target uses the "soft" calling convention (ABI) where floating point values are +// passed to/from subroutines via general purpose registers (R0, R1, etc.). +// +// To opt-in to hardware accelerated floating point operations, you can use, for example, +// `-C target-feature=+vfp4` or `-C target-cpu=cortex-m4`. + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv7em-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs new file mode 100644 index 000000000..c113c62fc --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs @@ -0,0 +1,36 @@ +// Targets the Cortex-M4F and Cortex-M7F processors (ARMv7E-M) +// +// This target assumes that the device does have a FPU (Floating Point Unit) and lowers all (single +// precision) floating point operations to hardware instructions. +// +// Additionally, this target uses the "hard" floating convention (ABI) where floating point values +// are passed to/from subroutines via FPU registers (S0, S1, D0, D1, etc.). +// +// To opt into double precision hardware support, use the `-C target-feature=+fp64` flag. + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv7em-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabihf".into(), + // `+vfp4` is the lowest common denominator between the Cortex-M4 (vfp4-16) and the + // Cortex-M7 (vfp5) + // `-d32` both the Cortex-M4 and the Cortex-M7 only have 16 double-precision registers + // available + // `-fp64` The Cortex-M4 only supports single precision floating point operations + // whereas in the Cortex-M7 double precision is optional + // + // Reference: + // ARMv7-M Architecture Reference Manual - A2.5 The optional floating-point extension + features: "+vfp4,-d32,-fp64".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs new file mode 100644 index 000000000..f9ab3ce1a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs @@ -0,0 +1,18 @@ +// Targets the Cortex-M3 processor (ARMv7-M) + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv7m-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs new file mode 100644 index 000000000..c07aa944d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +// This target if is for the Android v7a ABI in thumb mode with +// NEON unconditionally enabled and, therefore, with 32 FPU registers +// enabled as well. See section A2.6.2 on page A2-56 in +// https://web.archive.org/web/20210307234416/https://static.docs.arm.com/ddi0406/cd/DDI0406C_d_armv7ar_arm.pdf + +// See https://developer.android.com/ndk/guides/abis.html#v7a +// for target ABI requirements. + +pub fn target() -> Target { + let mut base = base::android::opts(); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-march=armv7-a"]); + Target { + llvm_target: "armv7-none-linux-android".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(), + max_atomic_width: Some(64), + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs new file mode 100644 index 000000000..b4045037c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs @@ -0,0 +1,23 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for glibc Linux on ARMv7 with thumb mode enabled +// (for consistency with Android and Debian-based distributions) +// and with NEON unconditionally enabled and, therefore, with 32 FPU +// registers enabled as well. See section A2.6.2 on page A2-56 in +// https://web.archive.org/web/20210307234416/https://static.docs.arm.com/ddi0406/cd/DDI0406C_d_armv7ar_arm.pdf + +pub fn target() -> Target { + Target { + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + options: TargetOptions { + abi: "eabihf".into(), + // Info about features at https://wiki.debian.org/ArmHardFloatPort + features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(), + max_atomic_width: Some(64), + ..base::linux_gnu::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs new file mode 100644 index 000000000..6ef30f10f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs @@ -0,0 +1,29 @@ +use crate::spec::{base, Target, TargetOptions}; + +// This target is for musl Linux on ARMv7 with thumb mode enabled +// (for consistency with Android and Debian-based distributions) +// and with NEON unconditionally enabled and, therefore, with 32 FPU +// registers enabled as well. See section A2.6.2 on page A2-56 in +// https://web.archive.org/web/20210307234416/https://static.docs.arm.com/ddi0406/cd/DDI0406C_d_armv7ar_arm.pdf + +pub fn target() -> Target { + Target { + // It's important we use "gnueabihf" and not "musleabihf" here. LLVM + // uses it to determine the calling convention and float ABI, and LLVM + // doesn't support the "musleabihf" value. + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + // Most of these settings are copied from the thumbv7neon_unknown_linux_gnueabihf + // target. + options: TargetOptions { + abi: "eabihf".into(), + features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..base::linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs new file mode 100644 index 000000000..bf6257486 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs @@ -0,0 +1,21 @@ +// Targets the Cortex-M23 processor (Baseline ARMv8-M) + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv8m.base-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + // ARMv8-M baseline doesn't support unaligned loads/stores so we disable them + // with +strict-align. + features: "+strict-align".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs new file mode 100644 index 000000000..07fc7fead --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs @@ -0,0 +1,19 @@ +// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile), +// without the Floating Point extension. + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv8m.main-none-eabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs new file mode 100644 index 000000000..61d4e8fc8 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs @@ -0,0 +1,25 @@ +// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile), +// with the Floating Point extension. + +use crate::spec::{base, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv8m.main-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabihf".into(), + // If the Floating Point extension is implemented in the Cortex-M33 + // processor, the Cortex-M33 Technical Reference Manual states that + // the FPU uses the FPv5 architecture, single-precision instructions + // and 16 D registers. + // These parameters map to the following LLVM features. + features: "+fp-armv8,-fp64,-d32".into(), + max_atomic_width: Some(32), + ..base::thumb::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs b/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs new file mode 100644 index 000000000..394f02eca --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/wasm32_unknown_emscripten.rs @@ -0,0 +1,35 @@ +use crate::spec::{ + base, cvs, LinkArgs, LinkerFlavor, PanicStrategy, RelocModel, Target, TargetOptions, +}; + +pub fn target() -> Target { + // Reset flags for non-Em flavors back to empty to satisfy sanity checking tests. + let pre_link_args = LinkArgs::new(); + let post_link_args = TargetOptions::link_args( + LinkerFlavor::EmCc, + &["-sABORTING_MALLOC=0", "-Wl,--fatal-warnings"], + ); + + let opts = TargetOptions { + os: "emscripten".into(), + linker_flavor: LinkerFlavor::EmCc, + // emcc emits two files - a .js file to instantiate the wasm and supply platform + // functionality, and a .wasm file. + exe_suffix: ".js".into(), + linker: None, + pre_link_args, + post_link_args, + relocation_model: RelocModel::Pic, + panic_strategy: PanicStrategy::Unwind, + no_default_libraries: false, + families: cvs!["unix", "wasm"], + ..base::wasm::options() + }; + Target { + llvm_target: "wasm32-unknown-emscripten".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-f128:64-n32:64-S128-ni:1:10:20".into(), + arch: "wasm32".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/wasm32_unknown_unknown.rs b/compiler/rustc_target/src/spec/targets/wasm32_unknown_unknown.rs new file mode 100644 index 000000000..2a40d9c66 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/wasm32_unknown_unknown.rs @@ -0,0 +1,55 @@ +//! A "bare wasm" target representing a WebAssembly output that makes zero +//! assumptions about its environment. +//! +//! The `wasm32-unknown-unknown` target is intended to encapsulate use cases +//! that do not rely on any imported functionality. The binaries generated are +//! entirely self-contained by default when using the standard library. Although +//! the standard library is available, most of it returns an error immediately +//! (e.g. trying to create a TCP stream or something like that). +//! +//! This target is more or less managed by the Rust and WebAssembly Working +//! Group nowadays at <https://github.com/rustwasm>. + +use crate::spec::abi::Abi; +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut options = base::wasm::options(); + options.os = "unknown".into(); + + // This is a default for backwards-compatibility with the original + // definition of this target oh-so-long-ago. Once the "wasm" ABI is + // stable and the wasm-bindgen project has switched to using it then there's + // no need for this and it can be removed. + // + // Currently this is the reason that this target's ABI is mismatched with + // clang's ABI. This means that, in the limit, you can't merge C and Rust + // code on this target due to this ABI mismatch. + options.default_adjusted_cabi = Some(Abi::Wasm); + + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::No), + &[ + // For now this target just never has an entry symbol no matter the output + // type, so unconditionally pass this. + "--no-entry", + ], + ); + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::Yes), + &[ + // Make sure clang uses LLD as its linker and is configured appropriately + // otherwise + "--target=wasm32-unknown-unknown", + "-Wl,--no-entry", + ], + ); + + Target { + llvm_target: "wasm32-unknown-unknown".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-n32:64-S128-ni:1:10:20".into(), + arch: "wasm32".into(), + options, + } +} diff --git a/compiler/rustc_target/src/spec/targets/wasm32_wasi.rs b/compiler/rustc_target/src/spec/targets/wasm32_wasi.rs new file mode 100644 index 000000000..6dbcb01ea --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/wasm32_wasi.rs @@ -0,0 +1,119 @@ +//! The `wasm32-wasi` target is a new and still (as of April 2019) an +//! experimental target. The definition in this file is likely to be tweaked +//! over time and shouldn't be relied on too much. +//! +//! The `wasi` target is a proposal to define a standardized set of syscalls +//! that WebAssembly files can interoperate with. This set of syscalls is +//! intended to empower WebAssembly binaries with native capabilities such as +//! filesystem access, network access, etc. +//! +//! You can see more about the proposal at <https://wasi.dev>. +//! +//! The Rust target definition here is interesting in a few ways. We want to +//! serve two use cases here with this target: +//! +//! * First, we want Rust usage of the target to be as hassle-free as possible, +//! ideally avoiding the need to configure and install a local wasm32-wasi +//! toolchain. +//! +//! * Second, one of the primary use cases of LLVM's new wasm backend and the +//! wasm support in LLD is that any compiled language can interoperate with +//! any other. To that the `wasm32-wasi` target is the first with a viable C +//! standard library and sysroot common definition, so we want Rust and C/C++ +//! code to interoperate when compiled to `wasm32-unknown-unknown`. +//! +//! You'll note, however, that the two goals above are somewhat at odds with one +//! another. To attempt to solve both use cases in one go we define a target +//! that (ab)uses the `crt-static` target feature to indicate which one you're +//! in. +//! +//! ## No interop with C required +//! +//! By default the `crt-static` target feature is enabled, and when enabled +//! this means that the bundled version of `libc.a` found in `liblibc.rlib` +//! is used. This isn't intended really for interoperation with a C because it +//! may be the case that Rust's bundled C library is incompatible with a +//! foreign-compiled C library. In this use case, though, we use `rust-lld` and +//! some copied crt startup object files to ensure that you can download the +//! wasi target for Rust and you're off to the races, no further configuration +//! necessary. +//! +//! All in all, by default, no external dependencies are required. You can +//! compile `wasm32-wasi` binaries straight out of the box. You can't, however, +//! reliably interoperate with C code in this mode (yet). +//! +//! ## Interop with C required +//! +//! For the second goal we repurpose the `target-feature` flag, meaning that +//! you'll need to do a few things to have C/Rust code interoperate. +//! +//! 1. All Rust code needs to be compiled with `-C target-feature=-crt-static`, +//! indicating that the bundled C standard library in the Rust sysroot will +//! not be used. +//! +//! 2. If you're using rustc to build a linked artifact then you'll need to +//! specify `-C linker` to a `clang` binary that supports +//! `wasm32-wasi` and is configured with the `wasm32-wasi` sysroot. This +//! will cause Rust code to be linked against the libc.a that the specified +//! `clang` provides. +//! +//! 3. If you're building a staticlib and integrating Rust code elsewhere, then +//! compiling with `-C target-feature=-crt-static` is all you need to do. +//! +//! You can configure the linker via Cargo using the +//! `CARGO_TARGET_WASM32_WASI_LINKER` env var. Be sure to also set +//! `CC_wasm32-wasi` if any crates in the dependency graph are using the `cc` +//! crate. +//! +//! ## Remember, this is all in flux +//! +//! The wasi target is **very** new in its specification. It's likely going to +//! be a long effort to get it standardized and stable. We'll be following it as +//! best we can with this target. Don't start relying on too much here unless +//! you know what you're getting in to! + +use crate::spec::crt_objects; +use crate::spec::LinkSelfContainedDefault; +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut options = base::wasm::options(); + + options.os = "wasi".into(); + options.add_pre_link_args(LinkerFlavor::WasmLld(Cc::Yes), &["--target=wasm32-wasi"]); + + options.pre_link_objects_self_contained = crt_objects::pre_wasi_self_contained(); + options.post_link_objects_self_contained = crt_objects::post_wasi_self_contained(); + + // FIXME: Figure out cases in which WASM needs to link with a native toolchain. + options.link_self_contained = LinkSelfContainedDefault::True; + + // Right now this is a bit of a workaround but we're currently saying that + // the target by default has a static crt which we're taking as a signal + // for "use the bundled crt". If that's turned off then the system's crt + // will be used, but this means that default usage of this target doesn't + // need an external compiler but it's still interoperable with an external + // compiler if configured correctly. + options.crt_static_default = true; + options.crt_static_respected = true; + + // Allow `+crt-static` to create a "cdylib" output which is just a wasm file + // without a main function. + options.crt_static_allows_dylibs = true; + + // WASI's `sys::args::init` function ignores its arguments; instead, + // `args::args()` makes the WASI API calls itself. + options.main_needs_argc_argv = false; + + // And, WASI mangles the name of "main" to distinguish between different + // signatures. + options.entry_name = "__main_void".into(); + + Target { + llvm_target: "wasm32-wasi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-n32:64-S128-ni:1:10:20".into(), + arch: "wasm32".into(), + options, + } +} diff --git a/compiler/rustc_target/src/spec/targets/wasm32_wasi_preview1_threads.rs b/compiler/rustc_target/src/spec/targets/wasm32_wasi_preview1_threads.rs new file mode 100644 index 000000000..28ea4cc9e --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/wasm32_wasi_preview1_threads.rs @@ -0,0 +1,133 @@ +//! The `wasm32-wasi-preview1-threads` target is a new and still (as of July 2023) an +//! experimental target. The definition in this file is likely to be tweaked +//! over time and shouldn't be relied on too much. +//! +//! The `wasi-threads` target is a proposal to define a standardized set of syscalls +//! that WebAssembly files can interoperate with. This set of syscalls is +//! intended to empower WebAssembly binaries with native capabilities such as +//! threads, filesystem access, network access, etc. +//! +//! You can see more about the proposal at <https://github.com/WebAssembly/wasi-threads>. +//! +//! The Rust target definition here is interesting in a few ways. We want to +//! serve two use cases here with this target: +//! +//! * First, we want Rust usage of the target to be as hassle-free as possible, +//! ideally avoiding the need to configure and install a local wasm32-wasi-preview1-threads +//! toolchain. +//! +//! * Second, one of the primary use cases of LLVM's new wasm backend and the +//! wasm support in LLD is that any compiled language can interoperate with +//! any other. To that the `wasm32-wasi-preview1-threads` target is the first with a viable C +//! standard library and sysroot common definition, so we want Rust and C/C++ +//! code to interoperate when compiled to `wasm32-unknown-unknown`. +//! +//! You'll note, however, that the two goals above are somewhat at odds with one +//! another. To attempt to solve both use cases in one go we define a target +//! that (ab)uses the `crt-static` target feature to indicate which one you're +//! in. +//! +//! ## No interop with C required +//! +//! By default the `crt-static` target feature is enabled, and when enabled +//! this means that the bundled version of `libc.a` found in `liblibc.rlib` +//! is used. This isn't intended really for interoperation with a C because it +//! may be the case that Rust's bundled C library is incompatible with a +//! foreign-compiled C library. In this use case, though, we use `rust-lld` and +//! some copied crt startup object files to ensure that you can download the +//! wasi target for Rust and you're off to the races, no further configuration +//! necessary. +//! +//! All in all, by default, no external dependencies are required. You can +//! compile `wasm32-wasi-preview1-threads` binaries straight out of the box. You can't, however, +//! reliably interoperate with C code in this mode (yet). +//! +//! ## Interop with C required +//! +//! For the second goal we repurpose the `target-feature` flag, meaning that +//! you'll need to do a few things to have C/Rust code interoperate. +//! +//! 1. All Rust code needs to be compiled with `-C target-feature=-crt-static`, +//! indicating that the bundled C standard library in the Rust sysroot will +//! not be used. +//! +//! 2. If you're using rustc to build a linked artifact then you'll need to +//! specify `-C linker` to a `clang` binary that supports +//! `wasm32-wasi-preview1-threads` and is configured with the `wasm32-wasi-preview1-threads` sysroot. This +//! will cause Rust code to be linked against the libc.a that the specified +//! `clang` provides. +//! +//! 3. If you're building a staticlib and integrating Rust code elsewhere, then +//! compiling with `-C target-feature=-crt-static` is all you need to do. +//! +//! You can configure the linker via Cargo using the +//! `CARGO_TARGET_WASM32_WASI_LINKER` env var. Be sure to also set +//! `CC_wasm32-wasi-preview1-threads` if any crates in the dependency graph are using the `cc` +//! crate. +//! +//! ## Remember, this is all in flux +//! +//! The wasi target is **very** new in its specification. It's likely going to +//! be a long effort to get it standardized and stable. We'll be following it as +//! best we can with this target. Don't start relying on too much here unless +//! you know what you're getting in to! + +use crate::spec::{base, crt_objects, Cc, LinkSelfContainedDefault, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut options = base::wasm::options(); + + options.os = "wasi".into(); + + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::No), + &["--import-memory", "--export-memory", "--shared-memory"], + ); + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::Yes), + &[ + "--target=wasm32-wasi-threads", + "-Wl,--import-memory", + "-Wl,--export-memory,", + "-Wl,--shared-memory", + ], + ); + + options.pre_link_objects_self_contained = crt_objects::pre_wasi_self_contained(); + options.post_link_objects_self_contained = crt_objects::post_wasi_self_contained(); + + // FIXME: Figure out cases in which WASM needs to link with a native toolchain. + options.link_self_contained = LinkSelfContainedDefault::True; + + // Right now this is a bit of a workaround but we're currently saying that + // the target by default has a static crt which we're taking as a signal + // for "use the bundled crt". If that's turned off then the system's crt + // will be used, but this means that default usage of this target doesn't + // need an external compiler but it's still interoperable with an external + // compiler if configured correctly. + options.crt_static_default = true; + options.crt_static_respected = true; + + // Allow `+crt-static` to create a "cdylib" output which is just a wasm file + // without a main function. + options.crt_static_allows_dylibs = true; + + // WASI's `sys::args::init` function ignores its arguments; instead, + // `args::args()` makes the WASI API calls itself. + options.main_needs_argc_argv = false; + + // And, WASI mangles the name of "main" to distinguish between different + // signatures. + options.entry_name = "__main_void".into(); + + options.singlethread = false; + options.features = "+atomics,+bulk-memory,+mutable-globals".into(); + + Target { + llvm_target: "wasm32-wasi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-n32:64-S128-ni:1:10:20".into(), + arch: "wasm32".into(), + options, + } +} diff --git a/compiler/rustc_target/src/spec/targets/wasm64_unknown_unknown.rs b/compiler/rustc_target/src/spec/targets/wasm64_unknown_unknown.rs new file mode 100644 index 000000000..54c5ae8e2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/wasm64_unknown_unknown.rs @@ -0,0 +1,47 @@ +//! A "bare wasm" target representing a WebAssembly output that makes zero +//! assumptions about its environment. +//! +//! The `wasm64-unknown-unknown` target is intended to encapsulate use cases +//! that do not rely on any imported functionality. The binaries generated are +//! entirely self-contained by default when using the standard library. Although +//! the standard library is available, most of it returns an error immediately +//! (e.g. trying to create a TCP stream or something like that). + +use crate::spec::{base, Cc, LinkerFlavor, Target}; + +pub fn target() -> Target { + let mut options = base::wasm::options(); + options.os = "unknown".into(); + + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::No), + &[ + // For now this target just never has an entry symbol no matter the output + // type, so unconditionally pass this. + "--no-entry", + "-mwasm64", + ], + ); + options.add_pre_link_args( + LinkerFlavor::WasmLld(Cc::Yes), + &[ + // Make sure clang uses LLD as its linker and is configured appropriately + // otherwise + "--target=wasm64-unknown-unknown", + "-Wl,--no-entry", + ], + ); + + // Any engine that implements wasm64 will surely implement the rest of these + // features since they were all merged into the official spec by the time + // wasm64 was designed. + options.features = "+bulk-memory,+mutable-globals,+sign-ext,+nontrapping-fptoint".into(); + + Target { + llvm_target: "wasm64-unknown-unknown".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-n32:64-S128-ni:1:10:20".into(), + arch: "wasm64".into(), + options, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_apple_darwin.rs b/compiler/rustc_target/src/spec/targets/x86_64_apple_darwin.rs new file mode 100644 index 000000000..9170a10d2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_apple_darwin.rs @@ -0,0 +1,26 @@ +use crate::spec::base::apple::{macos_llvm_target, opts, Arch}; +use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, SanitizerSet}; +use crate::spec::{StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::X86_64; + let mut base = opts("macos", arch); + base.max_atomic_width = Some(128); // penryn+ supports cmpxchg16b + base.frame_pointer = FramePointer::Always; + base.add_pre_link_args(LinkerFlavor::Darwin(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = + SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::LEAK | SanitizerSet::THREAD; + + Target { + // Clang automatically chooses a more specific target based on + // MACOSX_DEPLOYMENT_TARGET. To enable cross-language LTO to work + // correctly, we do too. + llvm_target: macos_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { mcount: "\u{1}mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_apple_ios.rs b/compiler/rustc_target/src/spec/targets/x86_64_apple_ios.rs new file mode 100644 index 000000000..d9f3f7de6 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_apple_ios.rs @@ -0,0 +1,21 @@ +use crate::spec::base::apple::{ios_sim_llvm_target, opts, Arch}; +use crate::spec::{SanitizerSet, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::X86_64_sim; + let mut base = opts("ios", arch); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::THREAD; + + Target { + llvm_target: ios_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { + max_atomic_width: Some(128), + stack_probes: StackProbeType::X86, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_apple_ios_macabi.rs b/compiler/rustc_target/src/spec/targets/x86_64_apple_ios_macabi.rs new file mode 100644 index 000000000..5e6fbac34 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_apple_ios_macabi.rs @@ -0,0 +1,24 @@ +use crate::spec::base::apple::{opts, Arch}; +use crate::spec::{Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let llvm_target = "x86_64-apple-ios14.0-macabi"; + + let arch = Arch::X86_64_macabi; + let mut base = opts("ios", arch); + base.add_pre_link_args(LinkerFlavor::Darwin(Cc::Yes, Lld::No), &["-target", llvm_target]); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::LEAK | SanitizerSet::THREAD; + + Target { + llvm_target: llvm_target.into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { + max_atomic_width: Some(128), + stack_probes: StackProbeType::X86, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_apple_tvos.rs b/compiler/rustc_target/src/spec/targets/x86_64_apple_tvos.rs new file mode 100644 index 000000000..1c4d9196c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_apple_tvos.rs @@ -0,0 +1,18 @@ +use crate::spec::base::apple::{opts, tvos_sim_llvm_target, Arch}; +use crate::spec::{StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::X86_64_sim; + Target { + llvm_target: tvos_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { + max_atomic_width: Some(128), + stack_probes: StackProbeType::X86, + ..opts("tvos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_apple_watchos_sim.rs b/compiler/rustc_target/src/spec/targets/x86_64_apple_watchos_sim.rs new file mode 100644 index 000000000..258148677 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_apple_watchos_sim.rs @@ -0,0 +1,30 @@ +use crate::spec::base::apple::{opts, watchos_sim_llvm_target, Arch}; +use crate::spec::{StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::X86_64_sim; + Target { + llvm_target: watchos_sim_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { + max_atomic_width: Some(128), + stack_probes: StackProbeType::X86, + forces_embed_bitcode: true, + // Taken from a clang build on Xcode 11.4.1. + // These arguments are not actually invoked - they just have + // to look right to pass App Store validation. + bitcode_llvm_cmdline: "-triple\0\ + x86_64-apple-watchos5.0-simulator\0\ + -emit-obj\0\ + -disable-llvm-passes\0\ + -target-abi\0\ + darwinpcs\0\ + -Os\0" + .into(), + ..opts("watchos", arch) + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_fortanix_unknown_sgx.rs b/compiler/rustc_target/src/spec/targets/x86_64_fortanix_unknown_sgx.rs new file mode 100644 index 000000000..f4117edc3 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_fortanix_unknown_sgx.rs @@ -0,0 +1,83 @@ +use std::borrow::Cow; + +use crate::spec::{cvs, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +pub fn target() -> Target { + let pre_link_args = TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &[ + "-e", + "elf_entry", + "-Bstatic", + "--gc-sections", + "-z", + "text", + "-z", + "norelro", + "--no-undefined", + "--error-unresolved-symbols", + "--no-undefined-version", + "-Bsymbolic", + "--export-dynamic", + // The following symbols are needed by libunwind, which is linked after + // libstd. Make sure they're included in the link. + "-u", + "__rust_abort", + "-u", + "__rust_c_alloc", + "-u", + "__rust_c_dealloc", + "-u", + "__rust_print_err", + "-u", + "__rust_rwlock_rdlock", + "-u", + "__rust_rwlock_unlock", + "-u", + "__rust_rwlock_wrlock", + ], + ); + + const EXPORT_SYMBOLS: &[&str] = &[ + "sgx_entry", + "HEAP_BASE", + "HEAP_SIZE", + "RELA", + "RELACOUNT", + "ENCLAVE_SIZE", + "CFGDATA_BASE", + "DEBUG", + "EH_FRM_HDR_OFFSET", + "EH_FRM_HDR_LEN", + "EH_FRM_OFFSET", + "EH_FRM_LEN", + "TEXT_BASE", + "TEXT_SIZE", + ]; + let opts = TargetOptions { + os: "unknown".into(), + env: "sgx".into(), + vendor: "fortanix".into(), + abi: "fortanix".into(), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + max_atomic_width: Some(64), + cpu: "x86-64".into(), + plt_by_default: false, + features: "+rdrnd,+rdseed,+lvi-cfi,+lvi-load-hardening".into(), + llvm_args: cvs!["--x86-experimental-lvi-inline-asm-hardening"], + position_independent_executables: true, + pre_link_args, + override_export_symbols: Some(EXPORT_SYMBOLS.iter().cloned().map(Cow::from).collect()), + relax_elf_relocations: true, + ..Default::default() + }; + Target { + llvm_target: "x86_64-elf".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_fuchsia.rs b/compiler/rustc_target/src/spec/targets/x86_64_fuchsia.rs new file mode 100644 index 000000000..46df00e9c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_fuchsia.rs @@ -0,0 +1 @@ +pub use crate::spec::targets::x86_64_unknown_fuchsia::target; diff --git a/compiler/rustc_target/src/spec/targets/x86_64_linux_android.rs b/compiler/rustc_target/src/spec/targets/x86_64_linux_android.rs new file mode 100644 index 000000000..6cffda44f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_linux_android.rs @@ -0,0 +1,24 @@ +use crate::spec::{ + base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target, TargetOptions, +}; + +pub fn target() -> Target { + let mut base = base::android::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + // https://developer.android.com/ndk/guides/abis.html#86-64 + base.features = "+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-linux-android".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: TargetOptions { supported_sanitizers: SanitizerSet::ADDRESS, ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_pc_nto_qnx710.rs b/compiler/rustc_target/src/spec/targets/x86_64_pc_nto_qnx710.rs new file mode 100644 index 000000000..93aec4c42 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_pc_nto_qnx710.rs @@ -0,0 +1,22 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "x86_64-pc-unknown".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: TargetOptions { + cpu: "x86-64".into(), + plt_by_default: false, + max_atomic_width: Some(64), + pre_link_args: TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-Vgcc_ntox86_64_cxx"], + ), + env: "nto71".into(), + ..base::nto_qnx::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_pc_solaris.rs b/compiler/rustc_target/src/spec/targets/x86_64_pc_solaris.rs new file mode 100644 index 000000000..ca6a6dc50 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_pc_solaris.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Cc, LinkerFlavor, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::solaris::opts(); + base.add_pre_link_args(LinkerFlavor::Unix(Cc::Yes), &["-m64"]); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.vendor = "pc".into(); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::THREAD; + + Target { + llvm_target: "x86_64-pc-solaris".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnu.rs b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnu.rs new file mode 100644 index 000000000..6d3e07270 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnu.rs @@ -0,0 +1,24 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_gnu::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + // Use high-entropy 64 bit address space for ASLR + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["-m", "i386pep", "--high-entropy-va"], + ); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64", "-Wl,--high-entropy-va"]); + base.max_atomic_width = Some(64); + base.linker = Some("x86_64-w64-mingw32-gcc".into()); + + Target { + llvm_target: "x86_64-pc-windows-gnu".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnullvm.rs b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnullvm.rs new file mode 100644 index 000000000..a56ebfa58 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_gnullvm.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_gnullvm::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.max_atomic_width = Some(64); + base.linker = Some("x86_64-w64-mingw32-clang".into()); + + Target { + llvm_target: "x86_64-pc-windows-gnu".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_msvc.rs new file mode 100644 index 000000000..7d6276a0c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_pc_windows_msvc.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_msvc::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + + Target { + llvm_target: "x86_64-pc-windows-msvc".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_sun_solaris.rs b/compiler/rustc_target/src/spec/targets/x86_64_sun_solaris.rs new file mode 100644 index 000000000..cca099d3b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_sun_solaris.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Cc, LinkerFlavor, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::solaris::opts(); + base.add_pre_link_args(LinkerFlavor::Unix(Cc::Yes), &["-m64"]); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.vendor = "sun".into(); + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "x86_64-pc-solaris".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unikraft_linux_musl.rs b/compiler/rustc_target/src/spec/targets/x86_64_unikraft_linux_musl.rs new file mode 100644 index 000000000..c12cb1ab0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unikraft_linux_musl.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "x86_64-unknown-linux-musl".into(), + pointer_width: 64, + arch: "x86_64".into(), + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + options: TargetOptions { + cpu: "x86-64".into(), + plt_by_default: false, + pre_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]), + max_atomic_width: Some(64), + stack_probes: StackProbeType::X86, + ..base::unikraft_linux_musl::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_dragonfly.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_dragonfly.rs new file mode 100644 index 000000000..68d1a755b --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_dragonfly.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::dragonfly::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "x86_64-unknown-dragonfly".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_freebsd.rs new file mode 100644 index 000000000..e3f29fa5a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_freebsd.rs @@ -0,0 +1,22 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::freebsd::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = + SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::MEMORY | SanitizerSet::THREAD; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-unknown-freebsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_fuchsia.rs new file mode 100644 index 000000000..c8850d703 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_fuchsia.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::fuchsia::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI; + + Target { + llvm_target: "x86_64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_haiku.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_haiku.rs new file mode 100644 index 000000000..ca55e6514 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_haiku.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::haiku::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + // This option is required to build executables on Haiku x86_64 + base.position_independent_executables = true; + + Target { + llvm_target: "x86_64-unknown-haiku".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_hermit.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_hermit.rs new file mode 100644 index 000000000..3cc50d40d --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_hermit.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "x86_64-unknown-hermit".into(), + pointer_width: 64, + arch: "x86_64".into(), + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + options: TargetOptions { + cpu: "x86-64".into(), + features: "+rdrnd,+rdseed".into(), + plt_by_default: false, + max_atomic_width: Some(64), + stack_probes: StackProbeType::X86, + ..base::hermit::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_illumos.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_illumos.rs new file mode 100644 index 000000000..eb2b13cb5 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_illumos.rs @@ -0,0 +1,21 @@ +use crate::spec::{base, Cc, LinkerFlavor, SanitizerSet, Target}; + +pub fn target() -> Target { + let mut base = base::illumos::opts(); + base.add_pre_link_args(LinkerFlavor::Unix(Cc::Yes), &["-m64", "-std=c99"]); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.supported_sanitizers = SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::THREAD; + + Target { + // LLVM does not currently have a separate illumos target, + // so we still pass Solaris to it + llvm_target: "x86_64-pc-solaris".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_l4re_uclibc.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_l4re_uclibc.rs new file mode 100644 index 000000000..7b86fe738 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_l4re_uclibc.rs @@ -0,0 +1,18 @@ +use crate::spec::{base, PanicStrategy, Target}; + +pub fn target() -> Target { + let mut base = base::l4re::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.panic_strategy = PanicStrategy::Abort; + + Target { + llvm_target: "x86_64-unknown-l4re-uclibc".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnu.rs new file mode 100644 index 000000000..80e267c16 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnu.rs @@ -0,0 +1,27 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.static_position_independent_executables = true; + base.supported_sanitizers = SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::SAFESTACK + | SanitizerSet::THREAD; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnux32.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnux32.rs new file mode 100644 index 000000000..622bfe8bb --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_gnux32.rs @@ -0,0 +1,24 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_gnu::opts(); + base.cpu = "x86-64".into(); + base.abi = "x32".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-mx32"]); + base.stack_probes = StackProbeType::X86; + base.has_thread_local = false; + // BUG(GabrielMajeri): disabling the PLT on x86_64 Linux with x32 ABI + // breaks code gen. See LLVM bug 36743 + base.plt_by_default = true; + + Target { + llvm_target: "x86_64-unknown-linux-gnux32".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_musl.rs new file mode 100644 index 000000000..d74ff466a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_musl.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_musl::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.static_position_independent_executables = true; + base.supported_sanitizers = SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::THREAD; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_ohos.rs new file mode 100644 index 000000000..87b004df0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_linux_ohos.rs @@ -0,0 +1,26 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::linux_ohos::opts(); + base.cpu = "x86-64".into(); + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.static_position_independent_executables = true; + base.supported_sanitizers = SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::THREAD; + base.supports_xray = true; + + Target { + // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead. + llvm_target: "x86_64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_netbsd.rs new file mode 100644 index 000000000..04060513a --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_netbsd.rs @@ -0,0 +1,27 @@ +use crate::spec::{ + base, Cc, LinkerFlavor, Lld, SanitizerSet, StackProbeType, Target, TargetOptions, +}; + +pub fn target() -> Target { + let mut base = base::netbsd::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::THREAD; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-unknown-netbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: TargetOptions { mcount: "__mcount".into(), ..base }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_none.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_none.rs new file mode 100644 index 000000000..9aa95a35f --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_none.rs @@ -0,0 +1,38 @@ +// Generic x86-64 target for bare-metal code - Floating point disabled +// +// Can be used in conjunction with the `target-feature` and +// `target-cpu` compiler flags to opt-in more hardware-specific +// features. + +use crate::spec::{Cc, CodeModel, LinkerFlavor, Lld, PanicStrategy}; +use crate::spec::{RelroLevel, SanitizerSet, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let opts = TargetOptions { + cpu: "x86-64".into(), + plt_by_default: false, + max_atomic_width: Some(64), + stack_probes: StackProbeType::X86, + position_independent_executables: true, + static_position_independent_executables: true, + relro_level: RelroLevel::Full, + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), + features: + "-mmx,-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-3dnow,-3dnowa,-avx,-avx2,+soft-float" + .into(), + supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS, + disable_redzone: true, + panic_strategy: PanicStrategy::Abort, + code_model: Some(CodeModel::Kernel), + ..Default::default() + }; + Target { + llvm_target: "x86_64-unknown-none-elf".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: opts, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_openbsd.rs new file mode 100644 index 000000000..5e6e7efb2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_openbsd.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::openbsd::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supports_xray = true; + + Target { + llvm_target: "x86_64-unknown-openbsd".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_redox.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_redox.rs new file mode 100644 index 000000000..382ff71f0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_redox.rs @@ -0,0 +1,19 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::redox::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + + Target { + llvm_target: "x86_64-unknown-redox".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_unknown_uefi.rs b/compiler/rustc_target/src/spec/targets/x86_64_unknown_uefi.rs new file mode 100644 index 000000000..5abfb8162 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_unknown_uefi.rs @@ -0,0 +1,41 @@ +// This defines the amd64 target for UEFI systems as described in the UEFI specification. See the +// uefi-base module for generic UEFI options. On x86_64 systems (mostly called "x64" in the spec) +// UEFI systems always run in long-mode, have the interrupt-controller pre-configured and force a +// single-CPU execution. +// The win64 ABI is used. It differs from the sysv64 ABI, so we must use a windows target with +// LLVM. "x86_64-unknown-windows" is used to get the minimal subset of windows-specific features. + +use crate::{ + abi::call::Conv, + spec::{base, Target}, +}; + +pub fn target() -> Target { + let mut base = base::uefi_msvc::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.entry_abi = Conv::X86_64Win64; + + // We disable MMX and SSE for now, even though UEFI allows using them. Problem is, you have to + // enable these CPU features explicitly before their first use, otherwise their instructions + // will trigger an exception. Rust does not inject any code that enables AVX/MMX/SSE + // instruction sets, so this must be done by the firmware. However, existing firmware is known + // to leave these uninitialized, thus triggering exceptions if we make use of them. Which is + // why we avoid them and instead use soft-floats. This is also what GRUB and friends did so + // far. + // + // If you initialize FP units yourself, you can override these flags with custom linker + // arguments, thus giving you access to full MMX/SSE acceleration. + base.features = "-mmx,-sse,+soft-float".into(); + + Target { + llvm_target: "x86_64-unknown-windows".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_gnu.rs b/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_gnu.rs new file mode 100644 index 000000000..a46d3a0e2 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_gnu.rs @@ -0,0 +1,23 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, Target}; + +pub fn target() -> Target { + let mut base = base::windows_uwp_gnu::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + // Use high-entropy 64 bit address space for ASLR + base.add_pre_link_args( + LinkerFlavor::Gnu(Cc::No, Lld::No), + &["-m", "i386pep", "--high-entropy-va"], + ); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64", "-Wl,--high-entropy-va"]); + base.max_atomic_width = Some(64); + + Target { + llvm_target: "x86_64-pc-windows-gnu".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_msvc.rs new file mode 100644 index 000000000..a3bc27aa0 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_uwp_windows_msvc.rs @@ -0,0 +1,17 @@ +use crate::spec::{base, Target}; + +pub fn target() -> Target { + let mut base = base::windows_uwp_msvc::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + + Target { + llvm_target: "x86_64-pc-windows-msvc".into(), + pointer_width: 64, + data_layout: "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/x86_64_wrs_vxworks.rs new file mode 100644 index 000000000..4b221fe69 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64_wrs_vxworks.rs @@ -0,0 +1,20 @@ +use crate::spec::{base, Cc, LinkerFlavor, Lld, StackProbeType, Target}; + +pub fn target() -> Target { + let mut base = base::vxworks::opts(); + base.cpu = "x86-64".into(); + base.plt_by_default = false; + base.max_atomic_width = Some(64); + base.add_pre_link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.disable_redzone = true; + + Target { + llvm_target: "x86_64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: "x86_64".into(), + options: base, + } +} diff --git a/compiler/rustc_target/src/spec/targets/x86_64h_apple_darwin.rs b/compiler/rustc_target/src/spec/targets/x86_64h_apple_darwin.rs new file mode 100644 index 000000000..a30e9d17c --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/x86_64h_apple_darwin.rs @@ -0,0 +1,44 @@ +use crate::spec::base::apple::{macos_llvm_target, opts, Arch}; +use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, SanitizerSet}; +use crate::spec::{StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + let arch = Arch::X86_64h; + let mut base = opts("macos", arch); + base.max_atomic_width = Some(128); + base.frame_pointer = FramePointer::Always; + base.add_pre_link_args(LinkerFlavor::Darwin(Cc::Yes, Lld::No), &["-m64"]); + base.stack_probes = StackProbeType::X86; + base.supported_sanitizers = + SanitizerSet::ADDRESS | SanitizerSet::CFI | SanitizerSet::LEAK | SanitizerSet::THREAD; + + // x86_64h is core2-avx without a few of the features which would otherwise + // be guaranteed, so we need to disable those. This imitates clang's logic: + // - https://github.com/llvm/llvm-project/blob/bd1f7c417/clang/lib/Driver/ToolChains/Arch/X86.cpp#L77-L78 + // - https://github.com/llvm/llvm-project/blob/bd1f7c417/clang/lib/Driver/ToolChains/Arch/X86.cpp#L133-L141 + // + // FIXME: Sadly, turning these off here disables them in such a way that they + // aren't re-enabled by `-Ctarget-cpu=native` (on a machine that has them). + // It would be nice if this were not the case, but fixing it seems tricky + // (and given that the main use-case for this target is for use in universal + // binaries, probably not that important). + base.features = "-rdrnd,-aes,-pclmul,-rtm,-fsgsbase".into(); + // Double-check that the `cpu` is what we expect (if it's not the list above + // may need updating). + assert_eq!( + base.cpu, "core-avx2", + "you need to adjust the feature list in x86_64h-apple-darwin if you change this", + ); + + Target { + // Clang automatically chooses a more specific target based on + // MACOSX_DEPLOYMENT_TARGET. To enable cross-language LTO to work + // correctly, we do too. + llvm_target: macos_llvm_target(arch).into(), + pointer_width: 64, + data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + .into(), + arch: arch.target_arch(), + options: TargetOptions { mcount: "\u{1}mcount".into(), ..base }, + } +} |