diff options
Diffstat (limited to 'library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs')
-rw-r--r-- | library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs | 336 |
1 files changed, 168 insertions, 168 deletions
diff --git a/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs b/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs index 31e924b84..923265966 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs @@ -975,7 +975,7 @@ extern "unadjusted" { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x8_t) -> int8x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -991,7 +991,7 @@ pub unsafe fn vld1_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x8_t) -> in stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x16_t) -> int8x16_t { - static_assert_imm4!(LANE); + static_assert_uimm_bits!(LANE, 4); simd_insert(src, LANE as u32, *ptr) } @@ -1007,7 +1007,7 @@ pub unsafe fn vld1q_lane_s8<const LANE: i32>(ptr: *const i8, src: int8x16_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x4_t) -> int16x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1023,7 +1023,7 @@ pub unsafe fn vld1_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x4_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x8_t) -> int16x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -1039,7 +1039,7 @@ pub unsafe fn vld1q_lane_s16<const LANE: i32>(ptr: *const i16, src: int16x8_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x2_t) -> int32x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1055,7 +1055,7 @@ pub unsafe fn vld1_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x2_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x4_t) -> int32x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1071,7 +1071,7 @@ pub unsafe fn vld1q_lane_s32<const LANE: i32>(ptr: *const i32, src: int32x4_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x1_t) -> int64x1_t { - static_assert!(LANE : i32 where LANE == 0); + static_assert!(LANE == 0); simd_insert(src, LANE as u32, *ptr) } @@ -1087,7 +1087,7 @@ pub unsafe fn vld1_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x1_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x2_t) -> int64x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1103,7 +1103,7 @@ pub unsafe fn vld1q_lane_s64<const LANE: i32>(ptr: *const i64, src: int64x2_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x8_t) -> uint8x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -1119,7 +1119,7 @@ pub unsafe fn vld1_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x8_t) -> u stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x16_t) -> uint8x16_t { - static_assert_imm4!(LANE); + static_assert_uimm_bits!(LANE, 4); simd_insert(src, LANE as u32, *ptr) } @@ -1135,7 +1135,7 @@ pub unsafe fn vld1q_lane_u8<const LANE: i32>(ptr: *const u8, src: uint8x16_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x4_t) -> uint16x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1151,7 +1151,7 @@ pub unsafe fn vld1_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x4_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x8_t) -> uint16x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -1167,7 +1167,7 @@ pub unsafe fn vld1q_lane_u16<const LANE: i32>(ptr: *const u16, src: uint16x8_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x2_t) -> uint32x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1183,7 +1183,7 @@ pub unsafe fn vld1_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x2_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x4_t) -> uint32x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1199,7 +1199,7 @@ pub unsafe fn vld1q_lane_u32<const LANE: i32>(ptr: *const u32, src: uint32x4_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x1_t) -> uint64x1_t { - static_assert!(LANE : i32 where LANE == 0); + static_assert!(LANE == 0); simd_insert(src, LANE as u32, *ptr) } @@ -1215,7 +1215,7 @@ pub unsafe fn vld1_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x1_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x2_t) -> uint64x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1231,7 +1231,7 @@ pub unsafe fn vld1q_lane_u64<const LANE: i32>(ptr: *const u64, src: uint64x2_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x8_t) -> poly8x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -1247,7 +1247,7 @@ pub unsafe fn vld1_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x8_t) -> p stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x16_t) -> poly8x16_t { - static_assert_imm4!(LANE); + static_assert_uimm_bits!(LANE, 4); simd_insert(src, LANE as u32, *ptr) } @@ -1263,7 +1263,7 @@ pub unsafe fn vld1q_lane_p8<const LANE: i32>(ptr: *const p8, src: poly8x16_t) -> stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x4_t) -> poly16x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1279,7 +1279,7 @@ pub unsafe fn vld1_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x4_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x8_t) -> poly16x8_t { - static_assert_imm3!(LANE); + static_assert_uimm_bits!(LANE, 3); simd_insert(src, LANE as u32, *ptr) } @@ -1297,7 +1297,7 @@ pub unsafe fn vld1q_lane_p16<const LANE: i32>(ptr: *const p16, src: poly16x8_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x1_t) -> poly64x1_t { - static_assert!(LANE : i32 where LANE == 0); + static_assert!(LANE == 0); simd_insert(src, LANE as u32, *ptr) } @@ -1315,7 +1315,7 @@ pub unsafe fn vld1_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x1_t) - stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x2_t) -> poly64x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1331,7 +1331,7 @@ pub unsafe fn vld1q_lane_p64<const LANE: i32>(ptr: *const p64, src: poly64x2_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x2_t) -> float32x2_t { - static_assert_imm1!(LANE); + static_assert_uimm_bits!(LANE, 1); simd_insert(src, LANE as u32, *ptr) } @@ -1347,7 +1347,7 @@ pub unsafe fn vld1_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x2_t) stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vld1q_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x4_t) -> float32x4_t { - static_assert_imm2!(LANE); + static_assert_uimm_bits!(LANE, 2); simd_insert(src, LANE as u32, *ptr) } @@ -1363,7 +1363,7 @@ pub unsafe fn vld1q_lane_f32<const LANE: i32>(ptr: *const f32, src: float32x4_t) )] pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t { let x = vld1_lane_s8::<0>(ptr, transmute(i8x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1378,7 +1378,7 @@ pub unsafe fn vld1_dup_s8(ptr: *const i8) -> int8x8_t { )] pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t { let x = vld1q_lane_s8::<0>(ptr, transmute(i8x16::splat(0))); - simd_shuffle16!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1393,7 +1393,7 @@ pub unsafe fn vld1q_dup_s8(ptr: *const i8) -> int8x16_t { )] pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t { let x = vld1_lane_s16::<0>(ptr, transmute(i16x4::splat(0))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1408,7 +1408,7 @@ pub unsafe fn vld1_dup_s16(ptr: *const i16) -> int16x4_t { )] pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t { let x = vld1q_lane_s16::<0>(ptr, transmute(i16x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1423,7 +1423,7 @@ pub unsafe fn vld1q_dup_s16(ptr: *const i16) -> int16x8_t { )] pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t { let x = vld1_lane_s32::<0>(ptr, transmute(i32x2::splat(0))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1438,7 +1438,7 @@ pub unsafe fn vld1_dup_s32(ptr: *const i32) -> int32x2_t { )] pub unsafe fn vld1q_dup_s32(ptr: *const i32) -> int32x4_t { let x = vld1q_lane_s32::<0>(ptr, transmute(i32x4::splat(0))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1474,7 +1474,7 @@ pub unsafe fn vld1_dup_s64(ptr: *const i64) -> int64x1_t { )] pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t { let x = vld1q_lane_s64::<0>(ptr, transmute(i64x2::splat(0))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1489,7 +1489,7 @@ pub unsafe fn vld1q_dup_s64(ptr: *const i64) -> int64x2_t { )] pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t { let x = vld1_lane_u8::<0>(ptr, transmute(u8x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1504,7 +1504,7 @@ pub unsafe fn vld1_dup_u8(ptr: *const u8) -> uint8x8_t { )] pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t { let x = vld1q_lane_u8::<0>(ptr, transmute(u8x16::splat(0))); - simd_shuffle16!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1519,7 +1519,7 @@ pub unsafe fn vld1q_dup_u8(ptr: *const u8) -> uint8x16_t { )] pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t { let x = vld1_lane_u16::<0>(ptr, transmute(u16x4::splat(0))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1534,7 +1534,7 @@ pub unsafe fn vld1_dup_u16(ptr: *const u16) -> uint16x4_t { )] pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t { let x = vld1q_lane_u16::<0>(ptr, transmute(u16x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1549,7 +1549,7 @@ pub unsafe fn vld1q_dup_u16(ptr: *const u16) -> uint16x8_t { )] pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t { let x = vld1_lane_u32::<0>(ptr, transmute(u32x2::splat(0))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1564,7 +1564,7 @@ pub unsafe fn vld1_dup_u32(ptr: *const u32) -> uint32x2_t { )] pub unsafe fn vld1q_dup_u32(ptr: *const u32) -> uint32x4_t { let x = vld1q_lane_u32::<0>(ptr, transmute(u32x4::splat(0))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1600,7 +1600,7 @@ pub unsafe fn vld1_dup_u64(ptr: *const u64) -> uint64x1_t { )] pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t { let x = vld1q_lane_u64::<0>(ptr, transmute(u64x2::splat(0))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1615,7 +1615,7 @@ pub unsafe fn vld1q_dup_u64(ptr: *const u64) -> uint64x2_t { )] pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t { let x = vld1_lane_p8::<0>(ptr, transmute(u8x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1630,7 +1630,7 @@ pub unsafe fn vld1_dup_p8(ptr: *const p8) -> poly8x8_t { )] pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t { let x = vld1q_lane_p8::<0>(ptr, transmute(u8x16::splat(0))); - simd_shuffle16!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1645,7 +1645,7 @@ pub unsafe fn vld1q_dup_p8(ptr: *const p8) -> poly8x16_t { )] pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t { let x = vld1_lane_p16::<0>(ptr, transmute(u16x4::splat(0))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1660,7 +1660,7 @@ pub unsafe fn vld1_dup_p16(ptr: *const p16) -> poly16x4_t { )] pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t { let x = vld1q_lane_p16::<0>(ptr, transmute(u16x8::splat(0))); - simd_shuffle8!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0, 0, 0, 0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1675,7 +1675,7 @@ pub unsafe fn vld1q_dup_p16(ptr: *const p16) -> poly16x8_t { )] pub unsafe fn vld1_dup_f32(ptr: *const f32) -> float32x2_t { let x = vld1_lane_f32::<0>(ptr, transmute(f32x2::splat(0.))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1715,7 +1715,7 @@ pub unsafe fn vld1_dup_p64(ptr: *const p64) -> poly64x1_t { )] pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t { let x = vld1q_lane_p64::<0>(ptr, transmute(u64x2::splat(0))); - simd_shuffle2!(x, x, [0, 0]) + simd_shuffle!(x, x, [0, 0]) } /// Load one single-element structure and Replicate to all lanes (of one register). @@ -1730,7 +1730,7 @@ pub unsafe fn vld1q_dup_p64(ptr: *const p64) -> poly64x2_t { )] pub unsafe fn vld1q_dup_f32(ptr: *const f32) -> float32x4_t { let x = vld1q_lane_f32::<0>(ptr, transmute(f32x4::splat(0.))); - simd_shuffle4!(x, x, [0, 0, 0, 0]) + simd_shuffle!(x, x, [0, 0, 0, 0]) } // signed absolute difference and accumulate (64-bit) @@ -2369,8 +2369,8 @@ pub unsafe fn vaddl_u32(a: uint32x2_t, b: uint32x2_t) -> uint64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { - let a: int8x8_t = simd_shuffle8!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); - let b: int8x8_t = simd_shuffle8!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); + let a: int8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); + let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); let a: int16x8_t = simd_cast(a); let b: int16x8_t = simd_cast(b); simd_add(a, b) @@ -2387,8 +2387,8 @@ pub unsafe fn vaddl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { - let a: int16x4_t = simd_shuffle4!(a, a, [4, 5, 6, 7]); - let b: int16x4_t = simd_shuffle4!(b, b, [4, 5, 6, 7]); + let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]); + let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); let a: int32x4_t = simd_cast(a); let b: int32x4_t = simd_cast(b); simd_add(a, b) @@ -2405,8 +2405,8 @@ pub unsafe fn vaddl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { - let a: int32x2_t = simd_shuffle2!(a, a, [2, 3]); - let b: int32x2_t = simd_shuffle2!(b, b, [2, 3]); + let a: int32x2_t = simd_shuffle!(a, a, [2, 3]); + let b: int32x2_t = simd_shuffle!(b, b, [2, 3]); let a: int64x2_t = simd_cast(a); let b: int64x2_t = simd_cast(b); simd_add(a, b) @@ -2423,8 +2423,8 @@ pub unsafe fn vaddl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { - let a: uint8x8_t = simd_shuffle8!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); - let b: uint8x8_t = simd_shuffle8!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); + let a: uint8x8_t = simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]); + let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); let a: uint16x8_t = simd_cast(a); let b: uint16x8_t = simd_cast(b); simd_add(a, b) @@ -2441,8 +2441,8 @@ pub unsafe fn vaddl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { - let a: uint16x4_t = simd_shuffle4!(a, a, [4, 5, 6, 7]); - let b: uint16x4_t = simd_shuffle4!(b, b, [4, 5, 6, 7]); + let a: uint16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]); + let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); let a: uint32x4_t = simd_cast(a); let b: uint32x4_t = simd_cast(b); simd_add(a, b) @@ -2459,8 +2459,8 @@ pub unsafe fn vaddl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t { - let a: uint32x2_t = simd_shuffle2!(a, a, [2, 3]); - let b: uint32x2_t = simd_shuffle2!(b, b, [2, 3]); + let a: uint32x2_t = simd_shuffle!(a, a, [2, 3]); + let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]); let a: uint64x2_t = simd_cast(a); let b: uint64x2_t = simd_cast(b); simd_add(a, b) @@ -2567,7 +2567,7 @@ pub unsafe fn vaddw_u32(a: uint64x2_t, b: uint32x2_t) -> uint64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t { - let b: int8x8_t = simd_shuffle8!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); + let b: int8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); let b: int16x8_t = simd_cast(b); simd_add(a, b) } @@ -2583,7 +2583,7 @@ pub unsafe fn vaddw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t { - let b: int16x4_t = simd_shuffle4!(b, b, [4, 5, 6, 7]); + let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); let b: int32x4_t = simd_cast(b); simd_add(a, b) } @@ -2599,7 +2599,7 @@ pub unsafe fn vaddw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t { - let b: int32x2_t = simd_shuffle2!(b, b, [2, 3]); + let b: int32x2_t = simd_shuffle!(b, b, [2, 3]); let b: int64x2_t = simd_cast(b); simd_add(a, b) } @@ -2615,7 +2615,7 @@ pub unsafe fn vaddw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { - let b: uint8x8_t = simd_shuffle8!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); + let b: uint8x8_t = simd_shuffle!(b, b, [8, 9, 10, 11, 12, 13, 14, 15]); let b: uint16x8_t = simd_cast(b); simd_add(a, b) } @@ -2631,7 +2631,7 @@ pub unsafe fn vaddw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t { - let b: uint16x4_t = simd_shuffle4!(b, b, [4, 5, 6, 7]); + let b: uint16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]); let b: uint32x4_t = simd_cast(b); simd_add(a, b) } @@ -2647,7 +2647,7 @@ pub unsafe fn vaddw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vaddw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t { - let b: uint32x2_t = simd_shuffle2!(b, b, [2, 3]); + let b: uint32x2_t = simd_shuffle!(b, b, [2, 3]); let b: uint64x2_t = simd_cast(b); simd_add(a, b) } @@ -2748,7 +2748,7 @@ pub unsafe fn vaddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t { )] pub unsafe fn vaddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t { let x = simd_cast(simd_shr(simd_add(a, b), int16x8_t(8, 8, 8, 8, 8, 8, 8, 8))); - simd_shuffle16!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) } /// Add returning High Narrow (high half). @@ -2763,7 +2763,7 @@ pub unsafe fn vaddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x1 )] pub unsafe fn vaddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t { let x = simd_cast(simd_shr(simd_add(a, b), int32x4_t(16, 16, 16, 16))); - simd_shuffle8!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Add returning High Narrow (high half). @@ -2778,7 +2778,7 @@ pub unsafe fn vaddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16 )] pub unsafe fn vaddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t { let x = simd_cast(simd_shr(simd_add(a, b), int64x2_t(32, 32))); - simd_shuffle4!(r, x, [0, 1, 2, 3]) + simd_shuffle!(r, x, [0, 1, 2, 3]) } /// Add returning High Narrow (high half). @@ -2793,7 +2793,7 @@ pub unsafe fn vaddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32 )] pub unsafe fn vaddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t { let x = simd_cast(simd_shr(simd_add(a, b), uint16x8_t(8, 8, 8, 8, 8, 8, 8, 8))); - simd_shuffle16!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) } /// Add returning High Narrow (high half). @@ -2808,7 +2808,7 @@ pub unsafe fn vaddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uin )] pub unsafe fn vaddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t { let x = simd_cast(simd_shr(simd_add(a, b), uint32x4_t(16, 16, 16, 16))); - simd_shuffle8!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Add returning High Narrow (high half). @@ -2823,7 +2823,7 @@ pub unsafe fn vaddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> ui )] pub unsafe fn vaddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t { let x = simd_cast(simd_shr(simd_add(a, b), uint64x2_t(32, 32))); - simd_shuffle4!(r, x, [0, 1, 2, 3]) + simd_shuffle!(r, x, [0, 1, 2, 3]) } /// Rounding Add returning High Narrow. @@ -2922,7 +2922,7 @@ pub unsafe fn vraddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t { )] pub unsafe fn vraddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t { let x = vraddhn_s16_(a, b); - simd_shuffle16!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) } /// Rounding Add returning High Narrow (high half). @@ -2937,7 +2937,7 @@ pub unsafe fn vraddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x )] pub unsafe fn vraddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t { let x = vraddhn_s32_(a, b); - simd_shuffle8!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Rounding Add returning High Narrow (high half). @@ -2952,7 +2952,7 @@ pub unsafe fn vraddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int1 )] pub unsafe fn vraddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t { let x = vraddhn_s64_(a, b); - simd_shuffle4!(r, x, [0, 1, 2, 3]) + simd_shuffle!(r, x, [0, 1, 2, 3]) } /// Rounding Add returning High Narrow (high half). @@ -2967,7 +2967,7 @@ pub unsafe fn vraddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int3 )] pub unsafe fn vraddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t { let x: uint8x8_t = transmute(vraddhn_s16_(transmute(a), transmute(b))); - simd_shuffle16!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]) } /// Rounding Add returning High Narrow (high half). @@ -2982,7 +2982,7 @@ pub unsafe fn vraddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> ui )] pub unsafe fn vraddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t { let x: uint16x4_t = transmute(vraddhn_s32_(transmute(a), transmute(b))); - simd_shuffle8!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(r, x, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Rounding Add returning High Narrow (high half). @@ -2997,7 +2997,7 @@ pub unsafe fn vraddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> u )] pub unsafe fn vraddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t { let x: uint32x2_t = transmute(vraddhn_s64_(transmute(a), transmute(b))); - simd_shuffle4!(r, x, [0, 1, 2, 3]) + simd_shuffle!(r, x, [0, 1, 2, 3]) } /// Signed Add Long Pairwise. @@ -4655,7 +4655,7 @@ pub unsafe fn vpmax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_u64<const IMM5: i32>(v: uint64x2_t) -> u64 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4670,7 +4670,7 @@ pub unsafe fn vgetq_lane_u64<const IMM5: i32>(v: uint64x2_t) -> u64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_u64<const IMM5: i32>(v: uint64x1_t) -> u64 { - static_assert!(IMM5 : i32 where IMM5 == 0); + static_assert!(IMM5 == 0); simd_extract(v, 0) } @@ -4685,7 +4685,7 @@ pub unsafe fn vget_lane_u64<const IMM5: i32>(v: uint64x1_t) -> u64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_u16<const IMM5: i32>(v: uint16x4_t) -> u16 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4700,7 +4700,7 @@ pub unsafe fn vget_lane_u16<const IMM5: i32>(v: uint16x4_t) -> u16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_s16<const IMM5: i32>(v: int16x4_t) -> i16 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4715,7 +4715,7 @@ pub unsafe fn vget_lane_s16<const IMM5: i32>(v: int16x4_t) -> i16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_p16<const IMM5: i32>(v: poly16x4_t) -> p16 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4730,7 +4730,7 @@ pub unsafe fn vget_lane_p16<const IMM5: i32>(v: poly16x4_t) -> p16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_u32<const IMM5: i32>(v: uint32x2_t) -> u32 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4745,7 +4745,7 @@ pub unsafe fn vget_lane_u32<const IMM5: i32>(v: uint32x2_t) -> u32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_s32<const IMM5: i32>(v: int32x2_t) -> i32 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4760,7 +4760,7 @@ pub unsafe fn vget_lane_s32<const IMM5: i32>(v: int32x2_t) -> i32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_f32<const IMM5: i32>(v: float32x2_t) -> f32 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4775,7 +4775,7 @@ pub unsafe fn vget_lane_f32<const IMM5: i32>(v: float32x2_t) -> f32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_f32<const IMM5: i32>(v: float32x4_t) -> f32 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4790,7 +4790,7 @@ pub unsafe fn vgetq_lane_f32<const IMM5: i32>(v: float32x4_t) -> f32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_p64<const IMM5: i32>(v: poly64x1_t) -> p64 { - static_assert!(IMM5 : i32 where IMM5 == 0); + static_assert!(IMM5 == 0); simd_extract(v, IMM5 as u32) } @@ -4805,7 +4805,7 @@ pub unsafe fn vget_lane_p64<const IMM5: i32>(v: poly64x1_t) -> p64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_p64<const IMM5: i32>(v: poly64x2_t) -> p64 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4820,7 +4820,7 @@ pub unsafe fn vgetq_lane_p64<const IMM5: i32>(v: poly64x2_t) -> p64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_s64<const IMM5: i32>(v: int64x1_t) -> i64 { - static_assert!(IMM5 : i32 where IMM5 == 0); + static_assert!(IMM5 == 0); simd_extract(v, IMM5 as u32) } @@ -4835,7 +4835,7 @@ pub unsafe fn vget_lane_s64<const IMM5: i32>(v: int64x1_t) -> i64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_s64<const IMM5: i32>(v: int64x2_t) -> i64 { - static_assert_imm1!(IMM5); + static_assert_uimm_bits!(IMM5, 1); simd_extract(v, IMM5 as u32) } @@ -4850,7 +4850,7 @@ pub unsafe fn vgetq_lane_s64<const IMM5: i32>(v: int64x2_t) -> i64 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_u16<const IMM5: i32>(v: uint16x8_t) -> u16 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4865,7 +4865,7 @@ pub unsafe fn vgetq_lane_u16<const IMM5: i32>(v: uint16x8_t) -> u16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_u32<const IMM5: i32>(v: uint32x4_t) -> u32 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4880,7 +4880,7 @@ pub unsafe fn vgetq_lane_u32<const IMM5: i32>(v: uint32x4_t) -> u32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_s16<const IMM5: i32>(v: int16x8_t) -> i16 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4895,7 +4895,7 @@ pub unsafe fn vgetq_lane_s16<const IMM5: i32>(v: int16x8_t) -> i16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_p16<const IMM5: i32>(v: poly16x8_t) -> p16 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4910,7 +4910,7 @@ pub unsafe fn vgetq_lane_p16<const IMM5: i32>(v: poly16x8_t) -> p16 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_s32<const IMM5: i32>(v: int32x4_t) -> i32 { - static_assert_imm2!(IMM5); + static_assert_uimm_bits!(IMM5, 2); simd_extract(v, IMM5 as u32) } @@ -4925,7 +4925,7 @@ pub unsafe fn vgetq_lane_s32<const IMM5: i32>(v: int32x4_t) -> i32 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_u8<const IMM5: i32>(v: uint8x8_t) -> u8 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4940,7 +4940,7 @@ pub unsafe fn vget_lane_u8<const IMM5: i32>(v: uint8x8_t) -> u8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_s8<const IMM5: i32>(v: int8x8_t) -> i8 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4955,7 +4955,7 @@ pub unsafe fn vget_lane_s8<const IMM5: i32>(v: int8x8_t) -> i8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_lane_p8<const IMM5: i32>(v: poly8x8_t) -> p8 { - static_assert_imm3!(IMM5); + static_assert_uimm_bits!(IMM5, 3); simd_extract(v, IMM5 as u32) } @@ -4970,7 +4970,7 @@ pub unsafe fn vget_lane_p8<const IMM5: i32>(v: poly8x8_t) -> p8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_u8<const IMM5: i32>(v: uint8x16_t) -> u8 { - static_assert_imm4!(IMM5); + static_assert_uimm_bits!(IMM5, 4); simd_extract(v, IMM5 as u32) } @@ -4985,7 +4985,7 @@ pub unsafe fn vgetq_lane_u8<const IMM5: i32>(v: uint8x16_t) -> u8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_s8<const IMM5: i32>(v: int8x16_t) -> i8 { - static_assert_imm4!(IMM5); + static_assert_uimm_bits!(IMM5, 4); simd_extract(v, IMM5 as u32) } @@ -5000,7 +5000,7 @@ pub unsafe fn vgetq_lane_s8<const IMM5: i32>(v: int8x16_t) -> i8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vgetq_lane_p8<const IMM5: i32>(v: poly8x16_t) -> p8 { - static_assert_imm4!(IMM5); + static_assert_uimm_bits!(IMM5, 4); simd_extract(v, IMM5 as u32) } @@ -5015,7 +5015,7 @@ pub unsafe fn vgetq_lane_p8<const IMM5: i32>(v: poly8x16_t) -> p8 { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_s8(a: int8x16_t) -> int8x8_t { - simd_shuffle8!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) } /// Duplicate vector element to vector or scalar @@ -5029,7 +5029,7 @@ pub unsafe fn vget_high_s8(a: int8x16_t) -> int8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_s16(a: int16x8_t) -> int16x4_t { - simd_shuffle4!(a, a, [4, 5, 6, 7]) + simd_shuffle!(a, a, [4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5043,7 +5043,7 @@ pub unsafe fn vget_high_s16(a: int16x8_t) -> int16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_s32(a: int32x4_t) -> int32x2_t { - simd_shuffle2!(a, a, [2, 3]) + simd_shuffle!(a, a, [2, 3]) } /// Duplicate vector element to vector or scalar @@ -5071,7 +5071,7 @@ pub unsafe fn vget_high_s64(a: int64x2_t) -> int64x1_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_u8(a: uint8x16_t) -> uint8x8_t { - simd_shuffle8!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) } /// Duplicate vector element to vector or scalar @@ -5085,7 +5085,7 @@ pub unsafe fn vget_high_u8(a: uint8x16_t) -> uint8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_u16(a: uint16x8_t) -> uint16x4_t { - simd_shuffle4!(a, a, [4, 5, 6, 7]) + simd_shuffle!(a, a, [4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5099,7 +5099,7 @@ pub unsafe fn vget_high_u16(a: uint16x8_t) -> uint16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_u32(a: uint32x4_t) -> uint32x2_t { - simd_shuffle2!(a, a, [2, 3]) + simd_shuffle!(a, a, [2, 3]) } /// Duplicate vector element to vector or scalar @@ -5127,7 +5127,7 @@ pub unsafe fn vget_high_u64(a: uint64x2_t) -> uint64x1_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_p8(a: poly8x16_t) -> poly8x8_t { - simd_shuffle8!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) + simd_shuffle!(a, a, [8, 9, 10, 11, 12, 13, 14, 15]) } /// Duplicate vector element to vector or scalar @@ -5141,7 +5141,7 @@ pub unsafe fn vget_high_p8(a: poly8x16_t) -> poly8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_p16(a: poly16x8_t) -> poly16x4_t { - simd_shuffle4!(a, a, [4, 5, 6, 7]) + simd_shuffle!(a, a, [4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5155,7 +5155,7 @@ pub unsafe fn vget_high_p16(a: poly16x8_t) -> poly16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_high_f32(a: float32x4_t) -> float32x2_t { - simd_shuffle2!(a, a, [2, 3]) + simd_shuffle!(a, a, [2, 3]) } /// Duplicate vector element to vector or scalar @@ -5168,7 +5168,7 @@ pub unsafe fn vget_high_f32(a: float32x4_t) -> float32x2_t { stable(feature = "vget_low_s8", since = "1.60.0") )] pub unsafe fn vget_low_s8(a: int8x16_t) -> int8x8_t { - simd_shuffle8!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5181,7 +5181,7 @@ pub unsafe fn vget_low_s8(a: int8x16_t) -> int8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_s16(a: int16x8_t) -> int16x4_t { - simd_shuffle4!(a, a, [0, 1, 2, 3]) + simd_shuffle!(a, a, [0, 1, 2, 3]) } /// Duplicate vector element to vector or scalar @@ -5194,7 +5194,7 @@ pub unsafe fn vget_low_s16(a: int16x8_t) -> int16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_s32(a: int32x4_t) -> int32x2_t { - simd_shuffle2!(a, a, [0, 1]) + simd_shuffle!(a, a, [0, 1]) } /// Duplicate vector element to vector or scalar @@ -5220,7 +5220,7 @@ pub unsafe fn vget_low_s64(a: int64x2_t) -> int64x1_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_u8(a: uint8x16_t) -> uint8x8_t { - simd_shuffle8!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5233,7 +5233,7 @@ pub unsafe fn vget_low_u8(a: uint8x16_t) -> uint8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_u16(a: uint16x8_t) -> uint16x4_t { - simd_shuffle4!(a, a, [0, 1, 2, 3]) + simd_shuffle!(a, a, [0, 1, 2, 3]) } /// Duplicate vector element to vector or scalar @@ -5246,7 +5246,7 @@ pub unsafe fn vget_low_u16(a: uint16x8_t) -> uint16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_u32(a: uint32x4_t) -> uint32x2_t { - simd_shuffle2!(a, a, [0, 1]) + simd_shuffle!(a, a, [0, 1]) } /// Duplicate vector element to vector or scalar @@ -5272,7 +5272,7 @@ pub unsafe fn vget_low_u64(a: uint64x2_t) -> uint64x1_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_p8(a: poly8x16_t) -> poly8x8_t { - simd_shuffle8!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(a, a, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Duplicate vector element to vector or scalar @@ -5285,7 +5285,7 @@ pub unsafe fn vget_low_p8(a: poly8x16_t) -> poly8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_p16(a: poly16x8_t) -> poly16x4_t { - simd_shuffle4!(a, a, [0, 1, 2, 3]) + simd_shuffle!(a, a, [0, 1, 2, 3]) } /// Duplicate vector element to vector or scalar @@ -5298,7 +5298,7 @@ pub unsafe fn vget_low_p16(a: poly16x8_t) -> poly16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vget_low_f32(a: float32x4_t) -> float32x2_t { - simd_shuffle2!(a, a, [0, 1]) + simd_shuffle!(a, a, [0, 1]) } /// Duplicate vector element to vector or scalar @@ -6000,7 +6000,7 @@ pub unsafe fn vmovq_n_f32(value: f32) -> float32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vext_s64<const N: i32>(a: int64x1_t, _b: int64x1_t) -> int64x1_t { - static_assert!(N : i32 where N == 0); + static_assert!(N == 0); a } @@ -6016,7 +6016,7 @@ pub unsafe fn vext_s64<const N: i32>(a: int64x1_t, _b: int64x1_t) -> int64x1_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vext_u64<const N: i32>(a: uint64x1_t, _b: uint64x1_t) -> uint64x1_t { - static_assert!(N : i32 where N == 0); + static_assert!(N == 0); a } @@ -6110,7 +6110,7 @@ pub unsafe fn vcntq_p8(a: poly8x16_t) -> poly8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16_s8(a: int8x8_t) -> int8x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6124,7 +6124,7 @@ pub unsafe fn vrev16_s8(a: int8x8_t) -> int8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16q_s8(a: int8x16_t) -> int8x16_t { - simd_shuffle16!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) } /// Reversing vector elements (swap endianness) @@ -6138,7 +6138,7 @@ pub unsafe fn vrev16q_s8(a: int8x16_t) -> int8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16_u8(a: uint8x8_t) -> uint8x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6152,7 +6152,7 @@ pub unsafe fn vrev16_u8(a: uint8x8_t) -> uint8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16q_u8(a: uint8x16_t) -> uint8x16_t { - simd_shuffle16!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) } /// Reversing vector elements (swap endianness) @@ -6166,7 +6166,7 @@ pub unsafe fn vrev16q_u8(a: uint8x16_t) -> uint8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16_p8(a: poly8x8_t) -> poly8x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6180,7 +6180,7 @@ pub unsafe fn vrev16_p8(a: poly8x8_t) -> poly8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev16q_p8(a: poly8x16_t) -> poly8x16_t { - simd_shuffle16!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14]) } /// Reversing vector elements (swap endianness) @@ -6194,7 +6194,7 @@ pub unsafe fn vrev16q_p8(a: poly8x16_t) -> poly8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_s8(a: int8x8_t) -> int8x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Reversing vector elements (swap endianness) @@ -6208,7 +6208,7 @@ pub unsafe fn vrev32_s8(a: int8x8_t) -> int8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_s8(a: int8x16_t) -> int8x16_t { - simd_shuffle16!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) } /// Reversing vector elements (swap endianness) @@ -6222,7 +6222,7 @@ pub unsafe fn vrev32q_s8(a: int8x16_t) -> int8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_u8(a: uint8x8_t) -> uint8x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Reversing vector elements (swap endianness) @@ -6236,7 +6236,7 @@ pub unsafe fn vrev32_u8(a: uint8x8_t) -> uint8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_u8(a: uint8x16_t) -> uint8x16_t { - simd_shuffle16!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) } /// Reversing vector elements (swap endianness) @@ -6250,7 +6250,7 @@ pub unsafe fn vrev32q_u8(a: uint8x16_t) -> uint8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_s16(a: int16x4_t) -> int16x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6264,7 +6264,7 @@ pub unsafe fn vrev32_s16(a: int16x4_t) -> int16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_s16(a: int16x8_t) -> int16x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6278,7 +6278,7 @@ pub unsafe fn vrev32q_s16(a: int16x8_t) -> int16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_p16(a: poly16x4_t) -> poly16x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6292,7 +6292,7 @@ pub unsafe fn vrev32_p16(a: poly16x4_t) -> poly16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_p16(a: poly16x8_t) -> poly16x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6306,7 +6306,7 @@ pub unsafe fn vrev32q_p16(a: poly16x8_t) -> poly16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_u16(a: uint16x4_t) -> uint16x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6320,7 +6320,7 @@ pub unsafe fn vrev32_u16(a: uint16x4_t) -> uint16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_u16(a: uint16x8_t) -> uint16x8_t { - simd_shuffle8!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) + simd_shuffle!(a, a, [1, 0, 3, 2, 5, 4, 7, 6]) } /// Reversing vector elements (swap endianness) @@ -6334,7 +6334,7 @@ pub unsafe fn vrev32q_u16(a: uint16x8_t) -> uint16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32_p8(a: poly8x8_t) -> poly8x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Reversing vector elements (swap endianness) @@ -6348,7 +6348,7 @@ pub unsafe fn vrev32_p8(a: poly8x8_t) -> poly8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev32q_p8(a: poly8x16_t) -> poly8x16_t { - simd_shuffle16!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]) } /// Reversing vector elements (swap endianness) @@ -6362,7 +6362,7 @@ pub unsafe fn vrev32q_p8(a: poly8x16_t) -> poly8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_s8(a: int8x8_t) -> int8x8_t { - simd_shuffle8!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6376,7 +6376,7 @@ pub unsafe fn vrev64_s8(a: int8x8_t) -> int8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_s8(a: int8x16_t) -> int8x16_t { - simd_shuffle16!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) } /// Reversing vector elements (swap endianness) @@ -6390,7 +6390,7 @@ pub unsafe fn vrev64q_s8(a: int8x16_t) -> int8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_s16(a: int16x4_t) -> int16x4_t { - simd_shuffle4!(a, a, [3, 2, 1, 0]) + simd_shuffle!(a, a, [3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6404,7 +6404,7 @@ pub unsafe fn vrev64_s16(a: int16x4_t) -> int16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_s16(a: int16x8_t) -> int16x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Reversing vector elements (swap endianness) @@ -6418,7 +6418,7 @@ pub unsafe fn vrev64q_s16(a: int16x8_t) -> int16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_s32(a: int32x2_t) -> int32x2_t { - simd_shuffle2!(a, a, [1, 0]) + simd_shuffle!(a, a, [1, 0]) } /// Reversing vector elements (swap endianness) @@ -6432,7 +6432,7 @@ pub unsafe fn vrev64_s32(a: int32x2_t) -> int32x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_s32(a: int32x4_t) -> int32x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6446,7 +6446,7 @@ pub unsafe fn vrev64q_s32(a: int32x4_t) -> int32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_u8(a: uint8x8_t) -> uint8x8_t { - simd_shuffle8!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6460,7 +6460,7 @@ pub unsafe fn vrev64_u8(a: uint8x8_t) -> uint8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_u8(a: uint8x16_t) -> uint8x16_t { - simd_shuffle16!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) } /// Reversing vector elements (swap endianness) @@ -6474,7 +6474,7 @@ pub unsafe fn vrev64q_u8(a: uint8x16_t) -> uint8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_u16(a: uint16x4_t) -> uint16x4_t { - simd_shuffle4!(a, a, [3, 2, 1, 0]) + simd_shuffle!(a, a, [3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6488,7 +6488,7 @@ pub unsafe fn vrev64_u16(a: uint16x4_t) -> uint16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_u16(a: uint16x8_t) -> uint16x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Reversing vector elements (swap endianness) @@ -6502,7 +6502,7 @@ pub unsafe fn vrev64q_u16(a: uint16x8_t) -> uint16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_u32(a: uint32x2_t) -> uint32x2_t { - simd_shuffle2!(a, a, [1, 0]) + simd_shuffle!(a, a, [1, 0]) } /// Reversing vector elements (swap endianness) @@ -6516,7 +6516,7 @@ pub unsafe fn vrev64_u32(a: uint32x2_t) -> uint32x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_u32(a: uint32x4_t) -> uint32x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6530,7 +6530,7 @@ pub unsafe fn vrev64q_u32(a: uint32x4_t) -> uint32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_f32(a: float32x2_t) -> float32x2_t { - simd_shuffle2!(a, a, [1, 0]) + simd_shuffle!(a, a, [1, 0]) } /// Reversing vector elements (swap endianness) @@ -6544,7 +6544,7 @@ pub unsafe fn vrev64_f32(a: float32x2_t) -> float32x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_f32(a: float32x4_t) -> float32x4_t { - simd_shuffle4!(a, a, [1, 0, 3, 2]) + simd_shuffle!(a, a, [1, 0, 3, 2]) } /// Reversing vector elements (swap endianness) @@ -6558,7 +6558,7 @@ pub unsafe fn vrev64q_f32(a: float32x4_t) -> float32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_p8(a: poly8x8_t) -> poly8x8_t { - simd_shuffle8!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6572,7 +6572,7 @@ pub unsafe fn vrev64_p8(a: poly8x8_t) -> poly8x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_p8(a: poly8x16_t) -> poly8x16_t { - simd_shuffle16!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) + simd_shuffle!(a, a, [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8]) } /// Reversing vector elements (swap endianness) @@ -6586,7 +6586,7 @@ pub unsafe fn vrev64q_p8(a: poly8x16_t) -> poly8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64_p16(a: poly16x4_t) -> poly16x4_t { - simd_shuffle4!(a, a, [3, 2, 1, 0]) + simd_shuffle!(a, a, [3, 2, 1, 0]) } /// Reversing vector elements (swap endianness) @@ -6600,7 +6600,7 @@ pub unsafe fn vrev64_p16(a: poly16x4_t) -> poly16x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vrev64q_p16(a: poly16x8_t) -> poly16x8_t { - simd_shuffle8!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) + simd_shuffle!(a, a, [3, 2, 1, 0, 7, 6, 5, 4]) } /// Signed Add and Accumulate Long Pairwise. @@ -6922,7 +6922,7 @@ pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] #[cfg_attr(test, assert_instr(nop))] pub unsafe fn vcombine_f16 ( low: float16x4_t, high: float16x4_t) -> float16x8_t { - simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) } */ @@ -6933,7 +6933,7 @@ pub unsafe fn vcombine_f16 ( low: float16x4_t, high: float16x4_t) -> float16x8_ #[cfg_attr(test, assert_instr(nop))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t { - simd_shuffle4!(low, high, [0, 1, 2, 3]) + simd_shuffle!(low, high, [0, 1, 2, 3]) } /// Vector combine @@ -6943,7 +6943,7 @@ pub unsafe fn vcombine_f32(low: float32x2_t, high: float32x2_t) -> float32x4_t { #[cfg_attr(test, assert_instr(nop))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t { - simd_shuffle16!( + simd_shuffle!( low, high, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], @@ -6957,7 +6957,7 @@ pub unsafe fn vcombine_p8(low: poly8x8_t, high: poly8x8_t) -> poly8x16_t { #[cfg_attr(test, assert_instr(nop))] #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t { - simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Vector combine @@ -6970,7 +6970,7 @@ pub unsafe fn vcombine_p16(low: poly16x4_t, high: poly16x4_t) -> poly16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t { - simd_shuffle16!( + simd_shuffle!( low, high, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], @@ -6987,7 +6987,7 @@ pub unsafe fn vcombine_s8(low: int8x8_t, high: int8x8_t) -> int8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t { - simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Vector combine @@ -7000,7 +7000,7 @@ pub unsafe fn vcombine_s16(low: int16x4_t, high: int16x4_t) -> int16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t { - simd_shuffle4!(low, high, [0, 1, 2, 3]) + simd_shuffle!(low, high, [0, 1, 2, 3]) } /// Vector combine @@ -7013,7 +7013,7 @@ pub unsafe fn vcombine_s32(low: int32x2_t, high: int32x2_t) -> int32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t { - simd_shuffle2!(low, high, [0, 1]) + simd_shuffle!(low, high, [0, 1]) } /// Vector combine @@ -7026,7 +7026,7 @@ pub unsafe fn vcombine_s64(low: int64x1_t, high: int64x1_t) -> int64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t { - simd_shuffle16!( + simd_shuffle!( low, high, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], @@ -7043,7 +7043,7 @@ pub unsafe fn vcombine_u8(low: uint8x8_t, high: uint8x8_t) -> uint8x16_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t { - simd_shuffle8!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) + simd_shuffle!(low, high, [0, 1, 2, 3, 4, 5, 6, 7]) } /// Vector combine @@ -7057,7 +7057,7 @@ pub unsafe fn vcombine_u16(low: uint16x4_t, high: uint16x4_t) -> uint16x8_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t { - simd_shuffle4!(low, high, [0, 1, 2, 3]) + simd_shuffle!(low, high, [0, 1, 2, 3]) } /// Vector combine @@ -7070,7 +7070,7 @@ pub unsafe fn vcombine_u32(low: uint32x2_t, high: uint32x2_t) -> uint32x4_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t { - simd_shuffle2!(low, high, [0, 1]) + simd_shuffle!(low, high, [0, 1]) } /// Vector combine @@ -7083,7 +7083,7 @@ pub unsafe fn vcombine_u64(low: uint64x1_t, high: uint64x1_t) -> uint64x2_t { stable(feature = "neon_intrinsics", since = "1.59.0") )] pub unsafe fn vcombine_p64(low: poly64x1_t, high: poly64x1_t) -> poly64x2_t { - simd_shuffle2!(low, high, [0, 1]) + simd_shuffle!(low, high, [0, 1]) } #[cfg(test)] |