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-rw-r--r--vendor/compiler_builtins/src/int/specialized_div_rem/mod.rs8
1 files changed, 5 insertions, 3 deletions
diff --git a/vendor/compiler_builtins/src/int/specialized_div_rem/mod.rs b/vendor/compiler_builtins/src/int/specialized_div_rem/mod.rs
index 77034eb54..760f5f5b7 100644
--- a/vendor/compiler_builtins/src/int/specialized_div_rem/mod.rs
+++ b/vendor/compiler_builtins/src/int/specialized_div_rem/mod.rs
@@ -95,8 +95,9 @@ const USE_LZ: bool = {
// LZD or LZCNT on SPARC only exists for the VIS 3 extension and later.
cfg!(target_feature = "vis3")
} else if cfg!(any(target_arch = "riscv32", target_arch = "riscv64")) {
- // The `B` extension on RISC-V determines if a CLZ assembly instruction exists
- cfg!(target_feature = "b")
+ // The 'Zbb' Basic Bit-Manipulation extension on RISC-V
+ // determines if a CLZ assembly instruction exists
+ cfg!(target_feature = "zbb")
} else {
// All other common targets Rust supports should have CLZ instructions
true
@@ -305,5 +306,6 @@ impl_binary_long!(
u32_normalization_shift,
32,
u32,
- i32
+ i32,
+ allow(dead_code)
);