summaryrefslogtreecommitdiffstats
path: root/rust/vendor/sha1
diff options
context:
space:
mode:
Diffstat (limited to 'rust/vendor/sha1')
-rw-r--r--rust/vendor/sha1/.cargo-checksum.json1
-rw-r--r--rust/vendor/sha1/CHANGELOG.md48
-rw-r--r--rust/vendor/sha1/Cargo.toml67
-rw-r--r--rust/vendor/sha1/LICENSE-APACHE201
-rw-r--r--rust/vendor/sha1/LICENSE-MIT27
-rw-r--r--rust/vendor/sha1/README.md65
-rw-r--r--rust/vendor/sha1/benches/mod.rs14
-rw-r--r--rust/vendor/sha1/src/compress.rs40
-rw-r--r--rust/vendor/sha1/src/compress/aarch64.rs18
-rw-r--r--rust/vendor/sha1/src/compress/loongarch64_asm.rs255
-rw-r--r--rust/vendor/sha1/src/compress/soft.rs260
-rw-r--r--rust/vendor/sha1/src/compress/x86.rs112
-rw-r--r--rust/vendor/sha1/src/lib.rs154
-rw-r--r--rust/vendor/sha1/tests/data/sha1.blbbin0 -> 234 bytes
-rw-r--r--rust/vendor/sha1/tests/mod.rs15
15 files changed, 1277 insertions, 0 deletions
diff --git a/rust/vendor/sha1/.cargo-checksum.json b/rust/vendor/sha1/.cargo-checksum.json
new file mode 100644
index 0000000..7fa32e2
--- /dev/null
+++ b/rust/vendor/sha1/.cargo-checksum.json
@@ -0,0 +1 @@
+{"files":{"CHANGELOG.md":"7e9245847760fa99eaab7e4864a199148387aaa6121ac3dfbe189f0b684cf7d2","Cargo.toml":"cbfdd2dcaf34776f686caf30420c0a32a13d032fdd62495a054e65c3b0769132","LICENSE-APACHE":"a9040321c3712d8fd0b09cf52b17445de04a23a10165049ae187cd39e5c86be5","LICENSE-MIT":"b4eb00df6e2a4d22518fcaa6a2b4646f249b3a3c9814509b22bd2091f1392ff1","README.md":"8028a4064be59cba366c1bafa682002b52891a3cc2d2169d8f38064ba69773d1","benches/mod.rs":"2765aec429270711235d6cd4911d0c21658e2fa3dfbe24559f24e21b056b507c","src/compress.rs":"fcd99dc9c137e1fc05e47d406adfeeafccb31bed981e7c8bf480d765fb36e877","src/compress/aarch64.rs":"b1e66c2df53eaf84ccf7466aed47c0718fc3dbe1d1c565b65abd60e84b6fc5d4","src/compress/loongarch64_asm.rs":"0fd7d61b5ca7d7bce40cd9ce9012eb787da9f9df87595bfe00f8d882267d182e","src/compress/soft.rs":"bc6dda22b15acd76d97e202a8b251d9c68441d426a71600b2a61c36dd6f3a08e","src/compress/x86.rs":"9d2b4f240a311a84b351c136cccdc4dc00a7fc35703146ad51ed2d6e0aaef2d0","src/lib.rs":"c3409d489833cf896d611baf0ca0e5958629fc9e5f91a1144e789dc1858c513c","tests/data/sha1.blb":"b9c03b9e56e0a7b08a6d6867599a33cab1a55aec3f41fef910c133fc35dc2851","tests/mod.rs":"34bb42bf4679b3f23ffc2338356c8579c872026eef9989955a29ba44a432c3b5"},"package":"e3bf829a2d51ab4a5ddf1352d8470c140cadc8301b2ae1789db023f01cedd6ba"} \ No newline at end of file
diff --git a/rust/vendor/sha1/CHANGELOG.md b/rust/vendor/sha1/CHANGELOG.md
new file mode 100644
index 0000000..429e677
--- /dev/null
+++ b/rust/vendor/sha1/CHANGELOG.md
@@ -0,0 +1,48 @@
+# Changelog
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
+and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+
+## 0.10.6 (2023-09-21)
+### Added
+- `asm!`-based backend for LoongArch64 targets gated behind `loongarch64_asm` feature [#504]
+
+[#504]: https://github.com/RustCrypto/hashes/pull/504
+
+## 0.10.5 (2022-09-16)
+### Added
+- Feature-gated OID support ([#405])
+
+[#405]: https://github.com/RustCrypto/hashes/pull/405
+
+## 0.10.4 (2022-09-02)
+### Fixed
+- MSRV issue which was not resolved by v0.10.3 ([#401])
+
+[#401]: https://github.com/RustCrypto/hashes/pull/401
+
+## 0.10.3 (2022-09-02)
+### Fixed
+- MSRV issue caused by publishing v0.10.2 using a buggy Nightly toolchain ([#399])
+
+[#399]: https://github.com/RustCrypto/hashes/pull/399
+
+## 0.10.2 (2022-08-30)
+### Changed
+- Ignore `asm` feature on unsupported targets ([#388])
+
+[#388]: https://github.com/RustCrypto/hashes/pull/388
+
+## 0.10.1 (2022-02-17)
+### Fixed
+- Minimal versions build ([#363])
+
+[#363]: https://github.com/RustCrypto/hashes/pull/363
+
+## 0.10.0 (2022-01-17)
+### Changed
+- The crate is transferred to the RustCrypto organization. New implementation is identical to the `sha-1 v0.10.0` crate and expressed in terms of traits from the `digest` crate. ([#350])
+
+[#350]: https://github.com/RustCrypto/hashes/pull/350
diff --git a/rust/vendor/sha1/Cargo.toml b/rust/vendor/sha1/Cargo.toml
new file mode 100644
index 0000000..8ddd909
--- /dev/null
+++ b/rust/vendor/sha1/Cargo.toml
@@ -0,0 +1,67 @@
+# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+#
+# When uploading crates to the registry Cargo will automatically
+# "normalize" Cargo.toml files for maximal compatibility
+# with all versions of Cargo and also rewrite `path` dependencies
+# to registry (e.g., crates.io) dependencies.
+#
+# If you are reading this file be aware that the original Cargo.toml
+# will likely look very different (and much more reasonable).
+# See Cargo.toml.orig for the original contents.
+
+[package]
+edition = "2018"
+name = "sha1"
+version = "0.10.6"
+authors = ["RustCrypto Developers"]
+description = "SHA-1 hash function"
+documentation = "https://docs.rs/sha1"
+readme = "README.md"
+keywords = [
+ "crypto",
+ "sha1",
+ "hash",
+ "digest",
+]
+categories = [
+ "cryptography",
+ "no-std",
+]
+license = "MIT OR Apache-2.0"
+repository = "https://github.com/RustCrypto/hashes"
+
+[package.metadata.docs.rs]
+all-features = true
+rustdoc-args = [
+ "--cfg",
+ "docsrs",
+]
+
+[dependencies.cfg-if]
+version = "1.0"
+
+[dependencies.digest]
+version = "0.10.7"
+
+[dev-dependencies.digest]
+version = "0.10.7"
+features = ["dev"]
+
+[dev-dependencies.hex-literal]
+version = "0.2.2"
+
+[features]
+asm = ["sha1-asm"]
+compress = []
+default = ["std"]
+force-soft = []
+loongarch64_asm = []
+oid = ["digest/oid"]
+std = ["digest/std"]
+
+[target."cfg(any(target_arch = \"aarch64\", target_arch = \"x86\", target_arch = \"x86_64\"))".dependencies.cpufeatures]
+version = "0.2"
+
+[target."cfg(any(target_arch = \"aarch64\", target_arch = \"x86\", target_arch = \"x86_64\"))".dependencies.sha1-asm]
+version = "0.5"
+optional = true
diff --git a/rust/vendor/sha1/LICENSE-APACHE b/rust/vendor/sha1/LICENSE-APACHE
new file mode 100644
index 0000000..78173fa
--- /dev/null
+++ b/rust/vendor/sha1/LICENSE-APACHE
@@ -0,0 +1,201 @@
+ Apache License
+ Version 2.0, January 2004
+ http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+ "License" shall mean the terms and conditions for use, reproduction,
+ and distribution as defined by Sections 1 through 9 of this document.
+
+ "Licensor" shall mean the copyright owner or entity authorized by
+ the copyright owner that is granting the License.
+
+ "Legal Entity" shall mean the union of the acting entity and all
+ other entities that control, are controlled by, or are under common
+ control with that entity. For the purposes of this definition,
+ "control" means (i) the power, direct or indirect, to cause the
+ direction or management of such entity, whether by contract or
+ otherwise, or (ii) ownership of fifty percent (50%) or more of the
+ outstanding shares, or (iii) beneficial ownership of such entity.
+
+ "You" (or "Your") shall mean an individual or Legal Entity
+ exercising permissions granted by this License.
+
+ "Source" form shall mean the preferred form for making modifications,
+ including but not limited to software source code, documentation
+ source, and configuration files.
+
+ "Object" form shall mean any form resulting from mechanical
+ transformation or translation of a Source form, including but
+ not limited to compiled object code, generated documentation,
+ and conversions to other media types.
+
+ "Work" shall mean the work of authorship, whether in Source or
+ Object form, made available under the License, as indicated by a
+ copyright notice that is included in or attached to the work
+ (an example is provided in the Appendix below).
+
+ "Derivative Works" shall mean any work, whether in Source or Object
+ form, that is based on (or derived from) the Work and for which the
+ editorial revisions, annotations, elaborations, or other modifications
+ represent, as a whole, an original work of authorship. For the purposes
+ of this License, Derivative Works shall not include works that remain
+ separable from, or merely link (or bind by name) to the interfaces of,
+ the Work and Derivative Works thereof.
+
+ "Contribution" shall mean any work of authorship, including
+ the original version of the Work and any modifications or additions
+ to that Work or Derivative Works thereof, that is intentionally
+ submitted to Licensor for inclusion in the Work by the copyright owner
+ or by an individual or Legal Entity authorized to submit on behalf of
+ the copyright owner. For the purposes of this definition, "submitted"
+ means any form of electronic, verbal, or written communication sent
+ to the Licensor or its representatives, including but not limited to
+ communication on electronic mailing lists, source code control systems,
+ and issue tracking systems that are managed by, or on behalf of, the
+ Licensor for the purpose of discussing and improving the Work, but
+ excluding communication that is conspicuously marked or otherwise
+ designated in writing by the copyright owner as "Not a Contribution."
+
+ "Contributor" shall mean Licensor and any individual or Legal Entity
+ on behalf of whom a Contribution has been received by Licensor and
+ subsequently incorporated within the Work.
+
+2. Grant of Copyright License. Subject to the terms and conditions of
+ this License, each Contributor hereby grants to You a perpetual,
+ worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+ copyright license to reproduce, prepare Derivative Works of,
+ publicly display, publicly perform, sublicense, and distribute the
+ Work and such Derivative Works in Source or Object form.
+
+3. Grant of Patent License. Subject to the terms and conditions of
+ this License, each Contributor hereby grants to You a perpetual,
+ worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+ (except as stated in this section) patent license to make, have made,
+ use, offer to sell, sell, import, and otherwise transfer the Work,
+ where such license applies only to those patent claims licensable
+ by such Contributor that are necessarily infringed by their
+ Contribution(s) alone or by combination of their Contribution(s)
+ with the Work to which such Contribution(s) was submitted. If You
+ institute patent litigation against any entity (including a
+ cross-claim or counterclaim in a lawsuit) alleging that the Work
+ or a Contribution incorporated within the Work constitutes direct
+ or contributory patent infringement, then any patent licenses
+ granted to You under this License for that Work shall terminate
+ as of the date such litigation is filed.
+
+4. Redistribution. You may reproduce and distribute copies of the
+ Work or Derivative Works thereof in any medium, with or without
+ modifications, and in Source or Object form, provided that You
+ meet the following conditions:
+
+ (a) You must give any other recipients of the Work or
+ Derivative Works a copy of this License; and
+
+ (b) You must cause any modified files to carry prominent notices
+ stating that You changed the files; and
+
+ (c) You must retain, in the Source form of any Derivative Works
+ that You distribute, all copyright, patent, trademark, and
+ attribution notices from the Source form of the Work,
+ excluding those notices that do not pertain to any part of
+ the Derivative Works; and
+
+ (d) If the Work includes a "NOTICE" text file as part of its
+ distribution, then any Derivative Works that You distribute must
+ include a readable copy of the attribution notices contained
+ within such NOTICE file, excluding those notices that do not
+ pertain to any part of the Derivative Works, in at least one
+ of the following places: within a NOTICE text file distributed
+ as part of the Derivative Works; within the Source form or
+ documentation, if provided along with the Derivative Works; or,
+ within a display generated by the Derivative Works, if and
+ wherever such third-party notices normally appear. The contents
+ of the NOTICE file are for informational purposes only and
+ do not modify the License. You may add Your own attribution
+ notices within Derivative Works that You distribute, alongside
+ or as an addendum to the NOTICE text from the Work, provided
+ that such additional attribution notices cannot be construed
+ as modifying the License.
+
+ You may add Your own copyright statement to Your modifications and
+ may provide additional or different license terms and conditions
+ for use, reproduction, or distribution of Your modifications, or
+ for any such Derivative Works as a whole, provided Your use,
+ reproduction, and distribution of the Work otherwise complies with
+ the conditions stated in this License.
+
+5. Submission of Contributions. Unless You explicitly state otherwise,
+ any Contribution intentionally submitted for inclusion in the Work
+ by You to the Licensor shall be under the terms and conditions of
+ this License, without any additional terms or conditions.
+ Notwithstanding the above, nothing herein shall supersede or modify
+ the terms of any separate license agreement you may have executed
+ with Licensor regarding such Contributions.
+
+6. Trademarks. This License does not grant permission to use the trade
+ names, trademarks, service marks, or product names of the Licensor,
+ except as required for reasonable and customary use in describing the
+ origin of the Work and reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty. Unless required by applicable law or
+ agreed to in writing, Licensor provides the Work (and each
+ Contributor provides its Contributions) on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied, including, without limitation, any warranties or conditions
+ of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+ PARTICULAR PURPOSE. You are solely responsible for determining the
+ appropriateness of using or redistributing the Work and assume any
+ risks associated with Your exercise of permissions under this License.
+
+8. Limitation of Liability. In no event and under no legal theory,
+ whether in tort (including negligence), contract, or otherwise,
+ unless required by applicable law (such as deliberate and grossly
+ negligent acts) or agreed to in writing, shall any Contributor be
+ liable to You for damages, including any direct, indirect, special,
+ incidental, or consequential damages of any character arising as a
+ result of this License or out of the use or inability to use the
+ Work (including but not limited to damages for loss of goodwill,
+ work stoppage, computer failure or malfunction, or any and all
+ other commercial damages or losses), even if such Contributor
+ has been advised of the possibility of such damages.
+
+9. Accepting Warranty or Additional Liability. While redistributing
+ the Work or Derivative Works thereof, You may choose to offer,
+ and charge a fee for, acceptance of support, warranty, indemnity,
+ or other liability obligations and/or rights consistent with this
+ License. However, in accepting such obligations, You may act only
+ on Your own behalf and on Your sole responsibility, not on behalf
+ of any other Contributor, and only if You agree to indemnify,
+ defend, and hold each Contributor harmless for any liability
+ incurred by, or claims asserted against, such Contributor by reason
+ of your accepting any such warranty or additional liability.
+
+END OF TERMS AND CONDITIONS
+
+APPENDIX: How to apply the Apache License to your work.
+
+ To apply the Apache License to your work, attach the following
+ boilerplate notice, with the fields enclosed by brackets "[]"
+ replaced with your own identifying information. (Don't include
+ the brackets!) The text should be enclosed in the appropriate
+ comment syntax for the file format. We also recommend that a
+ file or class name and description of purpose be included on the
+ same "printed page" as the copyright notice for easier
+ identification within third-party archives.
+
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
diff --git a/rust/vendor/sha1/LICENSE-MIT b/rust/vendor/sha1/LICENSE-MIT
new file mode 100644
index 0000000..66cf755
--- /dev/null
+++ b/rust/vendor/sha1/LICENSE-MIT
@@ -0,0 +1,27 @@
+Copyright (c) 2006-2009 Graydon Hoare
+Copyright (c) 2009-2013 Mozilla Foundation
+Copyright (c) 2016 Artyom Pavlov
+
+Permission is hereby granted, free of charge, to any
+person obtaining a copy of this software and associated
+documentation files (the "Software"), to deal in the
+Software without restriction, including without
+limitation the rights to use, copy, modify, merge,
+publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software
+is furnished to do so, subject to the following
+conditions:
+
+The above copyright notice and this permission notice
+shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
+ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
+TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
+SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
+IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.
diff --git a/rust/vendor/sha1/README.md b/rust/vendor/sha1/README.md
new file mode 100644
index 0000000..bd76f09
--- /dev/null
+++ b/rust/vendor/sha1/README.md
@@ -0,0 +1,65 @@
+# RustCrypto: SHA-1
+
+[![crate][crate-image]][crate-link]
+[![Docs][docs-image]][docs-link]
+![Apache2/MIT licensed][license-image]
+![Rust Version][rustc-image]
+[![Project Chat][chat-image]][chat-link]
+[![Build Status][build-image]][build-link]
+
+Pure Rust implementation of the [SHA-1 hash function][1].
+
+[Documentation][docs-link]
+
+## 🚨 Warning: Cryptographically Broken 🚨
+
+The SHA-1 hash function should be considered cryptographically broken and
+unsuitable for further use in any security critical capacity, as it is
+[practically vulnerable to chosen-prefix collisions][2].
+
+We provide this crate for legacy interoperability purposes only.
+
+## Minimum Supported Rust Version
+
+Rust **1.41** or higher.
+
+Minimum supported Rust version can be changed in the future, but it will be
+done with a minor version bump.
+
+## SemVer Policy
+
+- All on-by-default features of this library are covered by SemVer
+- MSRV is considered exempt from SemVer as noted above
+
+## License
+
+Licensed under either of:
+
+ * [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)
+ * [MIT license](http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted
+for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
+dual licensed as above, without any additional terms or conditions.
+
+[//]: # (badges)
+
+[crate-image]: https://img.shields.io/crates/v/sha1.svg
+[crate-link]: https://crates.io/crates/sha1
+[docs-image]: https://docs.rs/sha1/badge.svg
+[docs-link]: https://docs.rs/sha1/
+[license-image]: https://img.shields.io/badge/license-Apache2.0/MIT-blue.svg
+[rustc-image]: https://img.shields.io/badge/rustc-1.41+-blue.svg
+[chat-image]: https://img.shields.io/badge/zulip-join_chat-blue.svg
+[chat-link]: https://rustcrypto.zulipchat.com/#narrow/stream/260041-hashes
+[build-image]: https://github.com/RustCrypto/hashes/workflows/sha1/badge.svg?branch=master
+[build-link]: https://github.com/RustCrypto/hashes/actions?query=workflow%3Asha1
+
+[//]: # (general links)
+
+[1]: https://en.wikipedia.org/wiki/SHA-1
+[2]: https://sha-mbles.github.io/
diff --git a/rust/vendor/sha1/benches/mod.rs b/rust/vendor/sha1/benches/mod.rs
new file mode 100644
index 0000000..5c52e95
--- /dev/null
+++ b/rust/vendor/sha1/benches/mod.rs
@@ -0,0 +1,14 @@
+#![feature(test)]
+extern crate test;
+
+use digest::bench_update;
+use sha1::Sha1;
+use test::Bencher;
+
+bench_update!(
+ Sha1::default();
+ sha1_10 10;
+ sha1_100 100;
+ sha1_1000 1000;
+ sha1_10000 10000;
+);
diff --git a/rust/vendor/sha1/src/compress.rs b/rust/vendor/sha1/src/compress.rs
new file mode 100644
index 0000000..6f7e40c
--- /dev/null
+++ b/rust/vendor/sha1/src/compress.rs
@@ -0,0 +1,40 @@
+use crate::{Block, BlockSizeUser, Sha1Core};
+use digest::typenum::Unsigned;
+
+cfg_if::cfg_if! {
+ if #[cfg(feature = "force-soft")] {
+ mod soft;
+ use soft::compress as compress_inner;
+ } else if #[cfg(all(feature = "asm", target_arch = "aarch64"))] {
+ mod soft;
+ mod aarch64;
+ use aarch64::compress as compress_inner;
+ } else if #[cfg(all(feature = "loongarch64_asm", target_arch = "loongarch64"))] {
+ mod loongarch64_asm;
+ use loongarch64_asm::compress as compress_inner;
+ } else if #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] {
+ #[cfg(not(feature = "asm"))]
+ mod soft;
+ #[cfg(feature = "asm")]
+ mod soft {
+ pub use sha1_asm::compress;
+ }
+ mod x86;
+ use x86::compress as compress_inner;
+ } else {
+ mod soft;
+ use soft::compress as compress_inner;
+ }
+}
+
+const BLOCK_SIZE: usize = <Sha1Core as BlockSizeUser>::BlockSize::USIZE;
+
+/// SHA-1 compression function
+#[cfg_attr(docsrs, doc(cfg(feature = "compress")))]
+pub fn compress(state: &mut [u32; 5], blocks: &[Block<Sha1Core>]) {
+ // SAFETY: GenericArray<u8, U64> and [u8; 64] have
+ // exactly the same memory layout
+ let blocks: &[[u8; BLOCK_SIZE]] =
+ unsafe { &*(blocks as *const _ as *const [[u8; BLOCK_SIZE]]) };
+ compress_inner(state, blocks);
+}
diff --git a/rust/vendor/sha1/src/compress/aarch64.rs b/rust/vendor/sha1/src/compress/aarch64.rs
new file mode 100644
index 0000000..5952d1f
--- /dev/null
+++ b/rust/vendor/sha1/src/compress/aarch64.rs
@@ -0,0 +1,18 @@
+//! SHA-1 `aarch64` backend.
+
+// Per rustc target feature docs for `aarch64-unknown-linux-gnu` and
+// `aarch64-apple-darwin` platforms, the `sha2` target feature enables
+// SHA-1 as well:
+//
+// > Enable SHA1 and SHA256 support.
+cpufeatures::new!(sha1_hwcap, "sha2");
+
+pub fn compress(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
+ // TODO: Replace with https://github.com/rust-lang/rfcs/pull/2725
+ // after stabilization
+ if sha1_hwcap::get() {
+ sha1_asm::compress(state, blocks);
+ } else {
+ super::soft::compress(state, blocks);
+ }
+}
diff --git a/rust/vendor/sha1/src/compress/loongarch64_asm.rs b/rust/vendor/sha1/src/compress/loongarch64_asm.rs
new file mode 100644
index 0000000..facef1b
--- /dev/null
+++ b/rust/vendor/sha1/src/compress/loongarch64_asm.rs
@@ -0,0 +1,255 @@
+//! LoongArch64 assembly backend
+
+use core::arch::asm;
+
+const K: [u32; 4] = [0x5A827999, 0x6ED9EBA1, 0x8F1BBCDC, 0xCA62C1D6];
+
+macro_rules! c {
+ ($($l:expr)*) => {
+ concat!($($l ,)*)
+ };
+}
+
+macro_rules! round0a {
+ ($a:literal, $b:literal, $c:literal, $d:literal, $e:literal, $i:literal) => {
+ c!(
+ "ld.w $t5, $a1, (" $i " * 4);"
+ "revb.2h $t5, $t5;"
+ "rotri.w $t5, $t5, 16;"
+ "add.w " $e ", " $e ", $t5;"
+ "st.w $t5, $sp, (" $i " * 4);"
+ "xor $t5, " $c "," $d ";"
+ "and $t5, $t5, " $b ";"
+ "xor $t5, $t5, " $d ";"
+ roundtail!($a, $b, $e, $i, "$a4")
+ )
+ };
+}
+
+macro_rules! scheldule {
+ ($i:literal, $e:literal) => {
+ c!(
+ "ld.w $t5, $sp, (((" $i " - 3) & 0xF) * 4);"
+ "ld.w $t6, $sp, (((" $i " - 8) & 0xF) * 4);"
+ "ld.w $t7, $sp, (((" $i " - 14) & 0xF) * 4);"
+ "ld.w $t8, $sp, (((" $i " - 16) & 0xF) * 4);"
+ "xor $t5, $t5, $t6;"
+ "xor $t5, $t5, $t7;"
+ "xor $t5, $t5, $t8;"
+ "rotri.w $t5, $t5, 31;"
+ "add.w " $e "," $e ", $t5;"
+ "st.w $t5, $sp, ((" $i " & 0xF) * 4);"
+ )
+ };
+}
+
+macro_rules! round0b {
+ ($a:literal, $b:literal, $c:literal, $d:literal, $e:literal, $i:literal) => {
+ c!(
+ scheldule!($i, $e)
+ "xor $t5," $c "," $d ";"
+ "and $t5, $t5," $b ";"
+ "xor $t5, $t5," $d ";"
+ roundtail!($a, $b, $e, $i, "$a4")
+ )
+ };
+}
+
+macro_rules! round1 {
+ ($a:literal, $b:literal, $c:literal, $d:literal, $e:literal, $i:literal) => {
+ c!(
+ scheldule!($i, $e)
+ "xor $t5," $b "," $c ";"
+ "xor $t5, $t5," $d ";"
+ roundtail!($a, $b, $e, $i, "$a5")
+ )
+ };
+}
+
+macro_rules! round2 {
+ ($a:literal, $b:literal, $c:literal, $d:literal, $e:literal, $i:literal) => {
+ c!(
+ scheldule!($i, $e)
+ "or $t5," $c "," $d ";"
+ "and $t5, $t5, " $b ";"
+ "and $t7," $c "," $d ";"
+ "or $t5, $t5, $t7;"
+ roundtail!($a, $b, $e, $i, "$a6")
+ )
+ };
+}
+
+macro_rules! round3 {
+ ($a:literal, $b:literal, $c:literal, $d:literal, $e:literal, $i:literal) => {
+ c!(
+ scheldule!($i, $e)
+ "xor $t5," $b "," $c ";"
+ "xor $t5, $t5," $d ";"
+ roundtail!($a, $b, $e, $i, "$a7")
+ )
+ };
+}
+
+macro_rules! roundtail {
+ ($a:literal, $b:literal, $e:literal, $i:literal, $k:literal) => {
+ c!(
+ "rotri.w " $b "," $b ", 2;"
+ "add.w " $e "," $e ", $t5;"
+ "add.w " $e "," $e "," $k ";"
+ "rotri.w $t5," $a ", 27;"
+ "add.w " $e "," $e ", $t5;"
+ )
+ };
+}
+
+pub fn compress(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
+ if blocks.is_empty() {
+ return;
+ }
+
+ unsafe {
+ asm!(
+ // Allocate scratch stack space
+ "addi.d $sp, $sp, -64;",
+
+ // Load state
+ "ld.w $t0, $a0, 0",
+ "ld.w $t1, $a0, 4",
+ "ld.w $t2, $a0, 8",
+ "ld.w $t3, $a0, 12",
+ "ld.w $t4, $a0, 16",
+
+ "42:",
+
+ round0a!("$t0", "$t1", "$t2", "$t3", "$t4", 0),
+ round0a!("$t4", "$t0", "$t1", "$t2", "$t3", 1),
+ round0a!("$t3", "$t4", "$t0", "$t1", "$t2", 2),
+ round0a!("$t2", "$t3", "$t4", "$t0", "$t1", 3),
+ round0a!("$t1", "$t2", "$t3", "$t4", "$t0", 4),
+ round0a!("$t0", "$t1", "$t2", "$t3", "$t4", 5),
+ round0a!("$t4", "$t0", "$t1", "$t2", "$t3", 6),
+ round0a!("$t3", "$t4", "$t0", "$t1", "$t2", 7),
+ round0a!("$t2", "$t3", "$t4", "$t0", "$t1", 8),
+ round0a!("$t1", "$t2", "$t3", "$t4", "$t0", 9),
+ round0a!("$t0", "$t1", "$t2", "$t3", "$t4", 10),
+ round0a!("$t4", "$t0", "$t1", "$t2", "$t3", 11),
+ round0a!("$t3", "$t4", "$t0", "$t1", "$t2", 12),
+ round0a!("$t2", "$t3", "$t4", "$t0", "$t1", 13),
+ round0a!("$t1", "$t2", "$t3", "$t4", "$t0", 14),
+ round0a!("$t0", "$t1", "$t2", "$t3", "$t4", 15),
+ round0b!("$t4", "$t0", "$t1", "$t2", "$t3", 16),
+ round0b!("$t3", "$t4", "$t0", "$t1", "$t2", 17),
+ round0b!("$t2", "$t3", "$t4", "$t0", "$t1", 18),
+ round0b!("$t1", "$t2", "$t3", "$t4", "$t0", 19),
+ round1!("$t0", "$t1", "$t2", "$t3", "$t4", 20),
+ round1!("$t4", "$t0", "$t1", "$t2", "$t3", 21),
+ round1!("$t3", "$t4", "$t0", "$t1", "$t2", 22),
+ round1!("$t2", "$t3", "$t4", "$t0", "$t1", 23),
+ round1!("$t1", "$t2", "$t3", "$t4", "$t0", 24),
+ round1!("$t0", "$t1", "$t2", "$t3", "$t4", 25),
+ round1!("$t4", "$t0", "$t1", "$t2", "$t3", 26),
+ round1!("$t3", "$t4", "$t0", "$t1", "$t2", 27),
+ round1!("$t2", "$t3", "$t4", "$t0", "$t1", 28),
+ round1!("$t1", "$t2", "$t3", "$t4", "$t0", 29),
+ round1!("$t0", "$t1", "$t2", "$t3", "$t4", 30),
+ round1!("$t4", "$t0", "$t1", "$t2", "$t3", 31),
+ round1!("$t3", "$t4", "$t0", "$t1", "$t2", 32),
+ round1!("$t2", "$t3", "$t4", "$t0", "$t1", 33),
+ round1!("$t1", "$t2", "$t3", "$t4", "$t0", 34),
+ round1!("$t0", "$t1", "$t2", "$t3", "$t4", 35),
+ round1!("$t4", "$t0", "$t1", "$t2", "$t3", 36),
+ round1!("$t3", "$t4", "$t0", "$t1", "$t2", 37),
+ round1!("$t2", "$t3", "$t4", "$t0", "$t1", 38),
+ round1!("$t1", "$t2", "$t3", "$t4", "$t0", 39),
+ round2!("$t0", "$t1", "$t2", "$t3", "$t4", 40),
+ round2!("$t4", "$t0", "$t1", "$t2", "$t3", 41),
+ round2!("$t3", "$t4", "$t0", "$t1", "$t2", 42),
+ round2!("$t2", "$t3", "$t4", "$t0", "$t1", 43),
+ round2!("$t1", "$t2", "$t3", "$t4", "$t0", 44),
+ round2!("$t0", "$t1", "$t2", "$t3", "$t4", 45),
+ round2!("$t4", "$t0", "$t1", "$t2", "$t3", 46),
+ round2!("$t3", "$t4", "$t0", "$t1", "$t2", 47),
+ round2!("$t2", "$t3", "$t4", "$t0", "$t1", 48),
+ round2!("$t1", "$t2", "$t3", "$t4", "$t0", 49),
+ round2!("$t0", "$t1", "$t2", "$t3", "$t4", 50),
+ round2!("$t4", "$t0", "$t1", "$t2", "$t3", 51),
+ round2!("$t3", "$t4", "$t0", "$t1", "$t2", 52),
+ round2!("$t2", "$t3", "$t4", "$t0", "$t1", 53),
+ round2!("$t1", "$t2", "$t3", "$t4", "$t0", 54),
+ round2!("$t0", "$t1", "$t2", "$t3", "$t4", 55),
+ round2!("$t4", "$t0", "$t1", "$t2", "$t3", 56),
+ round2!("$t3", "$t4", "$t0", "$t1", "$t2", 57),
+ round2!("$t2", "$t3", "$t4", "$t0", "$t1", 58),
+ round2!("$t1", "$t2", "$t3", "$t4", "$t0", 59),
+ round3!("$t0", "$t1", "$t2", "$t3", "$t4", 60),
+ round3!("$t4", "$t0", "$t1", "$t2", "$t3", 61),
+ round3!("$t3", "$t4", "$t0", "$t1", "$t2", 62),
+ round3!("$t2", "$t3", "$t4", "$t0", "$t1", 63),
+ round3!("$t1", "$t2", "$t3", "$t4", "$t0", 64),
+ round3!("$t0", "$t1", "$t2", "$t3", "$t4", 65),
+ round3!("$t4", "$t0", "$t1", "$t2", "$t3", 66),
+ round3!("$t3", "$t4", "$t0", "$t1", "$t2", 67),
+ round3!("$t2", "$t3", "$t4", "$t0", "$t1", 68),
+ round3!("$t1", "$t2", "$t3", "$t4", "$t0", 69),
+ round3!("$t0", "$t1", "$t2", "$t3", "$t4", 70),
+ round3!("$t4", "$t0", "$t1", "$t2", "$t3", 71),
+ round3!("$t3", "$t4", "$t0", "$t1", "$t2", 72),
+ round3!("$t2", "$t3", "$t4", "$t0", "$t1", 73),
+ round3!("$t1", "$t2", "$t3", "$t4", "$t0", 74),
+ round3!("$t0", "$t1", "$t2", "$t3", "$t4", 75),
+ round3!("$t4", "$t0", "$t1", "$t2", "$t3", 76),
+ round3!("$t3", "$t4", "$t0", "$t1", "$t2", 77),
+ round3!("$t2", "$t3", "$t4", "$t0", "$t1", 78),
+ round3!("$t1", "$t2", "$t3", "$t4", "$t0", 79),
+
+ // Update state registers
+ "ld.w $t5, $a0, 0", // a
+ "ld.w $t6, $a0, 4", // b
+ "ld.w $t7, $a0, 8", // c
+ "ld.w $t8, $a0, 12", // d
+ "add.w $t0, $t0, $t5",
+ "ld.w $t5, $a0, 16", // e
+ "add.w $t1, $t1, $t6",
+ "add.w $t2, $t2, $t7",
+ "add.w $t3, $t3, $t8",
+ "add.w $t4, $t4, $t5",
+
+ // Save updated state
+ "st.w $t0, $a0, 0",
+ "st.w $t1, $a0, 4",
+ "st.w $t2, $a0, 8",
+ "st.w $t3, $a0, 12",
+ "st.w $t4, $a0, 16",
+
+ // Looping over blocks
+ "addi.d $a1, $a1, 64",
+ "addi.d $a2, $a2, -1",
+ "bnez $a2, 42b",
+
+ // Restore stack register
+ "addi.d $sp, $sp, 64",
+
+ in("$a0") state,
+ inout("$a1") blocks.as_ptr() => _,
+ inout("$a2") blocks.len() => _,
+
+ in("$a4") K[0],
+ in("$a5") K[1],
+ in("$a6") K[2],
+ in("$a7") K[3],
+
+ // Clobbers
+ out("$t0") _,
+ out("$t1") _,
+ out("$t2") _,
+ out("$t3") _,
+ out("$t4") _,
+ out("$t5") _,
+ out("$t6") _,
+ out("$t7") _,
+ out("$t8") _,
+
+ options(preserves_flags),
+ );
+ }
+}
diff --git a/rust/vendor/sha1/src/compress/soft.rs b/rust/vendor/sha1/src/compress/soft.rs
new file mode 100644
index 0000000..0b9fb27
--- /dev/null
+++ b/rust/vendor/sha1/src/compress/soft.rs
@@ -0,0 +1,260 @@
+#![allow(clippy::many_single_char_names)]
+use super::BLOCK_SIZE;
+use core::convert::TryInto;
+
+const K: [u32; 4] = [0x5A827999, 0x6ED9EBA1, 0x8F1BBCDC, 0xCA62C1D6];
+
+#[inline(always)]
+fn add(a: [u32; 4], b: [u32; 4]) -> [u32; 4] {
+ [
+ a[0].wrapping_add(b[0]),
+ a[1].wrapping_add(b[1]),
+ a[2].wrapping_add(b[2]),
+ a[3].wrapping_add(b[3]),
+ ]
+}
+
+#[inline(always)]
+fn xor(a: [u32; 4], b: [u32; 4]) -> [u32; 4] {
+ [a[0] ^ b[0], a[1] ^ b[1], a[2] ^ b[2], a[3] ^ b[3]]
+}
+
+#[inline]
+pub fn sha1_first_add(e: u32, w0: [u32; 4]) -> [u32; 4] {
+ let [a, b, c, d] = w0;
+ [e.wrapping_add(a), b, c, d]
+}
+
+fn sha1msg1(a: [u32; 4], b: [u32; 4]) -> [u32; 4] {
+ let [_, _, w2, w3] = a;
+ let [w4, w5, _, _] = b;
+ [a[0] ^ w2, a[1] ^ w3, a[2] ^ w4, a[3] ^ w5]
+}
+
+fn sha1msg2(a: [u32; 4], b: [u32; 4]) -> [u32; 4] {
+ let [x0, x1, x2, x3] = a;
+ let [_, w13, w14, w15] = b;
+
+ let w16 = (x0 ^ w13).rotate_left(1);
+ let w17 = (x1 ^ w14).rotate_left(1);
+ let w18 = (x2 ^ w15).rotate_left(1);
+ let w19 = (x3 ^ w16).rotate_left(1);
+
+ [w16, w17, w18, w19]
+}
+
+#[inline]
+fn sha1_first_half(abcd: [u32; 4], msg: [u32; 4]) -> [u32; 4] {
+ sha1_first_add(abcd[0].rotate_left(30), msg)
+}
+
+fn sha1_digest_round_x4(abcd: [u32; 4], work: [u32; 4], i: i8) -> [u32; 4] {
+ match i {
+ 0 => sha1rnds4c(abcd, add(work, [K[0]; 4])),
+ 1 => sha1rnds4p(abcd, add(work, [K[1]; 4])),
+ 2 => sha1rnds4m(abcd, add(work, [K[2]; 4])),
+ 3 => sha1rnds4p(abcd, add(work, [K[3]; 4])),
+ _ => unreachable!("unknown icosaround index"),
+ }
+}
+
+fn sha1rnds4c(abcd: [u32; 4], msg: [u32; 4]) -> [u32; 4] {
+ let [mut a, mut b, mut c, mut d] = abcd;
+ let [t, u, v, w] = msg;
+ let mut e = 0u32;
+
+ macro_rules! bool3ary_202 {
+ ($a:expr, $b:expr, $c:expr) => {
+ $c ^ ($a & ($b ^ $c))
+ };
+ } // Choose, MD5F, SHA1C
+
+ e = e
+ .wrapping_add(a.rotate_left(5))
+ .wrapping_add(bool3ary_202!(b, c, d))
+ .wrapping_add(t);
+ b = b.rotate_left(30);
+
+ d = d
+ .wrapping_add(e.rotate_left(5))
+ .wrapping_add(bool3ary_202!(a, b, c))
+ .wrapping_add(u);
+ a = a.rotate_left(30);
+
+ c = c
+ .wrapping_add(d.rotate_left(5))
+ .wrapping_add(bool3ary_202!(e, a, b))
+ .wrapping_add(v);
+ e = e.rotate_left(30);
+
+ b = b
+ .wrapping_add(c.rotate_left(5))
+ .wrapping_add(bool3ary_202!(d, e, a))
+ .wrapping_add(w);
+ d = d.rotate_left(30);
+
+ [b, c, d, e]
+}
+
+fn sha1rnds4p(abcd: [u32; 4], msg: [u32; 4]) -> [u32; 4] {
+ let [mut a, mut b, mut c, mut d] = abcd;
+ let [t, u, v, w] = msg;
+ let mut e = 0u32;
+
+ macro_rules! bool3ary_150 {
+ ($a:expr, $b:expr, $c:expr) => {
+ $a ^ $b ^ $c
+ };
+ } // Parity, XOR, MD5H, SHA1P
+
+ e = e
+ .wrapping_add(a.rotate_left(5))
+ .wrapping_add(bool3ary_150!(b, c, d))
+ .wrapping_add(t);
+ b = b.rotate_left(30);
+
+ d = d
+ .wrapping_add(e.rotate_left(5))
+ .wrapping_add(bool3ary_150!(a, b, c))
+ .wrapping_add(u);
+ a = a.rotate_left(30);
+
+ c = c
+ .wrapping_add(d.rotate_left(5))
+ .wrapping_add(bool3ary_150!(e, a, b))
+ .wrapping_add(v);
+ e = e.rotate_left(30);
+
+ b = b
+ .wrapping_add(c.rotate_left(5))
+ .wrapping_add(bool3ary_150!(d, e, a))
+ .wrapping_add(w);
+ d = d.rotate_left(30);
+
+ [b, c, d, e]
+}
+
+fn sha1rnds4m(abcd: [u32; 4], msg: [u32; 4]) -> [u32; 4] {
+ let [mut a, mut b, mut c, mut d] = abcd;
+ let [t, u, v, w] = msg;
+ let mut e = 0u32;
+
+ macro_rules! bool3ary_232 {
+ ($a:expr, $b:expr, $c:expr) => {
+ ($a & $b) ^ ($a & $c) ^ ($b & $c)
+ };
+ } // Majority, SHA1M
+
+ e = e
+ .wrapping_add(a.rotate_left(5))
+ .wrapping_add(bool3ary_232!(b, c, d))
+ .wrapping_add(t);
+ b = b.rotate_left(30);
+
+ d = d
+ .wrapping_add(e.rotate_left(5))
+ .wrapping_add(bool3ary_232!(a, b, c))
+ .wrapping_add(u);
+ a = a.rotate_left(30);
+
+ c = c
+ .wrapping_add(d.rotate_left(5))
+ .wrapping_add(bool3ary_232!(e, a, b))
+ .wrapping_add(v);
+ e = e.rotate_left(30);
+
+ b = b
+ .wrapping_add(c.rotate_left(5))
+ .wrapping_add(bool3ary_232!(d, e, a))
+ .wrapping_add(w);
+ d = d.rotate_left(30);
+
+ [b, c, d, e]
+}
+
+macro_rules! rounds4 {
+ ($h0:ident, $h1:ident, $wk:expr, $i:expr) => {
+ sha1_digest_round_x4($h0, sha1_first_half($h1, $wk), $i)
+ };
+}
+
+macro_rules! schedule {
+ ($v0:expr, $v1:expr, $v2:expr, $v3:expr) => {
+ sha1msg2(xor(sha1msg1($v0, $v1), $v2), $v3)
+ };
+}
+
+macro_rules! schedule_rounds4 {
+ (
+ $h0:ident, $h1:ident,
+ $w0:expr, $w1:expr, $w2:expr, $w3:expr, $w4:expr,
+ $i:expr
+ ) => {
+ $w4 = schedule!($w0, $w1, $w2, $w3);
+ $h1 = rounds4!($h0, $h1, $w4, $i);
+ };
+}
+
+#[inline(always)]
+fn sha1_digest_block_u32(state: &mut [u32; 5], block: &[u32; 16]) {
+ let mut w0 = [block[0], block[1], block[2], block[3]];
+ let mut w1 = [block[4], block[5], block[6], block[7]];
+ let mut w2 = [block[8], block[9], block[10], block[11]];
+ let mut w3 = [block[12], block[13], block[14], block[15]];
+ #[allow(clippy::needless_late_init)]
+ let mut w4;
+
+ let mut h0 = [state[0], state[1], state[2], state[3]];
+ let mut h1 = sha1_first_add(state[4], w0);
+
+ // Rounds 0..20
+ h1 = sha1_digest_round_x4(h0, h1, 0);
+ h0 = rounds4!(h1, h0, w1, 0);
+ h1 = rounds4!(h0, h1, w2, 0);
+ h0 = rounds4!(h1, h0, w3, 0);
+ schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 0);
+
+ // Rounds 20..40
+ schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 1);
+ schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 1);
+ schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 1);
+ schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 1);
+ schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 1);
+
+ // Rounds 40..60
+ schedule_rounds4!(h0, h1, w1, w2, w3, w4, w0, 2);
+ schedule_rounds4!(h1, h0, w2, w3, w4, w0, w1, 2);
+ schedule_rounds4!(h0, h1, w3, w4, w0, w1, w2, 2);
+ schedule_rounds4!(h1, h0, w4, w0, w1, w2, w3, 2);
+ schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 2);
+
+ // Rounds 60..80
+ schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 3);
+ schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 3);
+ schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 3);
+ schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 3);
+ schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 3);
+
+ let e = h1[0].rotate_left(30);
+ let [a, b, c, d] = h0;
+
+ state[0] = state[0].wrapping_add(a);
+ state[1] = state[1].wrapping_add(b);
+ state[2] = state[2].wrapping_add(c);
+ state[3] = state[3].wrapping_add(d);
+ state[4] = state[4].wrapping_add(e);
+}
+
+pub fn compress(state: &mut [u32; 5], blocks: &[[u8; BLOCK_SIZE]]) {
+ let mut block_u32 = [0u32; BLOCK_SIZE / 4];
+ // since LLVM can't properly use aliasing yet it will make
+ // unnecessary state stores without this copy
+ let mut state_cpy = *state;
+ for block in blocks.iter() {
+ for (o, chunk) in block_u32.iter_mut().zip(block.chunks_exact(4)) {
+ *o = u32::from_be_bytes(chunk.try_into().unwrap());
+ }
+ sha1_digest_block_u32(&mut state_cpy, &block_u32);
+ }
+ *state = state_cpy;
+}
diff --git a/rust/vendor/sha1/src/compress/x86.rs b/rust/vendor/sha1/src/compress/x86.rs
new file mode 100644
index 0000000..4dcd56b
--- /dev/null
+++ b/rust/vendor/sha1/src/compress/x86.rs
@@ -0,0 +1,112 @@
+//! SHA-1 `x86`/`x86_64` backend
+
+#![cfg(any(target_arch = "x86", target_arch = "x86_64"))]
+
+#[cfg(target_arch = "x86")]
+use core::arch::x86::*;
+#[cfg(target_arch = "x86_64")]
+use core::arch::x86_64::*;
+
+macro_rules! rounds4 {
+ ($h0:ident, $h1:ident, $wk:expr, $i:expr) => {
+ _mm_sha1rnds4_epu32($h0, _mm_sha1nexte_epu32($h1, $wk), $i)
+ };
+}
+
+macro_rules! schedule {
+ ($v0:expr, $v1:expr, $v2:expr, $v3:expr) => {
+ _mm_sha1msg2_epu32(_mm_xor_si128(_mm_sha1msg1_epu32($v0, $v1), $v2), $v3)
+ };
+}
+
+macro_rules! schedule_rounds4 {
+ (
+ $h0:ident, $h1:ident,
+ $w0:expr, $w1:expr, $w2:expr, $w3:expr, $w4:expr,
+ $i:expr
+ ) => {
+ $w4 = schedule!($w0, $w1, $w2, $w3);
+ $h1 = rounds4!($h0, $h1, $w4, $i);
+ };
+}
+
+#[target_feature(enable = "sha,sse2,ssse3,sse4.1")]
+unsafe fn digest_blocks(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
+ #[allow(non_snake_case)]
+ let MASK: __m128i = _mm_set_epi64x(0x0001_0203_0405_0607, 0x0809_0A0B_0C0D_0E0F);
+
+ let mut state_abcd = _mm_set_epi32(
+ state[0] as i32,
+ state[1] as i32,
+ state[2] as i32,
+ state[3] as i32,
+ );
+ let mut state_e = _mm_set_epi32(state[4] as i32, 0, 0, 0);
+
+ for block in blocks {
+ // SAFETY: we use only unaligned loads with this pointer
+ #[allow(clippy::cast_ptr_alignment)]
+ let block_ptr = block.as_ptr() as *const __m128i;
+
+ let mut w0 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(0)), MASK);
+ let mut w1 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(1)), MASK);
+ let mut w2 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(2)), MASK);
+ let mut w3 = _mm_shuffle_epi8(_mm_loadu_si128(block_ptr.offset(3)), MASK);
+ #[allow(clippy::needless_late_init)]
+ let mut w4;
+
+ let mut h0 = state_abcd;
+ let mut h1 = _mm_add_epi32(state_e, w0);
+
+ // Rounds 0..20
+ h1 = _mm_sha1rnds4_epu32(h0, h1, 0);
+ h0 = rounds4!(h1, h0, w1, 0);
+ h1 = rounds4!(h0, h1, w2, 0);
+ h0 = rounds4!(h1, h0, w3, 0);
+ schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 0);
+
+ // Rounds 20..40
+ schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 1);
+ schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 1);
+ schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 1);
+ schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 1);
+ schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 1);
+
+ // Rounds 40..60
+ schedule_rounds4!(h0, h1, w1, w2, w3, w4, w0, 2);
+ schedule_rounds4!(h1, h0, w2, w3, w4, w0, w1, 2);
+ schedule_rounds4!(h0, h1, w3, w4, w0, w1, w2, 2);
+ schedule_rounds4!(h1, h0, w4, w0, w1, w2, w3, 2);
+ schedule_rounds4!(h0, h1, w0, w1, w2, w3, w4, 2);
+
+ // Rounds 60..80
+ schedule_rounds4!(h1, h0, w1, w2, w3, w4, w0, 3);
+ schedule_rounds4!(h0, h1, w2, w3, w4, w0, w1, 3);
+ schedule_rounds4!(h1, h0, w3, w4, w0, w1, w2, 3);
+ schedule_rounds4!(h0, h1, w4, w0, w1, w2, w3, 3);
+ schedule_rounds4!(h1, h0, w0, w1, w2, w3, w4, 3);
+
+ state_abcd = _mm_add_epi32(state_abcd, h0);
+ state_e = _mm_sha1nexte_epu32(h1, state_e);
+ }
+
+ state[0] = _mm_extract_epi32(state_abcd, 3) as u32;
+ state[1] = _mm_extract_epi32(state_abcd, 2) as u32;
+ state[2] = _mm_extract_epi32(state_abcd, 1) as u32;
+ state[3] = _mm_extract_epi32(state_abcd, 0) as u32;
+ state[4] = _mm_extract_epi32(state_e, 3) as u32;
+}
+
+cpufeatures::new!(shani_cpuid, "sha", "sse2", "ssse3", "sse4.1");
+
+pub fn compress(state: &mut [u32; 5], blocks: &[[u8; 64]]) {
+ // TODO: Replace with https://github.com/rust-lang/rfcs/pull/2725
+ // after stabilization
+ if shani_cpuid::get() {
+ unsafe {
+ digest_blocks(state, blocks);
+ }
+ } else {
+ super::soft::compress(state, blocks);
+ }
+}
diff --git a/rust/vendor/sha1/src/lib.rs b/rust/vendor/sha1/src/lib.rs
new file mode 100644
index 0000000..38ddc4b
--- /dev/null
+++ b/rust/vendor/sha1/src/lib.rs
@@ -0,0 +1,154 @@
+//! Pure Rust implementation of the [SHA-1][1] cryptographic hash algorithm
+//! with optional hardware-specific optimizations.
+//!
+//! # 🚨 Warning: Cryptographically Broken! 🚨
+//!
+//! The SHA-1 hash function should be considered cryptographically broken and
+//! unsuitable for further use in any security critical capacity, as it is
+//! [practically vulnerable to chosen-prefix collisions][2].
+//!
+//! We provide this crate for legacy interoperability purposes only.
+//!
+//! # Usage
+//!
+//! ```rust
+//! use hex_literal::hex;
+//! use sha1::{Sha1, Digest};
+//!
+//! // create a Sha1 object
+//! let mut hasher = Sha1::new();
+//!
+//! // process input message
+//! hasher.update(b"hello world");
+//!
+//! // acquire hash digest in the form of GenericArray,
+//! // which in this case is equivalent to [u8; 20]
+//! let result = hasher.finalize();
+//! assert_eq!(result[..], hex!("2aae6c35c94fcfb415dbe95f408b9ce91ee846ed"));
+//! ```
+//!
+//! Also see [RustCrypto/hashes][3] readme.
+//!
+//! # Note for users of `sha1 v0.6`
+//!
+//! This crate has been transferred to the RustCrypto organization and uses
+//! implementation previously published as the `sha-1` crate. The previous
+//! zero dependencies version is now published as the [`sha1_smol`] crate.
+//!
+//! [1]: https://en.wikipedia.org/wiki/SHA-1
+//! [2]: https://sha-mbles.github.io/
+//! [3]: https://github.com/RustCrypto/hashes
+//! [`sha1_smol`]: https://github.com/mitsuhiko/sha1-smol/
+
+#![no_std]
+#![cfg_attr(docsrs, feature(doc_cfg))]
+#![doc(
+ html_logo_url = "https://raw.githubusercontent.com/RustCrypto/media/6ee8e381/logo.svg",
+ html_favicon_url = "https://raw.githubusercontent.com/RustCrypto/media/6ee8e381/logo.svg"
+)]
+#![warn(missing_docs, rust_2018_idioms)]
+
+pub use digest::{self, Digest};
+
+use core::{fmt, slice::from_ref};
+#[cfg(feature = "oid")]
+use digest::const_oid::{AssociatedOid, ObjectIdentifier};
+use digest::{
+ block_buffer::Eager,
+ core_api::{
+ AlgorithmName, Block, BlockSizeUser, Buffer, BufferKindUser, CoreWrapper, FixedOutputCore,
+ OutputSizeUser, Reset, UpdateCore,
+ },
+ typenum::{Unsigned, U20, U64},
+ HashMarker, Output,
+};
+
+mod compress;
+
+#[cfg(feature = "compress")]
+pub use compress::compress;
+#[cfg(not(feature = "compress"))]
+use compress::compress;
+
+const STATE_LEN: usize = 5;
+
+/// Core SHA-1 hasher state.
+#[derive(Clone)]
+pub struct Sha1Core {
+ h: [u32; STATE_LEN],
+ block_len: u64,
+}
+
+impl HashMarker for Sha1Core {}
+
+impl BlockSizeUser for Sha1Core {
+ type BlockSize = U64;
+}
+
+impl BufferKindUser for Sha1Core {
+ type BufferKind = Eager;
+}
+
+impl OutputSizeUser for Sha1Core {
+ type OutputSize = U20;
+}
+
+impl UpdateCore for Sha1Core {
+ #[inline]
+ fn update_blocks(&mut self, blocks: &[Block<Self>]) {
+ self.block_len += blocks.len() as u64;
+ compress(&mut self.h, blocks);
+ }
+}
+
+impl FixedOutputCore for Sha1Core {
+ #[inline]
+ fn finalize_fixed_core(&mut self, buffer: &mut Buffer<Self>, out: &mut Output<Self>) {
+ let bs = Self::BlockSize::U64;
+ let bit_len = 8 * (buffer.get_pos() as u64 + bs * self.block_len);
+
+ let mut h = self.h;
+ buffer.len64_padding_be(bit_len, |b| compress(&mut h, from_ref(b)));
+ for (chunk, v) in out.chunks_exact_mut(4).zip(h.iter()) {
+ chunk.copy_from_slice(&v.to_be_bytes());
+ }
+ }
+}
+
+impl Default for Sha1Core {
+ #[inline]
+ fn default() -> Self {
+ Self {
+ h: [0x67452301, 0xEFCDAB89, 0x98BADCFE, 0x10325476, 0xC3D2E1F0],
+ block_len: 0,
+ }
+ }
+}
+
+impl Reset for Sha1Core {
+ #[inline]
+ fn reset(&mut self) {
+ *self = Default::default();
+ }
+}
+
+impl AlgorithmName for Sha1Core {
+ fn write_alg_name(f: &mut fmt::Formatter<'_>) -> fmt::Result {
+ f.write_str("Sha1")
+ }
+}
+
+impl fmt::Debug for Sha1Core {
+ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+ f.write_str("Sha1Core { ... }")
+ }
+}
+
+#[cfg(feature = "oid")]
+#[cfg_attr(docsrs, doc(cfg(feature = "oid")))]
+impl AssociatedOid for Sha1Core {
+ const OID: ObjectIdentifier = ObjectIdentifier::new_unwrap("1.3.14.3.2.26");
+}
+
+/// SHA-1 hasher state.
+pub type Sha1 = CoreWrapper<Sha1Core>;
diff --git a/rust/vendor/sha1/tests/data/sha1.blb b/rust/vendor/sha1/tests/data/sha1.blb
new file mode 100644
index 0000000..e8dc491
--- /dev/null
+++ b/rust/vendor/sha1/tests/data/sha1.blb
Binary files differ
diff --git a/rust/vendor/sha1/tests/mod.rs b/rust/vendor/sha1/tests/mod.rs
new file mode 100644
index 0000000..04aa69f
--- /dev/null
+++ b/rust/vendor/sha1/tests/mod.rs
@@ -0,0 +1,15 @@
+use digest::dev::{feed_rand_16mib, fixed_reset_test};
+use hex_literal::hex;
+use sha1::{Digest, Sha1};
+
+digest::new_test!(sha1_main, "sha1", Sha1, fixed_reset_test);
+
+#[test]
+fn sha1_rand() {
+ let mut h = Sha1::new();
+ feed_rand_16mib(&mut h);
+ assert_eq!(
+ h.finalize()[..],
+ hex!("7e565a25a8b123e9881addbcedcd927b23377a78")[..]
+ );
+}