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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-14 19:33:32 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-14 19:33:32 +0000 |
commit | 8bb05ac73a5b448b339ce0bc8d396c82c459b47f (patch) | |
tree | 1fdda006866bca20d41cb206767ea5241e36852f /tests/expected/lscpu/lscpu-rv64-visionfive2 | |
parent | Adding debian version 2.39.3-11. (diff) | |
download | util-linux-8bb05ac73a5b448b339ce0bc8d396c82c459b47f.tar.xz util-linux-8bb05ac73a5b448b339ce0bc8d396c82c459b47f.zip |
Merging upstream version 2.40.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/expected/lscpu/lscpu-rv64-visionfive2')
-rw-r--r-- | tests/expected/lscpu/lscpu-rv64-visionfive2 | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-rv64-visionfive2 b/tests/expected/lscpu/lscpu-rv64-visionfive2 new file mode 100644 index 0000000..0b2390d --- /dev/null +++ b/tests/expected/lscpu/lscpu-rv64-visionfive2 @@ -0,0 +1,33 @@ +Byte Order: Little Endian +CPU(s): 4 +On-line CPU(s) list: 0-3 +Vendor ID: 0x489 +Model name: sifive,u74-mc +CPU family: 0x8000000000000007 +Model: 0x4210427 +Thread(s) per core: 1 +Core(s) per socket: 4 +Socket(s): 1 +L1d cache: 128 KiB (4 instances) +L1i cache: 128 KiB (4 instances) +L2 cache: 2 MiB (1 instance) +NUMA node(s): 1 +NUMA node0 CPU(s): 0-3 + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting usually from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2 +0,0,0,0,,0,0,0 +1,1,0,0,,1,1,0 +2,2,0,0,,2,2,0 +3,3,0,0,,3,3,0 + +# The following is the parsable format, which can be fed to other +# programs. Each different item in every column has an unique ID +# starting usually from zero. +# CPU,Core,Socket,Node,,L1d,L1i,L2 +0,3,0,0,,0,0,0 +1,1,0,0,,1,1,0 +2,2,0,0,,2,2,0 +3,4,0,0,,3,3,0 |