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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-17 13:54:38 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-17 13:54:38 +0000 |
| commit | 8c1ab65c0f548d20b7f177bdb736daaf603340e1 (patch) | |
| tree | df55b7e75bf43f2bf500845b105afe3ac3a5157e /libc-top-half/musl/src/fenv/powerpc/fenv.S | |
| parent | Initial commit. (diff) | |
| download | wasi-libc-8c1ab65c0f548d20b7f177bdb736daaf603340e1.tar.xz wasi-libc-8c1ab65c0f548d20b7f177bdb736daaf603340e1.zip | |
Adding upstream version 0.0~git20221206.8b7148f.upstream/0.0_git20221206.8b7148f
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'libc-top-half/musl/src/fenv/powerpc/fenv.S')
| -rw-r--r-- | libc-top-half/musl/src/fenv/powerpc/fenv.S | 130 |
1 files changed, 130 insertions, 0 deletions
diff --git a/libc-top-half/musl/src/fenv/powerpc/fenv.S b/libc-top-half/musl/src/fenv/powerpc/fenv.S new file mode 100644 index 0000000..55055d0 --- /dev/null +++ b/libc-top-half/musl/src/fenv/powerpc/fenv.S @@ -0,0 +1,130 @@ +#if !defined(_SOFT_FLOAT) && !defined(__NO_FPRS__) +.global feclearexcept +.type feclearexcept,@function +feclearexcept: + andis. 3,3,0x3e00 + /* if (r3 & FE_INVALID) r3 |= all_invalid_flags */ + andis. 0,3,0x2000 + stwu 1,-16(1) + beq- 0,1f + oris 3,3,0x01f8 + ori 3,3,0x0700 +1: + /* + * note: fpscr contains various fpu status and control + * flags and we dont check if r3 may alter other flags + * than the exception related ones + * ufpscr &= ~r3 + */ + mffs 0 + stfd 0,8(1) + lwz 9,12(1) + andc 9,9,3 + stw 9,12(1) + lfd 0,8(1) + mtfsf 255,0 + + /* return 0 */ + li 3,0 + addi 1,1,16 + blr + +.global feraiseexcept +.type feraiseexcept,@function +feraiseexcept: + andis. 3,3,0x3e00 + /* if (r3 & FE_INVALID) r3 |= software_invalid_flag */ + andis. 0,3,0x2000 + stwu 1,-16(1) + beq- 0,1f + ori 3,3,0x0400 +1: + /* fpscr |= r3 */ + mffs 0 + stfd 0,8(1) + lwz 9,12(1) + or 9,9,3 + stw 9,12(1) + lfd 0,8(1) + mtfsf 255,0 + + /* return 0 */ + li 3,0 + addi 1,1,16 + blr + +.global fetestexcept +.type fetestexcept,@function +fetestexcept: + andis. 3,3,0x3e00 + /* return r3 & fpscr */ + stwu 1,-16(1) + mffs 0 + stfd 0,8(1) + lwz 9,12(1) + addi 1,1,16 + and 3,3,9 + blr + +.global fegetround +.type fegetround,@function +fegetround: + /* return fpscr & 3 */ + stwu 1,-16(1) + mffs 0 + stfd 0,8(1) + lwz 3,12(1) + addi 1,1,16 + clrlwi 3,3,30 + blr + +.global __fesetround +.hidden __fesetround +.type __fesetround,@function +__fesetround: + /* + * note: invalid input is not checked, r3 < 4 must hold + * fpscr = (fpscr & -4U) | r3 + */ + stwu 1,-16(1) + mffs 0 + stfd 0,8(1) + lwz 9,12(1) + clrrwi 9,9,2 + or 9,9,3 + stw 9,12(1) + lfd 0,8(1) + mtfsf 255,0 + + /* return 0 */ + li 3,0 + addi 1,1,16 + blr + +.global fegetenv +.type fegetenv,@function +fegetenv: + /* *r3 = fpscr */ + mffs 0 + stfd 0,0(3) + /* return 0 */ + li 3,0 + blr + +.global fesetenv +.type fesetenv,@function +fesetenv: + cmpwi 3, -1 + bne 1f + mflr 4 + bl 2f + .zero 8 +2: mflr 3 + mtlr 4 +1: /* fpscr = *r3 */ + lfd 0,0(3) + mtfsf 255,0 + /* return 0 */ + li 3,0 + blr +#endif |