diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/bonnell/other.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/bonnell/other.json | 450 |
1 files changed, 450 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/bonnell/other.json b/tools/perf/pmu-events/arch/x86/bonnell/other.json new file mode 100644 index 000000000..e0bdcfbfa --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/bonnell/other.json @@ -0,0 +1,450 @@ +[ + { + "BriefDescription": "Bus queue is empty.", + "Counter": "0,1", + "EventCode": "0x7D", + "EventName": "BUSQ_EMPTY.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Number of Bus Not Ready signals asserted.", + "Counter": "0,1", + "EventCode": "0x61", + "EventName": "BUS_BNR_DRV.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0x20" + }, + { + "BriefDescription": "Number of Bus Not Ready signals asserted.", + "Counter": "0,1", + "EventCode": "0x61", + "EventName": "BUS_BNR_DRV.THIS_AGENT", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "Bus cycles while processor receives data.", + "Counter": "0,1", + "EventCode": "0x64", + "EventName": "BUS_DATA_RCV.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Bus cycles when data is sent on the bus.", + "Counter": "0,1", + "EventCode": "0x62", + "EventName": "BUS_DRDY_CLOCKS.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0x20" + }, + { + "BriefDescription": "Bus cycles when data is sent on the bus.", + "Counter": "0,1", + "EventCode": "0x62", + "EventName": "BUS_DRDY_CLOCKS.THIS_AGENT", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "HITM signal asserted.", + "Counter": "0,1", + "EventCode": "0x7B", + "EventName": "BUS_HITM_DRV.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0x20" + }, + { + "BriefDescription": "HITM signal asserted.", + "Counter": "0,1", + "EventCode": "0x7B", + "EventName": "BUS_HITM_DRV.THIS_AGENT", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "HIT signal asserted.", + "Counter": "0,1", + "EventCode": "0x7A", + "EventName": "BUS_HIT_DRV.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0x20" + }, + { + "BriefDescription": "HIT signal asserted.", + "Counter": "0,1", + "EventCode": "0x7A", + "EventName": "BUS_HIT_DRV.THIS_AGENT", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "IO requests waiting in the bus queue.", + "Counter": "0,1", + "EventCode": "0x7F", + "EventName": "BUS_IO_WAIT.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Bus cycles when a LOCK signal is asserted.", + "Counter": "0,1", + "EventCode": "0x63", + "EventName": "BUS_LOCK_CLOCKS.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Bus cycles when a LOCK signal is asserted.", + "Counter": "0,1", + "EventCode": "0x63", + "EventName": "BUS_LOCK_CLOCKS.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Outstanding cacheable data read bus requests duration.", + "Counter": "0,1", + "EventCode": "0x60", + "EventName": "BUS_REQUEST_OUTSTANDING.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Outstanding cacheable data read bus requests duration.", + "Counter": "0,1", + "EventCode": "0x60", + "EventName": "BUS_REQUEST_OUTSTANDING.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "All bus transactions.", + "Counter": "0,1", + "EventCode": "0x70", + "EventName": "BUS_TRANS_ANY.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "All bus transactions.", + "Counter": "0,1", + "EventCode": "0x70", + "EventName": "BUS_TRANS_ANY.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Burst read bus transactions.", + "Counter": "0,1", + "EventCode": "0x65", + "EventName": "BUS_TRANS_BRD.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Burst read bus transactions.", + "Counter": "0,1", + "EventCode": "0x65", + "EventName": "BUS_TRANS_BRD.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Burst (full cache-line) bus transactions.", + "Counter": "0,1", + "EventCode": "0x6E", + "EventName": "BUS_TRANS_BURST.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Burst (full cache-line) bus transactions.", + "Counter": "0,1", + "EventCode": "0x6E", + "EventName": "BUS_TRANS_BURST.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Deferred bus transactions.", + "Counter": "0,1", + "EventCode": "0x6D", + "EventName": "BUS_TRANS_DEF.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Deferred bus transactions.", + "Counter": "0,1", + "EventCode": "0x6D", + "EventName": "BUS_TRANS_DEF.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Instruction-fetch bus transactions.", + "Counter": "0,1", + "EventCode": "0x68", + "EventName": "BUS_TRANS_IFETCH.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Instruction-fetch bus transactions.", + "Counter": "0,1", + "EventCode": "0x68", + "EventName": "BUS_TRANS_IFETCH.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Invalidate bus transactions.", + "Counter": "0,1", + "EventCode": "0x69", + "EventName": "BUS_TRANS_INVAL.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Invalidate bus transactions.", + "Counter": "0,1", + "EventCode": "0x69", + "EventName": "BUS_TRANS_INVAL.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "IO bus transactions.", + "Counter": "0,1", + "EventCode": "0x6C", + "EventName": "BUS_TRANS_IO.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "IO bus transactions.", + "Counter": "0,1", + "EventCode": "0x6C", + "EventName": "BUS_TRANS_IO.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Memory bus transactions.", + "Counter": "0,1", + "EventCode": "0x6F", + "EventName": "BUS_TRANS_MEM.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Memory bus transactions.", + "Counter": "0,1", + "EventCode": "0x6F", + "EventName": "BUS_TRANS_MEM.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Partial bus transactions.", + "Counter": "0,1", + "EventCode": "0x6B", + "EventName": "BUS_TRANS_P.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Partial bus transactions.", + "Counter": "0,1", + "EventCode": "0x6B", + "EventName": "BUS_TRANS_P.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Partial write bus transaction.", + "Counter": "0,1", + "EventCode": "0x6A", + "EventName": "BUS_TRANS_PWR.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Partial write bus transaction.", + "Counter": "0,1", + "EventCode": "0x6A", + "EventName": "BUS_TRANS_PWR.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "RFO bus transactions.", + "Counter": "0,1", + "EventCode": "0x66", + "EventName": "BUS_TRANS_RFO.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "RFO bus transactions.", + "Counter": "0,1", + "EventCode": "0x66", + "EventName": "BUS_TRANS_RFO.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Explicit writeback bus transactions.", + "Counter": "0,1", + "EventCode": "0x67", + "EventName": "BUS_TRANS_WB.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Explicit writeback bus transactions.", + "Counter": "0,1", + "EventCode": "0x67", + "EventName": "BUS_TRANS_WB.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Cycles during which interrupts are disabled.", + "Counter": "0,1", + "EventCode": "0xC6", + "EventName": "CYCLES_INT_MASKED.CYCLES_INT_MASKED", + "SampleAfterValue": "2000000", + "UMask": "0x1" + }, + { + "BriefDescription": "Cycles during which interrupts are pending and disabled.", + "Counter": "0,1", + "EventCode": "0xC6", + "EventName": "CYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKED", + "SampleAfterValue": "2000000", + "UMask": "0x2" + }, + { + "BriefDescription": "Memory cluster signals to block micro-op dispatch for any reason", + "Counter": "0,1", + "EventCode": "0x9", + "EventName": "DISPATCH_BLOCKED.ANY", + "SampleAfterValue": "200000", + "UMask": "0x20" + }, + { + "BriefDescription": "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", + "Counter": "0,1", + "EventCode": "0x3A", + "EventName": "EIST_TRANS", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.ALL_AGENTS.ANY", + "SampleAfterValue": "200000", + "UMask": "0x2b" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.ALL_AGENTS.CLEAN", + "SampleAfterValue": "200000", + "UMask": "0x21" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.ALL_AGENTS.HIT", + "SampleAfterValue": "200000", + "UMask": "0x22" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.ALL_AGENTS.HITM", + "SampleAfterValue": "200000", + "UMask": "0x28" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.THIS_AGENT.ANY", + "SampleAfterValue": "200000", + "UMask": "0xb" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.THIS_AGENT.CLEAN", + "SampleAfterValue": "200000", + "UMask": "0x1" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.THIS_AGENT.HIT", + "SampleAfterValue": "200000", + "UMask": "0x2" + }, + { + "BriefDescription": "External snoops.", + "Counter": "0,1", + "EventCode": "0x77", + "EventName": "EXT_SNOOP.THIS_AGENT.HITM", + "SampleAfterValue": "200000", + "UMask": "0x8" + }, + { + "BriefDescription": "Hardware interrupts received.", + "Counter": "0,1", + "EventCode": "0xC8", + "EventName": "HW_INT_RCV", + "SampleAfterValue": "200000", + "UMask": "0x0" + }, + { + "BriefDescription": "Number of segment register loads.", + "Counter": "0,1", + "EventCode": "0x6", + "EventName": "SEGMENT_REG_LOADS.ANY", + "SampleAfterValue": "200000", + "UMask": "0x80" + }, + { + "BriefDescription": "Bus stalled for snoops.", + "Counter": "0,1", + "EventCode": "0x7E", + "EventName": "SNOOP_STALL_DRV.ALL_AGENTS", + "SampleAfterValue": "200000", + "UMask": "0xe0" + }, + { + "BriefDescription": "Bus stalled for snoops.", + "Counter": "0,1", + "EventCode": "0x7E", + "EventName": "SNOOP_STALL_DRV.SELF", + "SampleAfterValue": "200000", + "UMask": "0x40" + }, + { + "BriefDescription": "Number of thermal trips", + "Counter": "0,1", + "EventCode": "0x3B", + "EventName": "THERMAL_TRIP", + "SampleAfterValue": "200000", + "UMask": "0xc0" + } +] |