diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json | 739 |
1 files changed, 739 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json b/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json new file mode 100644 index 000000000..f14e760a9 --- /dev/null +++ b/tools/perf/pmu-events/arch/x86/westmereep-sp/memory.json @@ -0,0 +1,739 @@ +[ + { + "BriefDescription": "Offcore data reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6011", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore data reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF811", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore data reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2011", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore data reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4011", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6044", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF844", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2044", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4044", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x60FF", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF8FF", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x20FF", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x40FF", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore RFO requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6022", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore RFO requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF822", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore RFO requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2022", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.ANY_RFO.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4022", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore writebacks to any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.COREWB.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6008", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore writebacks that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.COREWB.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF808", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore writebacks to the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.COREWB.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2008", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore writebacks to a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.COREWB.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4008", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code or data read requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6077", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code or data read requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF877", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code or data read requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2077", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore code or data read requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4077", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore request = all data, response = any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6033", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore request = all data, response = any LLC miss", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF833", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the local DRAM.", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IN.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2033", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4033", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6003", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF803", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2003", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4003", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6001", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF801", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2001", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand data reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4001", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand code reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6004", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand code reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF804", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand code reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2004", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand code reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4004", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand RFO requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6002", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand RFO requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF802", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand RFO requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2002", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore demand RFO requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4002", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore other requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6080", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore other requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF880", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore other requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.OTHER.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4080", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6050", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF850", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2050", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4050", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6010", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF810", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2010", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch data reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4010", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch code reads satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6040", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch code reads that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF840", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch code reads satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2040", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch code reads satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_IFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4040", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch RFO requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_RFO.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6020", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch RFO requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_RFO.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF820", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch RFO requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_RFO.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2020", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch RFO requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PF_RFO.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4020", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch requests satisfied by any DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PREFETCH.ANY_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x6070", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch requests that missed the LLC", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PREFETCH.ANY_LLC_MISS", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0xF870", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch requests satisfied by the local DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PREFETCH.LOCAL_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x2070", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + }, + { + "BriefDescription": "Offcore prefetch requests satisfied by a remote DRAM", + "Counter": "0,1,2,3", + "EventCode": "0xB7, 0xBB", + "EventName": "OFFCORE_RESPONSE.PREFETCH.REMOTE_DRAM", + "MSRIndex": "0x1a6,0x1a7", + "MSRValue": "0x4070", + "Offcore": "1", + "SampleAfterValue": "100000", + "UMask": "0x1" + } +] |