summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx6-logicpd-som.dtsi
blob: 547fb141ec0c9f4f2aace5f2095bfbd2d921d2dd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2019 Logic PD, Inc.

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x80000000>;
	};

	reg_wl18xx_vmmc: regulator-wl18xx {
		compatible = "regulator-fixed";
		regulator-name = "vwl1837";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <70000>;
		enable-active-high;
	};
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};

&gpmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpmi_nand>;
	nand-on-flash-bbt;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	pfuze100: pmic@8 {
		compatible = "fsl,pfuze100";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <725000>;
				regulator-max-microvolt = <1450000>;
				regulator-name = "vddcore";
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <725000>;
				regulator-max-microvolt = <1450000>;
				regulator-name = "vddsoc";
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "gen_3v3";
				regulator-boot-on;
			};

			sw3a_reg: sw3a {
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-name = "sw3a_vddr";
				regulator-boot-on;
				regulator-always-on;
			};

			sw3b_reg: sw3b {
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-name = "sw3b_vddr";
				regulator-boot-on;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "gen_rgmii";
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
				regulator-name = "gen_5v0";
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-name = "gen_vsns";
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1500000>;
				regulator-name = "gen_1v5";
			};

			vgen2_reg: vgen2 {
				regulator-name = "vgen2";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen3_reg: vgen3 {
				regulator-name = "gen_vadj_0";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};

			vgen4_reg: vgen4 {
				regulator-name = "gen_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-name = "gen_vadj_1";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-name = "gen_2v5";
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
			};

			coin_reg: coin {
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};
		};
	};

	temperature-sensor@49 {
		compatible = "ti,tmp102";
		reg = <0x49>;
		interrupt-parent = <&gpio6>;
		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
		#thermal-sensor-cells = <1>;
	};

	temperature-sensor@4a {
		compatible = "ti,tmp102";
		reg = <0x4a>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_tempsense>;
		interrupt-parent = <&gpio6>;
		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
		#thermal-sensor-cells = <1>;
	};

	eeprom@51 {
		compatible = "atmel,24c64";
		pagesize = <32>;
		read-only;	/* Manufacturing EEPROM programmed at factory */
		reg = <0x51>;
	};

	eeprom@52 {
		compatible = "atmel,24c64";
		pagesize = <32>;
		reg = <0x52>;
	};
};

/* Reroute power feeding the CPU to come from the external PMIC */
&reg_arm
{
	vin-supply = <&sw1a_reg>;
};

&reg_soc
{
	vin-supply = <&sw1c_reg>;
};

&snvs_poweroff {
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_gpmi_nand: gpmi-nandgrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0x0b0b1
			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0x0b0b1
			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0x0b0b1
			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0x0b000
			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0x0b0b1
			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0x0b0b1
			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0x0b0b1
			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0x0b0b1
			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0x0b0b1
			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0x0b0b1
			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0x0b0b1
			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0x0b0b1
			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0x0b0b1
			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0x0b0b1
			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0x0b0b1
		>;
	};

	pinctrl_hog: hoggrp {
		fsl,pins = <	/* Enable ARM Debugger */
			MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL	0x1b0b0
			MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO	0x1b0b0
			MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00	0x1b0b0
			MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK	0x1b0b0
			MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01	0x1b0b0
			MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02	0x1b0b0
			MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03	0x1b0b0
			MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04	0x1b0b0
			MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05	0x1b0b0
			MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06	0x1b0b0
			MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07	0x1b0b0
			MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08	0x1b0b0
			MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09	0x1b0b0
			MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10	0x1b0b0
			MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11	0x1b0b0
			MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12	0x1b0b0
			MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13	0x1b0b0
			MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14	0x1b0b0
			MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15	0x1b0b0
			MX6QDL_PAD_GPIO_0__CCM_CLKO1        0x130b0
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
		>;
	};

	pinctrl_tempsense: tempsensegrp {
		fsl,pins = <
			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x13059	/* BT_EN */
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b1
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x170B9
			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x100B9
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x170B9
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x170B9
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x170B9
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x170B9
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17049
			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10049
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01	0x130b0 /* WL_IRQ */
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00	0x17059 /* WLAN_EN */
		>;
	};
};

&snvs_poweroff {
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";

	bluetooth {
		compatible = "ti,wl1837-st";
		enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
	};
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	non-removable;
	keep-power-in-suspend;
	wakeup-source;
	vmmc-supply = <&sw2_reg>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	non-removable;
	cap-power-off-card;
	keep-power-in-suspend;
	wakeup-source;
	vmmc-supply = <&reg_wl18xx_vmmc>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	wlcore: wlcore@2 {
		  compatible = "ti,wl1837";
		  reg = <2>;
		  interrupt-parent = <&gpio7>;
		  interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
		  tcxo-clock-frequency = <26000000>;
	};
};