blob: 803f6ba6d7a2fa365cc7a5d8f8282ccf585cbe60 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* HiSilicon Clock and Reset Driver Header
*
* Copyright (c) 2016 HiSilicon Limited.
*/
#ifndef __HISI_CRG_H
#define __HISI_CRG_H
struct hisi_clock_data;
struct hisi_reset_controller;
struct hisi_crg_funcs {
struct hisi_clock_data* (*register_clks)(struct platform_device *pdev);
void (*unregister_clks)(struct platform_device *pdev);
};
struct hisi_crg_dev {
struct hisi_clock_data *clk_data;
struct hisi_reset_controller *rstc;
const struct hisi_crg_funcs *funcs;
};
#endif /* __HISI_CRG_H */
|