blob: 0324c69ce96869811cf2e4dffd1ece18b7bc16e4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
|
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H
/* LPASS_CORE_CC clocks */
#define LPASS_CORE_CC_DIG_PLL 0
#define LPASS_CORE_CC_DIG_PLL_OUT_MAIN_DIV_CLK_SRC 1
#define LPASS_CORE_CC_DIG_PLL_OUT_ODD 2
#define LPASS_CORE_CC_CORE_CLK 3
#define LPASS_CORE_CC_CORE_CLK_SRC 4
#define LPASS_CORE_CC_EXT_IF0_CLK_SRC 5
#define LPASS_CORE_CC_EXT_IF0_IBIT_CLK 6
#define LPASS_CORE_CC_EXT_IF1_CLK_SRC 7
#define LPASS_CORE_CC_EXT_IF1_IBIT_CLK 8
#define LPASS_CORE_CC_LPM_CORE_CLK 9
#define LPASS_CORE_CC_LPM_MEM0_CORE_CLK 10
#define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK 11
#define LPASS_CORE_CC_EXT_MCLK0_CLK 12
#define LPASS_CORE_CC_EXT_MCLK0_CLK_SRC 13
/* LPASS_CORE_CC power domains */
#define LPASS_CORE_CC_LPASS_CORE_HM_GDSC 0
#endif
|
