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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 19:33:14 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 19:33:14 +0000 |
| commit | 36d22d82aa202bb199967e9512281e9a53db42c9 (patch) | |
| tree | 105e8c98ddea1c1e4784a60a5a6410fa416be2de /js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js | |
| parent | Initial commit. (diff) | |
| download | firefox-esr-upstream.tar.xz firefox-esr-upstream.zip | |
Adding upstream version 115.7.0esr.upstream/115.7.0esrupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js')
| -rw-r--r-- | js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js b/js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js new file mode 100644 index 0000000000..2cb5f2e969 --- /dev/null +++ b/js/src/jit-test/tests/wasm/simd/binop-x86-ion-codegen.js @@ -0,0 +1,20 @@ +// |jit-test| skip-if: !wasmSimdEnabled() || !hasDisassembler() || wasmCompileMode() != "ion" || !getBuildConfiguration().x86 || getBuildConfiguration().simulator || isAvxPresent(); include:codegen-x86-test.js + +codegenTestX86_v128xLITERAL_v128( + [['f32x4.eq', '(v128.const f32x4 1 2 3 4)', + `0f c2 05 ${ABSADDR} 00 cmppsx \\$0x00, ${ABS}, %xmm0`], + ['f32x4.ne', '(v128.const f32x4 1 2 3 4)', + `0f c2 05 ${ABSADDR} 04 cmppsx \\$0x04, ${ABS}, %xmm0`], + ['f32x4.lt', '(v128.const f32x4 1 2 3 4)', + `0f c2 05 ${ABSADDR} 01 cmppsx \\$0x01, ${ABS}, %xmm0`], + ['f32x4.le', '(v128.const f32x4 1 2 3 4)', + `0f c2 05 ${ABSADDR} 02 cmppsx \\$0x02, ${ABS}, %xmm0`], + + ['f64x2.eq', '(v128.const f64x2 1 2)', + `66 0f c2 05 ${ABSADDR} 00 cmppdx \\$0x00, ${ABS}, %xmm0`], + ['f64x2.ne', '(v128.const f64x2 1 2)', + `66 0f c2 05 ${ABSADDR} 04 cmppdx \\$0x04, ${ABS}, %xmm0`], + ['f64x2.lt', '(v128.const f64x2 1 2)', + `66 0f c2 05 ${ABSADDR} 01 cmppdx \\$0x01, ${ABS}, %xmm0`], + ['f64x2.le', '(v128.const f64x2 1 2)', + `66 0f c2 05 ${ABSADDR} 02 cmppdx \\$0x02, ${ABS}, %xmm0`]]); |