diff options
Diffstat (limited to 'third_party/rust/glslopt/glsl-optimizer/src/gallium')
6 files changed, 3386 insertions, 0 deletions
diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/auxiliary/util/u_half.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/auxiliary/util/u_half.h new file mode 100644 index 0000000000..bbcc843c31 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/auxiliary/util/u_half.h @@ -0,0 +1,143 @@ +/************************************************************************** + * + * Copyright 2010 Luca Barbieri + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#ifndef U_HALF_H +#define U_HALF_H + +#include "pipe/p_compiler.h" +#include "util/u_math.h" +#include "util/half_float.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * References for float <-> half conversions + * + * http://fgiesen.wordpress.com/2012/03/28/half-to-float-done-quic/ + * https://gist.github.com/2156668 + * https://gist.github.com/2144712 + */ + +static inline uint16_t +util_float_to_half(float f) +{ + return _mesa_float_to_half(f); +} + +static inline uint16_t +util_float_to_half_rtz(float f) +{ + uint32_t sign_mask = 0x80000000; + uint32_t round_mask = ~0xfff; + uint32_t f32inf = 0xff << 23; + uint32_t f16inf = 0x1f << 23; + uint32_t sign; + union fi magic; + union fi f32; + uint16_t f16; + + magic.ui = 0xf << 23; + + f32.f = f; + + /* Sign */ + sign = f32.ui & sign_mask; + f32.ui ^= sign; + + if (f32.ui == f32inf) { + /* Inf */ + f16 = 0x7c00; + } else if (f32.ui > f32inf) { + /* NaN */ + f16 = 0x7e00; + } else { + /* Number */ + f32.ui &= round_mask; + f32.f *= magic.f; + f32.ui -= round_mask; + /* + * XXX: The magic mul relies on denorms being available, otherwise + * all f16 denorms get flushed to zero - hence when this is used + * for tgsi_exec in softpipe we won't get f16 denorms. + */ + /* + * Clamp to max finite value if overflowed. + * OpenGL has completely undefined rounding behavior for float to + * half-float conversions, and this matches what is mandated for float + * to fp11/fp10, which recommend round-to-nearest-finite too. + * (d3d10 is deeply unhappy about flushing such values to infinity, and + * while it also mandates round-to-zero it doesn't care nearly as much + * about that.) + */ + if (f32.ui > f16inf) + f32.ui = f16inf - 1; + + f16 = f32.ui >> 13; + } + + /* Sign */ + f16 |= sign >> 16; + + return f16; +} + +static inline float +util_half_to_float(uint16_t f16) +{ + union fi infnan; + union fi magic; + union fi f32; + + infnan.ui = 0x8f << 23; + infnan.f = 65536.0f; + magic.ui = 0xef << 23; + + /* Exponent / Mantissa */ + f32.ui = (f16 & 0x7fff) << 13; + + /* Adjust */ + f32.f *= magic.f; + /* XXX: The magic mul relies on denorms being available */ + + /* Inf / NaN */ + if (f32.f >= infnan.f) + f32.ui |= 0xff << 23; + + /* Sign */ + f32.ui |= (uint32_t)(f16 & 0x8000) << 16; + + return f32.f; +} + +#ifdef __cplusplus +} +#endif + +#endif /* U_HALF_H */ + diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_compiler.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_compiler.h new file mode 100644 index 0000000000..8c3a793e33 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_compiler.h @@ -0,0 +1,179 @@ +/************************************************************************** + * + * Copyright 2007-2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef P_COMPILER_H +#define P_COMPILER_H + + +#include "c99_compat.h" /* inline, __func__, etc. */ + +#include "p_config.h" + +#include "util/macros.h" + +#include <stdlib.h> +#include <string.h> +#include <stddef.h> +#include <stdarg.h> +#include <limits.h> + + +#if defined(_WIN32) && !defined(__WIN32__) +#define __WIN32__ +#endif + +#if defined(_MSC_VER) + +#include <intrin.h> + +/* Avoid 'expression is always true' warning */ +#pragma warning(disable: 4296) + +#endif /* _MSC_VER */ + + +/* + * Alternative stdint.h and stdbool.h headers are supplied in include/c99 for + * systems that lack it. + */ +#include <stdint.h> +#include <stdbool.h> + + +#ifdef __cplusplus +extern "C" { +#endif + + +#if !defined(__HAIKU__) && !defined(__USE_MISC) +#if !defined(PIPE_OS_ANDROID) +typedef unsigned int uint; +#endif +typedef unsigned short ushort; +#endif +typedef unsigned char ubyte; + +typedef unsigned char boolean; +#ifndef TRUE +#define TRUE true +#endif +#ifndef FALSE +#define FALSE false +#endif + +#ifndef va_copy +#ifdef __va_copy +#define va_copy(dest, src) __va_copy((dest), (src)) +#else +#define va_copy(dest, src) (dest) = (src) +#endif +#endif + + +/* XXX: Use standard `__func__` instead */ +#ifndef __FUNCTION__ +# define __FUNCTION__ __func__ +#endif + + +/* This should match linux gcc cdecl semantics everywhere, so that we + * just codegen one calling convention on all platforms. + */ +#ifdef _MSC_VER +#define PIPE_CDECL __cdecl +#else +#define PIPE_CDECL +#endif + + + +#if defined(__GNUC__) +#define PIPE_DEPRECATED __attribute__((__deprecated__)) +#else +#define PIPE_DEPRECATED +#endif + + + +/* Macros for data alignment. */ +#if defined(__GNUC__) + +/* See http://gcc.gnu.org/onlinedocs/gcc-4.4.2/gcc/Type-Attributes.html */ +#define PIPE_ALIGN_TYPE(_alignment, _type) _type __attribute__((aligned(_alignment))) + +/* See http://gcc.gnu.org/onlinedocs/gcc-4.4.2/gcc/Variable-Attributes.html */ +#define PIPE_ALIGN_VAR(_alignment) __attribute__((aligned(_alignment))) + +#if defined(__GNUC__) && defined(PIPE_ARCH_X86) +#define PIPE_ALIGN_STACK __attribute__((force_align_arg_pointer)) +#else +#define PIPE_ALIGN_STACK +#endif + +#elif defined(_MSC_VER) + +/* See http://msdn.microsoft.com/en-us/library/83ythb65.aspx */ +#define PIPE_ALIGN_TYPE(_alignment, _type) __declspec(align(_alignment)) _type +#define PIPE_ALIGN_VAR(_alignment) __declspec(align(_alignment)) + +#define PIPE_ALIGN_STACK + +#elif defined(SWIG) + +#define PIPE_ALIGN_TYPE(_alignment, _type) _type +#define PIPE_ALIGN_VAR(_alignment) + +#define PIPE_ALIGN_STACK + +#else + +#error "Unsupported compiler" + +#endif + + +#if defined(__GNUC__) + +#define PIPE_READ_WRITE_BARRIER() __asm__("":::"memory") + +#elif defined(_MSC_VER) + +#define PIPE_READ_WRITE_BARRIER() _ReadWriteBarrier() + +#else + +#warning "Unsupported compiler" +#define PIPE_READ_WRITE_BARRIER() /* */ + +#endif + +#if defined(__cplusplus) +} +#endif + + +#endif /* P_COMPILER_H */ diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_config.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_config.h new file mode 100644 index 0000000000..2c1698d0e9 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_config.h @@ -0,0 +1,192 @@ +/************************************************************************** + * + * Copyright 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Gallium configuration defines. + * + * This header file sets several defines based on the compiler, processor + * architecture, and operating system being used. These defines should be used + * throughout the code to facilitate porting to new platforms. It is likely that + * this file is auto-generated by an autoconf-like tool at some point, as some + * things cannot be determined by pre-defined environment alone. + * + * See also: + * - http://gcc.gnu.org/onlinedocs/cpp/Common-Predefined-Macros.html + * - echo | gcc -dM -E - | sort + * - http://msdn.microsoft.com/en-us/library/b0084kay.aspx + * + * @author José Fonseca <jfonseca@vmware.com> + */ + +#ifndef P_CONFIG_H_ +#define P_CONFIG_H_ + +#include <limits.h> +/* + * Compiler + */ + +#if defined(__GNUC__) +#define PIPE_CC_GCC +#define PIPE_CC_GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__) +#endif + +/* + * Meaning of _MSC_VER value: + * - 1800: Visual Studio 2013 + * - 1700: Visual Studio 2012 + * - 1600: Visual Studio 2010 + * - 1500: Visual Studio 2008 + * - 1400: Visual C++ 2005 + * - 1310: Visual C++ .NET 2003 + * - 1300: Visual C++ .NET 2002 + * + * __MSC__ seems to be an old macro -- it is not pre-defined on recent MSVC + * versions. + */ +#if defined(_MSC_VER) || defined(__MSC__) +#define PIPE_CC_MSVC +#endif + +#if defined(__ICL) +#define PIPE_CC_ICL +#endif + + +/* + * Processor architecture + */ + +#if defined(__i386__) /* gcc */ || defined(_M_IX86) /* msvc */ || defined(_X86_) || defined(__386__) || defined(i386) || defined(__i386) /* Sun cc */ +#define PIPE_ARCH_X86 +#endif + +#if defined(__x86_64__) /* gcc */ || defined(_M_X64) /* msvc */ || defined(_M_AMD64) /* msvc */ || defined(__x86_64) /* Sun cc */ +#define PIPE_ARCH_X86_64 +#endif + +#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64) +#if defined(PIPE_CC_GCC) && !defined(__SSE2__) +/* #warning SSE2 support requires -msse -msse2 compiler options */ +#else +#define PIPE_ARCH_SSE +#endif +#if defined(PIPE_CC_GCC) && (__GNUC__ * 100 + __GNUC_MINOR__) < 409 && !defined(__SSSE3__) +/* #warning SSE3 support requires -msse3 compiler options before GCC 4.9 */ +#else +#define PIPE_ARCH_SSSE3 +#endif +#endif + +#if defined(__ppc__) || defined(__ppc64__) || defined(__PPC__) +#define PIPE_ARCH_PPC +#if defined(__ppc64__) || defined(__PPC64__) +#define PIPE_ARCH_PPC_64 +#endif +#endif + +#if defined(__s390x__) +#define PIPE_ARCH_S390 +#endif + +#if defined(__arm__) +#define PIPE_ARCH_ARM +#endif + +#if defined(__aarch64__) +#define PIPE_ARCH_AARCH64 +#endif + +/* + * Endian detection. + */ + +#include "util/u_endian.h" + +/* + * Auto-detect the operating system family. + */ +#include "util/detect_os.h" + +#if DETECT_OS_LINUX +#define PIPE_OS_LINUX +#endif + +#if DETECT_OS_UNIX +#define PIPE_OS_UNIX +#endif + +#if DETECT_OS_ANDROID +#define PIPE_OS_ANDROID +#endif + +#if DETECT_OS_FREEBSD +#define PIPE_OS_FREEBSD +#endif + +#if DETECT_OS_BSD +#define PIPE_OS_BSD +#endif + +#if DETECT_OS_OPENBSD +#define PIPE_OS_OPENBSD +#endif + +#if DETECT_OS_NETBSD +#define PIPE_OS_NETBSD +#endif + +#if DETECT_OS_DRAGONFLY +#define PIPE_OS_DRAGONFLY +#endif + +#if DETECT_OS_HURD +#define PIPE_OS_HURD +#endif + +#if DETECT_OS_SOLARIS +#define PIPE_OS_SOLARIS +#endif + +#if DETECT_OS_APPLE +#define PIPE_OS_APPLE +#endif + +#if DETECT_OS_WINDOWS +#define PIPE_OS_WINDOWS +#endif + +#if DETECT_OS_HAIKU +#define PIPE_OS_HAIKU +#endif + +#if DETECT_OS_CYGWIN +#define PIPE_OS_CYGWIN +#endif + +#endif /* P_CONFIG_H_ */ diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_defines.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_defines.h new file mode 100644 index 0000000000..dd0c7331b6 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_defines.h @@ -0,0 +1,1305 @@ +/************************************************************************** + * + * Copyright 2007 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef PIPE_DEFINES_H +#define PIPE_DEFINES_H + +#include "p_compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Gallium error codes. + * + * - A zero value always means success. + * - A negative value always means failure. + * - The meaning of a positive value is function dependent. + */ +enum pipe_error +{ + PIPE_OK = 0, + PIPE_ERROR = -1, /**< Generic error */ + PIPE_ERROR_BAD_INPUT = -2, + PIPE_ERROR_OUT_OF_MEMORY = -3, + PIPE_ERROR_RETRY = -4 + /* TODO */ +}; + +enum pipe_blendfactor { + PIPE_BLENDFACTOR_ONE = 1, + PIPE_BLENDFACTOR_SRC_COLOR, + PIPE_BLENDFACTOR_SRC_ALPHA, + PIPE_BLENDFACTOR_DST_ALPHA, + PIPE_BLENDFACTOR_DST_COLOR, + PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE, + PIPE_BLENDFACTOR_CONST_COLOR, + PIPE_BLENDFACTOR_CONST_ALPHA, + PIPE_BLENDFACTOR_SRC1_COLOR, + PIPE_BLENDFACTOR_SRC1_ALPHA, + + PIPE_BLENDFACTOR_ZERO = 0x11, + PIPE_BLENDFACTOR_INV_SRC_COLOR, + PIPE_BLENDFACTOR_INV_SRC_ALPHA, + PIPE_BLENDFACTOR_INV_DST_ALPHA, + PIPE_BLENDFACTOR_INV_DST_COLOR, + + PIPE_BLENDFACTOR_INV_CONST_COLOR = 0x17, + PIPE_BLENDFACTOR_INV_CONST_ALPHA, + PIPE_BLENDFACTOR_INV_SRC1_COLOR, + PIPE_BLENDFACTOR_INV_SRC1_ALPHA, +}; + +enum pipe_blend_func { + PIPE_BLEND_ADD, + PIPE_BLEND_SUBTRACT, + PIPE_BLEND_REVERSE_SUBTRACT, + PIPE_BLEND_MIN, + PIPE_BLEND_MAX, +}; + +enum pipe_logicop { + PIPE_LOGICOP_CLEAR, + PIPE_LOGICOP_NOR, + PIPE_LOGICOP_AND_INVERTED, + PIPE_LOGICOP_COPY_INVERTED, + PIPE_LOGICOP_AND_REVERSE, + PIPE_LOGICOP_INVERT, + PIPE_LOGICOP_XOR, + PIPE_LOGICOP_NAND, + PIPE_LOGICOP_AND, + PIPE_LOGICOP_EQUIV, + PIPE_LOGICOP_NOOP, + PIPE_LOGICOP_OR_INVERTED, + PIPE_LOGICOP_COPY, + PIPE_LOGICOP_OR_REVERSE, + PIPE_LOGICOP_OR, + PIPE_LOGICOP_SET, +}; + +#define PIPE_MASK_R 0x1 +#define PIPE_MASK_G 0x2 +#define PIPE_MASK_B 0x4 +#define PIPE_MASK_A 0x8 +#define PIPE_MASK_RGBA 0xf +#define PIPE_MASK_Z 0x10 +#define PIPE_MASK_S 0x20 +#define PIPE_MASK_ZS 0x30 +#define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS) + + +/** + * Inequality functions. Used for depth test, stencil compare, alpha + * test, shadow compare, etc. + */ +enum pipe_compare_func { + PIPE_FUNC_NEVER, + PIPE_FUNC_LESS, + PIPE_FUNC_EQUAL, + PIPE_FUNC_LEQUAL, + PIPE_FUNC_GREATER, + PIPE_FUNC_NOTEQUAL, + PIPE_FUNC_GEQUAL, + PIPE_FUNC_ALWAYS, +}; + +/** Polygon fill mode */ +enum { + PIPE_POLYGON_MODE_FILL, + PIPE_POLYGON_MODE_LINE, + PIPE_POLYGON_MODE_POINT, + PIPE_POLYGON_MODE_FILL_RECTANGLE, +}; + +/** Polygon face specification, eg for culling */ +#define PIPE_FACE_NONE 0 +#define PIPE_FACE_FRONT 1 +#define PIPE_FACE_BACK 2 +#define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK) + +/** Stencil ops */ +enum pipe_stencil_op { + PIPE_STENCIL_OP_KEEP, + PIPE_STENCIL_OP_ZERO, + PIPE_STENCIL_OP_REPLACE, + PIPE_STENCIL_OP_INCR, + PIPE_STENCIL_OP_DECR, + PIPE_STENCIL_OP_INCR_WRAP, + PIPE_STENCIL_OP_DECR_WRAP, + PIPE_STENCIL_OP_INVERT, +}; + +/** Texture types. + * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D + */ +enum pipe_texture_target +{ + PIPE_BUFFER, + PIPE_TEXTURE_1D, + PIPE_TEXTURE_2D, + PIPE_TEXTURE_3D, + PIPE_TEXTURE_CUBE, + PIPE_TEXTURE_RECT, + PIPE_TEXTURE_1D_ARRAY, + PIPE_TEXTURE_2D_ARRAY, + PIPE_TEXTURE_CUBE_ARRAY, + PIPE_MAX_TEXTURE_TYPES, +}; + +enum pipe_tex_face { + PIPE_TEX_FACE_POS_X, + PIPE_TEX_FACE_NEG_X, + PIPE_TEX_FACE_POS_Y, + PIPE_TEX_FACE_NEG_Y, + PIPE_TEX_FACE_POS_Z, + PIPE_TEX_FACE_NEG_Z, + PIPE_TEX_FACE_MAX, +}; + +enum pipe_tex_wrap { + PIPE_TEX_WRAP_REPEAT, + PIPE_TEX_WRAP_CLAMP, + PIPE_TEX_WRAP_CLAMP_TO_EDGE, + PIPE_TEX_WRAP_CLAMP_TO_BORDER, + PIPE_TEX_WRAP_MIRROR_REPEAT, + PIPE_TEX_WRAP_MIRROR_CLAMP, + PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE, + PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER, +}; + +/** Between mipmaps, ie mipfilter */ +enum pipe_tex_mipfilter { + PIPE_TEX_MIPFILTER_NEAREST, + PIPE_TEX_MIPFILTER_LINEAR, + PIPE_TEX_MIPFILTER_NONE, +}; + +/** Within a mipmap, ie min/mag filter */ +enum pipe_tex_filter { + PIPE_TEX_FILTER_NEAREST, + PIPE_TEX_FILTER_LINEAR, +}; + +enum pipe_tex_compare { + PIPE_TEX_COMPARE_NONE, + PIPE_TEX_COMPARE_R_TO_TEXTURE, +}; + +/** + * Clear buffer bits + */ +#define PIPE_CLEAR_DEPTH (1 << 0) +#define PIPE_CLEAR_STENCIL (1 << 1) +#define PIPE_CLEAR_COLOR0 (1 << 2) +#define PIPE_CLEAR_COLOR1 (1 << 3) +#define PIPE_CLEAR_COLOR2 (1 << 4) +#define PIPE_CLEAR_COLOR3 (1 << 5) +#define PIPE_CLEAR_COLOR4 (1 << 6) +#define PIPE_CLEAR_COLOR5 (1 << 7) +#define PIPE_CLEAR_COLOR6 (1 << 8) +#define PIPE_CLEAR_COLOR7 (1 << 9) +/** Combined flags */ +/** All color buffers currently bound */ +#define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \ + PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \ + PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \ + PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7) +#define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL) + +/** + * Transfer object usage flags + */ +enum pipe_transfer_usage +{ + /** + * Resource contents read back (or accessed directly) at transfer + * create time. + */ + PIPE_TRANSFER_READ = (1 << 0), + + /** + * Resource contents will be written back at transfer_unmap + * time (or modified as a result of being accessed directly). + */ + PIPE_TRANSFER_WRITE = (1 << 1), + + /** + * Read/modify/write + */ + PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE, + + /** + * The transfer should map the texture storage directly. The driver may + * return NULL if that isn't possible, and the state tracker needs to cope + * with that and use an alternative path without this flag. + * + * E.g. the state tracker could have a simpler path which maps textures and + * does read/modify/write cycles on them directly, and a more complicated + * path which uses minimal read and write transfers. + * + * This flag supresses implicit "DISCARD" for buffer_subdata. + */ + PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2), + + /** + * Discards the memory within the mapped region. + * + * It should not be used with PIPE_TRANSFER_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. + */ + PIPE_TRANSFER_DISCARD_RANGE = (1 << 8), + + /** + * Fail if the resource cannot be mapped immediately. + * + * See also: + * - Direct3D's D3DLOCK_DONOTWAIT flag. + * - Mesa's MESA_MAP_NOWAIT_BIT flag. + * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. + */ + PIPE_TRANSFER_DONTBLOCK = (1 << 9), + + /** + * Do not attempt to synchronize pending operations on the resource when mapping. + * + * It should not be used with PIPE_TRANSFER_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. + * - Direct3D's D3DLOCK_NOOVERWRITE flag. + * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. + */ + PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10), + + /** + * Written ranges will be notified later with + * pipe_context::transfer_flush_region. + * + * It should not be used with PIPE_TRANSFER_READ. + * + * See also: + * - pipe_context::transfer_flush_region + * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. + */ + PIPE_TRANSFER_FLUSH_EXPLICIT = (1 << 11), + + /** + * Discards all memory backing the resource. + * + * It should not be used with PIPE_TRANSFER_READ. + * + * This is equivalent to: + * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT + * - BufferData(NULL) on a GL buffer + * - Direct3D's D3DLOCK_DISCARD flag. + * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag. + * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag + * - D3D10's D3D10_MAP_WRITE_DISCARD flag. + */ + PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12), + + /** + * Allows the resource to be used for rendering while mapped. + * + * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating + * the resource. + * + * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) + * must be called to ensure the device can see what the CPU has written. + */ + PIPE_TRANSFER_PERSISTENT = (1 << 13), + + /** + * If PERSISTENT is set, this ensures any writes done by the device are + * immediately visible to the CPU and vice versa. + * + * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating + * the resource. + */ + PIPE_TRANSFER_COHERENT = (1 << 14), + + /** + * Map a resource in a thread-safe manner, because the calling thread can + * be any thread. It can only be used if both WRITE and UNSYNCHRONIZED are + * set. + */ + PIPE_TRANSFER_THREAD_SAFE = 1 << 15, + + /** + * This and higher bits are reserved for private use by drivers. Drivers + * should use this as (PIPE_TRANSFER_DRV_PRV << i). + */ + PIPE_TRANSFER_DRV_PRV = (1 << 24) +}; + +/** + * Flags for the flush function. + */ +enum pipe_flush_flags +{ + PIPE_FLUSH_END_OF_FRAME = (1 << 0), + PIPE_FLUSH_DEFERRED = (1 << 1), + PIPE_FLUSH_FENCE_FD = (1 << 2), + PIPE_FLUSH_ASYNC = (1 << 3), + PIPE_FLUSH_HINT_FINISH = (1 << 4), + PIPE_FLUSH_TOP_OF_PIPE = (1 << 5), + PIPE_FLUSH_BOTTOM_OF_PIPE = (1 << 6), +}; + +/** + * Flags for pipe_context::dump_debug_state. + */ +#define PIPE_DUMP_DEVICE_STATUS_REGISTERS (1 << 0) + +/** + * Create a compute-only context. Use in pipe_screen::context_create. + * This disables draw, blit, and clear*, render_condition, and other graphics + * functions. Interop with other graphics contexts is still allowed. + * This allows scheduling jobs on a compute-only hardware command queue that + * can run in parallel with graphics without stalling it. + */ +#define PIPE_CONTEXT_COMPUTE_ONLY (1 << 0) + +/** + * Gather debug information and expect that pipe_context::dump_debug_state + * will be called. Use in pipe_screen::context_create. + */ +#define PIPE_CONTEXT_DEBUG (1 << 1) + +/** + * Whether out-of-bounds shader loads must return zero and out-of-bounds + * shader stores must be dropped. + */ +#define PIPE_CONTEXT_ROBUST_BUFFER_ACCESS (1 << 2) + +/** + * Prefer threaded pipe_context. It also implies that video codec functions + * will not be used. (they will be either no-ops or NULL when threading is + * enabled) + */ +#define PIPE_CONTEXT_PREFER_THREADED (1 << 3) + +/** + * Create a high priority context. + */ +#define PIPE_CONTEXT_HIGH_PRIORITY (1 << 4) + +/** + * Create a low priority context. + */ +#define PIPE_CONTEXT_LOW_PRIORITY (1 << 5) + +/** Stop execution if the device is reset. */ +#define PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET (1 << 6) + +/** + * Flags for pipe_context::memory_barrier. + */ +#define PIPE_BARRIER_MAPPED_BUFFER (1 << 0) +#define PIPE_BARRIER_SHADER_BUFFER (1 << 1) +#define PIPE_BARRIER_QUERY_BUFFER (1 << 2) +#define PIPE_BARRIER_VERTEX_BUFFER (1 << 3) +#define PIPE_BARRIER_INDEX_BUFFER (1 << 4) +#define PIPE_BARRIER_CONSTANT_BUFFER (1 << 5) +#define PIPE_BARRIER_INDIRECT_BUFFER (1 << 6) +#define PIPE_BARRIER_TEXTURE (1 << 7) +#define PIPE_BARRIER_IMAGE (1 << 8) +#define PIPE_BARRIER_FRAMEBUFFER (1 << 9) +#define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10) +#define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11) +#define PIPE_BARRIER_UPDATE_BUFFER (1 << 12) +#define PIPE_BARRIER_UPDATE_TEXTURE (1 << 13) +#define PIPE_BARRIER_ALL ((1 << 14) - 1) + +#define PIPE_BARRIER_UPDATE \ + (PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE) + +/** + * Flags for pipe_context::texture_barrier. + */ +#define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0) +#define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1) + +/** + * Resource binding flags -- state tracker must specify in advance all + * the ways a resource might be used. + */ +#define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */ +#define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */ +#define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */ +#define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */ +#define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */ +#define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */ +#define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */ +#define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */ +/* gap */ +#define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */ +#define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */ +#define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */ +#define PIPE_BIND_GLOBAL (1 << 13) /* set_global_binding */ +#define PIPE_BIND_SHADER_BUFFER (1 << 14) /* set_shader_buffers */ +#define PIPE_BIND_SHADER_IMAGE (1 << 15) /* set_shader_images */ +#define PIPE_BIND_COMPUTE_RESOURCE (1 << 16) /* set_compute_resources */ +#define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 17) /* pipe_draw_info.indirect */ +#define PIPE_BIND_QUERY_BUFFER (1 << 18) /* get_query_result_resource */ + +/** + * The first two flags above were previously part of the amorphous + * TEXTURE_USAGE, most of which are now descriptions of the ways a + * particular texture can be bound to the gallium pipeline. The two flags + * below do not fit within that and probably need to be migrated to some + * other place. + * + * It seems like scanout is used by the Xorg state tracker to ask for + * a texture suitable for actual scanout (hence the name), which + * implies extra layout constraints on some hardware. It may also + * have some special meaning regarding mouse cursor images. + * + * The shared flag is quite underspecified, but certainly isn't a + * binding flag - it seems more like a message to the winsys to create + * a shareable allocation. + * + * The third flag has been added to be able to force textures to be created + * in linear mode (no tiling). + */ +#define PIPE_BIND_SCANOUT (1 << 19) /* */ +#define PIPE_BIND_SHARED (1 << 20) /* get_texture_handle ??? */ +#define PIPE_BIND_LINEAR (1 << 21) + + +/** + * Flags for the driver about resource behaviour: + */ +#define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0) +#define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1) +#define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2) +#define PIPE_RESOURCE_FLAG_SPARSE (1 << 3) +#define PIPE_RESOURCE_FLAG_SINGLE_THREAD_USE (1 << 4) +#define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 8) /* driver/winsys private */ +#define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ + +/** + * Hint about the expected lifecycle of a resource. + * Sorted according to GPU vs CPU access. + */ +enum pipe_resource_usage { + PIPE_USAGE_DEFAULT, /* fast GPU access */ + PIPE_USAGE_IMMUTABLE, /* fast GPU access, immutable */ + PIPE_USAGE_DYNAMIC, /* uploaded data is used multiple times */ + PIPE_USAGE_STREAM, /* uploaded data is used once */ + PIPE_USAGE_STAGING, /* fast CPU access */ +}; + +/** + * Shaders + */ +enum pipe_shader_type { + PIPE_SHADER_VERTEX, + PIPE_SHADER_FRAGMENT, + PIPE_SHADER_GEOMETRY, + PIPE_SHADER_TESS_CTRL, + PIPE_SHADER_TESS_EVAL, + PIPE_SHADER_COMPUTE, + PIPE_SHADER_TYPES, +}; + +/** + * Primitive types: + */ +enum pipe_prim_type { + PIPE_PRIM_POINTS, + PIPE_PRIM_LINES, + PIPE_PRIM_LINE_LOOP, + PIPE_PRIM_LINE_STRIP, + PIPE_PRIM_TRIANGLES, + PIPE_PRIM_TRIANGLE_STRIP, + PIPE_PRIM_TRIANGLE_FAN, + PIPE_PRIM_QUADS, + PIPE_PRIM_QUAD_STRIP, + PIPE_PRIM_POLYGON, + PIPE_PRIM_LINES_ADJACENCY, + PIPE_PRIM_LINE_STRIP_ADJACENCY, + PIPE_PRIM_TRIANGLES_ADJACENCY, + PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY, + PIPE_PRIM_PATCHES, + PIPE_PRIM_MAX, +}; + +/** + * Tessellator spacing types + */ +enum pipe_tess_spacing { + PIPE_TESS_SPACING_FRACTIONAL_ODD, + PIPE_TESS_SPACING_FRACTIONAL_EVEN, + PIPE_TESS_SPACING_EQUAL, +}; + +/** + * Query object types + */ +enum pipe_query_type { + PIPE_QUERY_OCCLUSION_COUNTER, + PIPE_QUERY_OCCLUSION_PREDICATE, + PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE, + PIPE_QUERY_TIMESTAMP, + PIPE_QUERY_TIMESTAMP_DISJOINT, + PIPE_QUERY_TIME_ELAPSED, + PIPE_QUERY_PRIMITIVES_GENERATED, + PIPE_QUERY_PRIMITIVES_EMITTED, + PIPE_QUERY_SO_STATISTICS, + PIPE_QUERY_SO_OVERFLOW_PREDICATE, + PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE, + PIPE_QUERY_GPU_FINISHED, + PIPE_QUERY_PIPELINE_STATISTICS, + PIPE_QUERY_PIPELINE_STATISTICS_SINGLE, + PIPE_QUERY_TYPES, + /* start of driver queries, see pipe_screen::get_driver_query_info */ + PIPE_QUERY_DRIVER_SPECIFIC = 256, +}; + +/** + * Index for PIPE_QUERY_PIPELINE_STATISTICS subqueries. + */ +enum pipe_statistics_query_index { + PIPE_STAT_QUERY_IA_VERTICES, + PIPE_STAT_QUERY_IA_PRIMITIVES, + PIPE_STAT_QUERY_VS_INVOCATIONS, + PIPE_STAT_QUERY_GS_INVOCATIONS, + PIPE_STAT_QUERY_GS_PRIMITIVES, + PIPE_STAT_QUERY_C_INVOCATIONS, + PIPE_STAT_QUERY_C_PRIMITIVES, + PIPE_STAT_QUERY_PS_INVOCATIONS, + PIPE_STAT_QUERY_HS_INVOCATIONS, + PIPE_STAT_QUERY_DS_INVOCATIONS, + PIPE_STAT_QUERY_CS_INVOCATIONS, +}; + +/** + * Conditional rendering modes + */ +enum pipe_render_cond_flag { + PIPE_RENDER_COND_WAIT, + PIPE_RENDER_COND_NO_WAIT, + PIPE_RENDER_COND_BY_REGION_WAIT, + PIPE_RENDER_COND_BY_REGION_NO_WAIT, +}; + +/** + * Point sprite coord modes + */ +enum pipe_sprite_coord_mode { + PIPE_SPRITE_COORD_UPPER_LEFT, + PIPE_SPRITE_COORD_LOWER_LEFT, +}; + +/** + * Texture & format swizzles + */ +enum pipe_swizzle { + PIPE_SWIZZLE_X, + PIPE_SWIZZLE_Y, + PIPE_SWIZZLE_Z, + PIPE_SWIZZLE_W, + PIPE_SWIZZLE_0, + PIPE_SWIZZLE_1, + PIPE_SWIZZLE_NONE, + PIPE_SWIZZLE_MAX, /**< Number of enums counter (must be last) */ +}; + +/** + * Viewport swizzles + */ +enum pipe_viewport_swizzle { + PIPE_VIEWPORT_SWIZZLE_POSITIVE_X, + PIPE_VIEWPORT_SWIZZLE_NEGATIVE_X, + PIPE_VIEWPORT_SWIZZLE_POSITIVE_Y, + PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Y, + PIPE_VIEWPORT_SWIZZLE_POSITIVE_Z, + PIPE_VIEWPORT_SWIZZLE_NEGATIVE_Z, + PIPE_VIEWPORT_SWIZZLE_POSITIVE_W, + PIPE_VIEWPORT_SWIZZLE_NEGATIVE_W, +}; + +#define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull + + +/** + * Device reset status. + */ +enum pipe_reset_status +{ + PIPE_NO_RESET, + PIPE_GUILTY_CONTEXT_RESET, + PIPE_INNOCENT_CONTEXT_RESET, + PIPE_UNKNOWN_CONTEXT_RESET, +}; + + +/** + * Conservative rasterization modes. + */ +enum pipe_conservative_raster_mode +{ + PIPE_CONSERVATIVE_RASTER_OFF, + + /** + * The post-snap mode means the conservative rasterization occurs after + * the conversion from floating-point to fixed-point coordinates + * on the subpixel grid. + */ + PIPE_CONSERVATIVE_RASTER_POST_SNAP, + + /** + * The pre-snap mode means the conservative rasterization occurs before + * the conversion from floating-point to fixed-point coordinates. + */ + PIPE_CONSERVATIVE_RASTER_PRE_SNAP, +}; + + +/** + * resource_get_handle flags. + */ +/* Requires pipe_context::flush_resource before external use. */ +#define PIPE_HANDLE_USAGE_EXPLICIT_FLUSH (1 << 0) +/* Expected external use of the resource: */ +#define PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE (1 << 1) +#define PIPE_HANDLE_USAGE_SHADER_WRITE (1 << 2) + +/** + * pipe_image_view access flags. + */ +#define PIPE_IMAGE_ACCESS_READ (1 << 0) +#define PIPE_IMAGE_ACCESS_WRITE (1 << 1) +#define PIPE_IMAGE_ACCESS_READ_WRITE (PIPE_IMAGE_ACCESS_READ | \ + PIPE_IMAGE_ACCESS_WRITE) + +/** + * Implementation capabilities/limits which are queried through + * pipe_screen::get_param() + */ +enum pipe_cap +{ + PIPE_CAP_GRAPHICS, + PIPE_CAP_NPOT_TEXTURES, + PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS, + PIPE_CAP_ANISOTROPIC_FILTER, + PIPE_CAP_POINT_SPRITE, + PIPE_CAP_MAX_RENDER_TARGETS, + PIPE_CAP_OCCLUSION_QUERY, + PIPE_CAP_QUERY_TIME_ELAPSED, + PIPE_CAP_TEXTURE_SHADOW_MAP, + PIPE_CAP_TEXTURE_SWIZZLE, + PIPE_CAP_MAX_TEXTURE_2D_SIZE, + PIPE_CAP_MAX_TEXTURE_3D_LEVELS, + PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS, + PIPE_CAP_TEXTURE_MIRROR_CLAMP, + PIPE_CAP_BLEND_EQUATION_SEPARATE, + PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS, + PIPE_CAP_PRIMITIVE_RESTART, + /** blend enables and write masks per rendertarget */ + PIPE_CAP_INDEP_BLEND_ENABLE, + /** different blend funcs per rendertarget */ + PIPE_CAP_INDEP_BLEND_FUNC, + PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS, + PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT, + PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT, + PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER, + PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER, + PIPE_CAP_DEPTH_CLIP_DISABLE, + PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE, + PIPE_CAP_SHADER_STENCIL_EXPORT, + PIPE_CAP_TGSI_INSTANCEID, + PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR, + PIPE_CAP_FRAGMENT_COLOR_CLAMPED, + PIPE_CAP_MIXED_COLORBUFFER_FORMATS, + PIPE_CAP_SEAMLESS_CUBE_MAP, + PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE, + PIPE_CAP_MIN_TEXEL_OFFSET, + PIPE_CAP_MAX_TEXEL_OFFSET, + PIPE_CAP_CONDITIONAL_RENDER, + PIPE_CAP_TEXTURE_BARRIER, + PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS, + PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS, + PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME, + PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS, + PIPE_CAP_VERTEX_COLOR_UNCLAMPED, + PIPE_CAP_VERTEX_COLOR_CLAMPED, + PIPE_CAP_GLSL_FEATURE_LEVEL, + PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY, + PIPE_CAP_ESSL_FEATURE_LEVEL, + PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION, + PIPE_CAP_USER_VERTEX_BUFFERS, + PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY, + PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY, + PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY, + PIPE_CAP_COMPUTE, + PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT, + PIPE_CAP_START_INSTANCE, + PIPE_CAP_QUERY_TIMESTAMP, + PIPE_CAP_TEXTURE_MULTISAMPLE, + PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, + PIPE_CAP_CUBE_MAP_ARRAY, + PIPE_CAP_TEXTURE_BUFFER_OBJECTS, + PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT, + PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY, + PIPE_CAP_TGSI_TEXCOORD, + PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER, + PIPE_CAP_QUERY_PIPELINE_STATISTICS, + PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK, + PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE, + PIPE_CAP_MAX_VIEWPORTS, + PIPE_CAP_ENDIANNESS, + PIPE_CAP_MIXED_FRAMEBUFFER_SIZES, + PIPE_CAP_TGSI_VS_LAYER_VIEWPORT, + PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES, + PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS, + PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS, + PIPE_CAP_TEXTURE_GATHER_SM5, + PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT, + PIPE_CAP_FAKE_SW_MSAA, + PIPE_CAP_TEXTURE_QUERY_LOD, + PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET, + PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET, + PIPE_CAP_SAMPLE_SHADING, + PIPE_CAP_TEXTURE_GATHER_OFFSETS, + PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION, + PIPE_CAP_MAX_VERTEX_STREAMS, + PIPE_CAP_DRAW_INDIRECT, + PIPE_CAP_TGSI_FS_FINE_DERIVATIVE, + PIPE_CAP_VENDOR_ID, + PIPE_CAP_DEVICE_ID, + PIPE_CAP_ACCELERATED, + PIPE_CAP_VIDEO_MEMORY, + PIPE_CAP_UMA, + PIPE_CAP_CONDITIONAL_RENDER_INVERTED, + PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE, + PIPE_CAP_SAMPLER_VIEW_TARGET, + PIPE_CAP_CLIP_HALFZ, + PIPE_CAP_VERTEXID_NOBASE, + PIPE_CAP_POLYGON_OFFSET_CLAMP, + PIPE_CAP_MULTISAMPLE_Z_RESOLVE, + PIPE_CAP_RESOURCE_FROM_USER_MEMORY, + PIPE_CAP_DEVICE_RESET_STATUS_QUERY, + PIPE_CAP_MAX_SHADER_PATCH_VARYINGS, + PIPE_CAP_TEXTURE_FLOAT_LINEAR, + PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR, + PIPE_CAP_DEPTH_BOUNDS_TEST, + PIPE_CAP_TGSI_TXQS, + PIPE_CAP_FORCE_PERSAMPLE_INTERP, + PIPE_CAP_SHAREABLE_SHADERS, + PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS, + PIPE_CAP_CLEAR_TEXTURE, + PIPE_CAP_CLEAR_SCISSORED, + PIPE_CAP_DRAW_PARAMETERS, + PIPE_CAP_TGSI_PACK_HALF_FLOAT, + PIPE_CAP_MULTI_DRAW_INDIRECT, + PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS, + PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL, + PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL, + PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL, + PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT, + PIPE_CAP_INVALIDATE_BUFFER, + PIPE_CAP_GENERATE_MIPMAP, + PIPE_CAP_STRING_MARKER, + PIPE_CAP_SURFACE_REINTERPRET_BLOCKS, + PIPE_CAP_QUERY_BUFFER_OBJECT, + PIPE_CAP_QUERY_MEMORY_INFO, + PIPE_CAP_PCI_GROUP, + PIPE_CAP_PCI_BUS, + PIPE_CAP_PCI_DEVICE, + PIPE_CAP_PCI_FUNCTION, + PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT, + PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR, + PIPE_CAP_CULL_DISTANCE, + PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES, + PIPE_CAP_TGSI_VOTE, + PIPE_CAP_MAX_WINDOW_RECTANGLES, + PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED, + PIPE_CAP_VIEWPORT_SUBPIXEL_BITS, + PIPE_CAP_RASTERIZER_SUBPIXEL_BITS, + PIPE_CAP_MIXED_COLOR_DEPTH_BITS, + PIPE_CAP_TGSI_ARRAY_COMPONENTS, + PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS, + PIPE_CAP_TGSI_CAN_READ_OUTPUTS, + PIPE_CAP_NATIVE_FENCE_FD, + PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY, + PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS, + PIPE_CAP_FBFETCH, + PIPE_CAP_TGSI_MUL_ZERO_WINS, + PIPE_CAP_DOUBLES, + PIPE_CAP_INT64, + PIPE_CAP_INT64_DIVMOD, + PIPE_CAP_TGSI_TEX_TXF_LZ, + PIPE_CAP_TGSI_CLOCK, + PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE, + PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE, + PIPE_CAP_TGSI_BALLOT, + PIPE_CAP_TGSI_TES_LAYER_VIEWPORT, + PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX, + PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION, + PIPE_CAP_POST_DEPTH_COVERAGE, + PIPE_CAP_BINDLESS_TEXTURE, + PIPE_CAP_NIR_SAMPLERS_AS_DEREF, + PIPE_CAP_QUERY_SO_OVERFLOW, + PIPE_CAP_MEMOBJ, + PIPE_CAP_LOAD_CONSTBUF, + PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS, + PIPE_CAP_TILE_RASTER_ORDER, + PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES, + PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS, + PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET, + PIPE_CAP_CONTEXT_PRIORITY_MASK, + PIPE_CAP_FENCE_SIGNAL, + PIPE_CAP_CONSTBUF0_FLAGS, + PIPE_CAP_PACKED_UNIFORMS, + PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES, + PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES, + PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES, + PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES, + PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS, + PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE, + PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE, + PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS, + PIPE_CAP_MAX_GS_INVOCATIONS, + PIPE_CAP_MAX_SHADER_BUFFER_SIZE, + PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE, + PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS, + PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS, + PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS, + PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET, + PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET, + PIPE_CAP_SURFACE_SAMPLE_COUNT, + PIPE_CAP_TGSI_ATOMFADD, + PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE, + PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND, + PIPE_CAP_DEST_SURFACE_SRGB_CONTROL, + PIPE_CAP_NIR_COMPACT_ARRAYS, + PIPE_CAP_MAX_VARYINGS, + PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK, + PIPE_CAP_COMPUTE_SHADER_DERIVATIVES, + PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS, + PIPE_CAP_IMAGE_LOAD_FORMATTED, + PIPE_CAP_THROTTLE, + PIPE_CAP_DMABUF, + PIPE_CAP_PREFER_COMPUTE_FOR_MULTIMEDIA, + PIPE_CAP_FRAGMENT_SHADER_INTERLOCK, + PIPE_CAP_FBFETCH_COHERENT, + PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED, + PIPE_CAP_ATOMIC_FLOAT_MINMAX, + PIPE_CAP_TGSI_DIV, + PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD, + PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES, + PIPE_CAP_VERTEX_SHADER_SATURATE, + PIPE_CAP_TEXTURE_SHADOW_LOD, + PIPE_CAP_SHADER_SAMPLES_IDENTICAL, + PIPE_CAP_TGSI_ATOMINC_WRAP, + PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF, + PIPE_CAP_GL_SPIRV, + PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS, + PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION, + PIPE_CAP_TGSI_TG4_COMPONENT_IN_SWIZZLE, + PIPE_CAP_FLATSHADE, + PIPE_CAP_ALPHA_TEST, + PIPE_CAP_POINT_SIZE_FIXED, + PIPE_CAP_TWO_SIDED_COLOR, + PIPE_CAP_CLIP_PLANES, + PIPE_CAP_MAX_VERTEX_BUFFERS, + PIPE_CAP_OPENCL_INTEGER_FUNCTIONS, + PIPE_CAP_INTEGER_MULTIPLY_32X16, + /* Turn draw, dispatch, blit into NOOP */ + PIPE_CAP_FRONTEND_NOOP, + PIPE_CAP_NIR_IMAGES_AS_DEREF, + PIPE_CAP_PACKED_STREAM_OUTPUT, + PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED, + PIPE_CAP_PSIZ_CLAMPED, + PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES, + PIPE_CAP_GL_BEGIN_END_BUFFER_SIZE, + PIPE_CAP_VIEWPORT_SWIZZLE, + PIPE_CAP_SYSTEM_SVM, + PIPE_CAP_VIEWPORT_MASK, + PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL, + PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE, +}; + +/** + * Possible bits for PIPE_CAP_CONTEXT_PRIORITY_MASK param, which should + * return a bitmask of the supported priorities. If the driver does not + * support prioritized contexts, it can return 0. + * + * Note that these match __DRI2_RENDERER_HAS_CONTEXT_PRIORITY_* + */ +#define PIPE_CONTEXT_PRIORITY_LOW (1 << 0) +#define PIPE_CONTEXT_PRIORITY_MEDIUM (1 << 1) +#define PIPE_CONTEXT_PRIORITY_HIGH (1 << 2) + +#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0) +#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1) + +enum pipe_endian +{ + PIPE_ENDIAN_LITTLE = 0, + PIPE_ENDIAN_BIG = 1, +#if UTIL_ARCH_LITTLE_ENDIAN + PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE +#elif UTIL_ARCH_BIG_ENDIAN + PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG +#endif +}; + +/** + * Implementation limits which are queried through + * pipe_screen::get_paramf() + */ +enum pipe_capf +{ + PIPE_CAPF_MAX_LINE_WIDTH, + PIPE_CAPF_MAX_LINE_WIDTH_AA, + PIPE_CAPF_MAX_POINT_WIDTH, + PIPE_CAPF_MAX_POINT_WIDTH_AA, + PIPE_CAPF_MAX_TEXTURE_ANISOTROPY, + PIPE_CAPF_MAX_TEXTURE_LOD_BIAS, + PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE, + PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE, + PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY, +}; + +/** Shader caps not specific to any single stage */ +enum pipe_shader_cap +{ + PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */ + PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS, + PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS, + PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS, + PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH, + PIPE_SHADER_CAP_MAX_INPUTS, + PIPE_SHADER_CAP_MAX_OUTPUTS, + PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE, + PIPE_SHADER_CAP_MAX_CONST_BUFFERS, + PIPE_SHADER_CAP_MAX_TEMPS, + /* boolean caps */ + PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED, + PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR, + PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR, + PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR, + PIPE_SHADER_CAP_INDIRECT_CONST_ADDR, + PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */ + PIPE_SHADER_CAP_INTEGERS, + PIPE_SHADER_CAP_INT64_ATOMICS, + PIPE_SHADER_CAP_FP16, + PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS, + PIPE_SHADER_CAP_PREFERRED_IR, + PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED, + PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS, + PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */ + PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED, + PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED, + PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE, + PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT, + PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, + PIPE_SHADER_CAP_SUPPORTED_IRS, + PIPE_SHADER_CAP_MAX_SHADER_IMAGES, + PIPE_SHADER_CAP_LOWER_IF_THRESHOLD, + PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS, + PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED, + PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS, + PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS, +}; + +/** + * Shader intermediate representation. + * + * Note that if the driver requests something other than TGSI, it must + * always be prepared to receive TGSI in addition to its preferred IR. + * If the driver requests TGSI as its preferred IR, it will *always* + * get TGSI. + * + * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with + * state trackers that only understand TGSI. + */ +enum pipe_shader_ir +{ + PIPE_SHADER_IR_TGSI = 0, + PIPE_SHADER_IR_NATIVE, + PIPE_SHADER_IR_NIR, + PIPE_SHADER_IR_NIR_SERIALIZED, +}; + +/** + * Compute-specific implementation capability. They can be queried + * using pipe_screen::get_compute_param. + */ +enum pipe_compute_cap +{ + PIPE_COMPUTE_CAP_ADDRESS_BITS, + PIPE_COMPUTE_CAP_IR_TARGET, + PIPE_COMPUTE_CAP_GRID_DIMENSION, + PIPE_COMPUTE_CAP_MAX_GRID_SIZE, + PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, + PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, + PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, + PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE, + PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE, + PIPE_COMPUTE_CAP_MAX_INPUT_SIZE, + PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, + PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY, + PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS, + PIPE_COMPUTE_CAP_IMAGES_SUPPORTED, + PIPE_COMPUTE_CAP_SUBGROUP_SIZE, + PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK, +}; + +/** + * Resource parameters. They can be queried using + * pipe_screen::get_resource_param. + */ +enum pipe_resource_param +{ + PIPE_RESOURCE_PARAM_NPLANES, + PIPE_RESOURCE_PARAM_STRIDE, + PIPE_RESOURCE_PARAM_OFFSET, + PIPE_RESOURCE_PARAM_MODIFIER, + PIPE_RESOURCE_PARAM_HANDLE_TYPE_SHARED, + PIPE_RESOURCE_PARAM_HANDLE_TYPE_KMS, + PIPE_RESOURCE_PARAM_HANDLE_TYPE_FD, +}; + +/** + * Types of parameters for pipe_context::set_context_param. + */ +enum pipe_context_param +{ + /* A hint for the driver that it should pin its execution threads to + * a group of cores sharing a specific L3 cache if the CPU has multiple + * L3 caches. This is needed for good multithreading performance on + * AMD Zen CPUs. "value" is the L3 cache index. Drivers that don't have + * any internal threads or don't run on affected CPUs can ignore this. + */ + PIPE_CONTEXT_PARAM_PIN_THREADS_TO_L3_CACHE, +}; + +/** + * Composite query types + */ + +/** + * Query result for PIPE_QUERY_SO_STATISTICS. + */ +struct pipe_query_data_so_statistics +{ + uint64_t num_primitives_written; + uint64_t primitives_storage_needed; +}; + +/** + * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT. + */ +struct pipe_query_data_timestamp_disjoint +{ + uint64_t frequency; + bool disjoint; +}; + +/** + * Query result for PIPE_QUERY_PIPELINE_STATISTICS. + */ +struct pipe_query_data_pipeline_statistics +{ + uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */ + uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */ + uint64_t vs_invocations; /**< Num vertex shader invocations. */ + uint64_t gs_invocations; /**< Num geometry shader invocations. */ + uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */ + uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */ + uint64_t c_primitives; /**< Num primitives that were rendered. */ + uint64_t ps_invocations; /**< Num pixel shader invocations. */ + uint64_t hs_invocations; /**< Num hull shader invocations. */ + uint64_t ds_invocations; /**< Num domain shader invocations. */ + uint64_t cs_invocations; /**< Num compute shader invocations. */ +}; + +/** + * For batch queries. + */ +union pipe_numeric_type_union +{ + uint64_t u64; + uint32_t u32; + float f; +}; + +/** + * Query result (returned by pipe_context::get_query_result). + */ +union pipe_query_result +{ + /* PIPE_QUERY_OCCLUSION_PREDICATE */ + /* PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE */ + /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */ + /* PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE */ + /* PIPE_QUERY_GPU_FINISHED */ + bool b; + + /* PIPE_QUERY_OCCLUSION_COUNTER */ + /* PIPE_QUERY_TIMESTAMP */ + /* PIPE_QUERY_TIME_ELAPSED */ + /* PIPE_QUERY_PRIMITIVES_GENERATED */ + /* PIPE_QUERY_PRIMITIVES_EMITTED */ + /* PIPE_DRIVER_QUERY_TYPE_UINT64 */ + /* PIPE_DRIVER_QUERY_TYPE_BYTES */ + /* PIPE_DRIVER_QUERY_TYPE_MICROSECONDS */ + /* PIPE_DRIVER_QUERY_TYPE_HZ */ + uint64_t u64; + + /* PIPE_DRIVER_QUERY_TYPE_UINT */ + uint32_t u32; + + /* PIPE_DRIVER_QUERY_TYPE_FLOAT */ + /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */ + float f; + + /* PIPE_QUERY_SO_STATISTICS */ + struct pipe_query_data_so_statistics so_statistics; + + /* PIPE_QUERY_TIMESTAMP_DISJOINT */ + struct pipe_query_data_timestamp_disjoint timestamp_disjoint; + + /* PIPE_QUERY_PIPELINE_STATISTICS */ + struct pipe_query_data_pipeline_statistics pipeline_statistics; + + /* batch queries (variable length) */ + union pipe_numeric_type_union batch[1]; +}; + +enum pipe_query_value_type +{ + PIPE_QUERY_TYPE_I32, + PIPE_QUERY_TYPE_U32, + PIPE_QUERY_TYPE_I64, + PIPE_QUERY_TYPE_U64, +}; + +union pipe_color_union +{ + float f[4]; + int i[4]; + unsigned int ui[4]; +}; + +enum pipe_driver_query_type +{ + PIPE_DRIVER_QUERY_TYPE_UINT64, + PIPE_DRIVER_QUERY_TYPE_UINT, + PIPE_DRIVER_QUERY_TYPE_FLOAT, + PIPE_DRIVER_QUERY_TYPE_PERCENTAGE, + PIPE_DRIVER_QUERY_TYPE_BYTES, + PIPE_DRIVER_QUERY_TYPE_MICROSECONDS, + PIPE_DRIVER_QUERY_TYPE_HZ, + PIPE_DRIVER_QUERY_TYPE_DBM, + PIPE_DRIVER_QUERY_TYPE_TEMPERATURE, + PIPE_DRIVER_QUERY_TYPE_VOLTS, + PIPE_DRIVER_QUERY_TYPE_AMPS, + PIPE_DRIVER_QUERY_TYPE_WATTS, +}; + +/* Whether an average value per frame or a cumulative value should be + * displayed. + */ +enum pipe_driver_query_result_type +{ + PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, + PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE, +}; + +/** + * Some hardware requires some hardware-specific queries to be submitted + * as batched queries. The corresponding query objects are created using + * create_batch_query, and at most one such query may be active at + * any time. + */ +#define PIPE_DRIVER_QUERY_FLAG_BATCH (1 << 0) + +/* Do not list this query in the HUD. */ +#define PIPE_DRIVER_QUERY_FLAG_DONT_LIST (1 << 1) + +struct pipe_driver_query_info +{ + const char *name; + unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */ + union pipe_numeric_type_union max_value; /* max value that can be returned */ + enum pipe_driver_query_type type; + enum pipe_driver_query_result_type result_type; + unsigned group_id; + unsigned flags; +}; + +struct pipe_driver_query_group_info +{ + const char *name; + unsigned max_active_queries; + unsigned num_queries; +}; + +enum pipe_fd_type +{ + PIPE_FD_TYPE_NATIVE_SYNC, + PIPE_FD_TYPE_SYNCOBJ, +}; + +/** + * counter type and counter data type enums used by INTEL_performance_query + * APIs in gallium drivers. + */ +enum pipe_perf_counter_type +{ + PIPE_PERF_COUNTER_TYPE_EVENT, + PIPE_PERF_COUNTER_TYPE_DURATION_NORM, + PIPE_PERF_COUNTER_TYPE_DURATION_RAW, + PIPE_PERF_COUNTER_TYPE_THROUGHPUT, + PIPE_PERF_COUNTER_TYPE_RAW, + PIPE_PERF_COUNTER_TYPE_TIMESTAMP, +}; + +enum pipe_perf_counter_data_type +{ + PIPE_PERF_COUNTER_DATA_TYPE_BOOL32, + PIPE_PERF_COUNTER_DATA_TYPE_UINT32, + PIPE_PERF_COUNTER_DATA_TYPE_UINT64, + PIPE_PERF_COUNTER_DATA_TYPE_FLOAT, + PIPE_PERF_COUNTER_DATA_TYPE_DOUBLE, +}; + +#define PIPE_UUID_SIZE 16 + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_format.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_format.h new file mode 100644 index 0000000000..a51843caa2 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_format.h @@ -0,0 +1,587 @@ +/************************************************************************** + * + * Copyright 2007 VMware, Inc. + * Copyright (c) 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef PIPE_FORMAT_H +#define PIPE_FORMAT_H + +#include "p_config.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Formats for textures, surfaces and vertex data + */ +enum pipe_format { + PIPE_FORMAT_NONE, + PIPE_FORMAT_B8G8R8A8_UNORM, + PIPE_FORMAT_B8G8R8X8_UNORM, + PIPE_FORMAT_A8R8G8B8_UNORM, + PIPE_FORMAT_X8R8G8B8_UNORM, + PIPE_FORMAT_B5G5R5A1_UNORM, + PIPE_FORMAT_R4G4B4A4_UNORM, + PIPE_FORMAT_B4G4R4A4_UNORM, + PIPE_FORMAT_R5G6B5_UNORM, + PIPE_FORMAT_B5G6R5_UNORM, + PIPE_FORMAT_R10G10B10A2_UNORM, + PIPE_FORMAT_L8_UNORM, /**< ubyte luminance */ + PIPE_FORMAT_A8_UNORM, /**< ubyte alpha */ + PIPE_FORMAT_I8_UNORM, /**< ubyte intensity */ + PIPE_FORMAT_L8A8_UNORM, /**< ubyte alpha, luminance */ + PIPE_FORMAT_L16_UNORM, /**< ushort luminance */ + PIPE_FORMAT_UYVY, + PIPE_FORMAT_YUYV, + PIPE_FORMAT_Z16_UNORM, + PIPE_FORMAT_Z32_UNORM, + PIPE_FORMAT_Z32_FLOAT, + PIPE_FORMAT_Z24_UNORM_S8_UINT, + PIPE_FORMAT_S8_UINT_Z24_UNORM, + PIPE_FORMAT_Z24X8_UNORM, + PIPE_FORMAT_X8Z24_UNORM, + PIPE_FORMAT_S8_UINT, /**< ubyte stencil */ + PIPE_FORMAT_R64_FLOAT, + PIPE_FORMAT_R64G64_FLOAT, + PIPE_FORMAT_R64G64B64_FLOAT, + PIPE_FORMAT_R64G64B64A64_FLOAT, + PIPE_FORMAT_R32_FLOAT, + PIPE_FORMAT_R32G32_FLOAT, + PIPE_FORMAT_R32G32B32_FLOAT, + PIPE_FORMAT_R32G32B32A32_FLOAT, + PIPE_FORMAT_R32_UNORM, + PIPE_FORMAT_R32G32_UNORM, + PIPE_FORMAT_R32G32B32_UNORM, + PIPE_FORMAT_R32G32B32A32_UNORM, + PIPE_FORMAT_R32_USCALED, + PIPE_FORMAT_R32G32_USCALED, + PIPE_FORMAT_R32G32B32_USCALED, + PIPE_FORMAT_R32G32B32A32_USCALED, + PIPE_FORMAT_R32_SNORM, + PIPE_FORMAT_R32G32_SNORM, + PIPE_FORMAT_R32G32B32_SNORM, + PIPE_FORMAT_R32G32B32A32_SNORM, + PIPE_FORMAT_R32_SSCALED, + PIPE_FORMAT_R32G32_SSCALED, + PIPE_FORMAT_R32G32B32_SSCALED, + PIPE_FORMAT_R32G32B32A32_SSCALED, + PIPE_FORMAT_R16_UNORM, + PIPE_FORMAT_R16G16_UNORM, + PIPE_FORMAT_R16G16B16_UNORM, + PIPE_FORMAT_R16G16B16A16_UNORM, + PIPE_FORMAT_R16_USCALED, + PIPE_FORMAT_R16G16_USCALED, + PIPE_FORMAT_R16G16B16_USCALED, + PIPE_FORMAT_R16G16B16A16_USCALED, + PIPE_FORMAT_R16_SNORM, + PIPE_FORMAT_R16G16_SNORM, + PIPE_FORMAT_R16G16B16_SNORM, + PIPE_FORMAT_R16G16B16A16_SNORM, + PIPE_FORMAT_R16_SSCALED, + PIPE_FORMAT_R16G16_SSCALED, + PIPE_FORMAT_R16G16B16_SSCALED, + PIPE_FORMAT_R16G16B16A16_SSCALED, + PIPE_FORMAT_R8_UNORM, + PIPE_FORMAT_R8G8_UNORM, + PIPE_FORMAT_R8G8B8_UNORM, + PIPE_FORMAT_B8G8R8_UNORM, + PIPE_FORMAT_R8G8B8A8_UNORM, + PIPE_FORMAT_X8B8G8R8_UNORM, + PIPE_FORMAT_R8_USCALED, + PIPE_FORMAT_R8G8_USCALED, + PIPE_FORMAT_R8G8B8_USCALED, + PIPE_FORMAT_B8G8R8_USCALED, + PIPE_FORMAT_R8G8B8A8_USCALED, + PIPE_FORMAT_B8G8R8A8_USCALED, + PIPE_FORMAT_A8B8G8R8_USCALED, + PIPE_FORMAT_R8_SNORM, + PIPE_FORMAT_R8G8_SNORM, + PIPE_FORMAT_R8G8B8_SNORM, + PIPE_FORMAT_B8G8R8_SNORM, + PIPE_FORMAT_R8G8B8A8_SNORM, + PIPE_FORMAT_B8G8R8A8_SNORM, + PIPE_FORMAT_R8_SSCALED, + PIPE_FORMAT_R8G8_SSCALED, + PIPE_FORMAT_R8G8B8_SSCALED, + PIPE_FORMAT_B8G8R8_SSCALED, + PIPE_FORMAT_R8G8B8A8_SSCALED, + PIPE_FORMAT_B8G8R8A8_SSCALED, + PIPE_FORMAT_A8B8G8R8_SSCALED, + PIPE_FORMAT_R32_FIXED, + PIPE_FORMAT_R32G32_FIXED, + PIPE_FORMAT_R32G32B32_FIXED, + PIPE_FORMAT_R32G32B32A32_FIXED, + PIPE_FORMAT_R16_FLOAT, + PIPE_FORMAT_R16G16_FLOAT, + PIPE_FORMAT_R16G16B16_FLOAT, + PIPE_FORMAT_R16G16B16A16_FLOAT, + + /* sRGB formats */ + PIPE_FORMAT_L8_SRGB, + PIPE_FORMAT_R8_SRGB, + PIPE_FORMAT_L8A8_SRGB, + PIPE_FORMAT_R8G8_SRGB, + PIPE_FORMAT_R8G8B8_SRGB, + PIPE_FORMAT_B8G8R8_SRGB, + PIPE_FORMAT_A8B8G8R8_SRGB, + PIPE_FORMAT_X8B8G8R8_SRGB, + PIPE_FORMAT_B8G8R8A8_SRGB, + PIPE_FORMAT_B8G8R8X8_SRGB, + PIPE_FORMAT_A8R8G8B8_SRGB, + PIPE_FORMAT_X8R8G8B8_SRGB, + PIPE_FORMAT_R8G8B8A8_SRGB, + + /* compressed formats */ + PIPE_FORMAT_DXT1_RGB, + PIPE_FORMAT_DXT1_RGBA, + PIPE_FORMAT_DXT3_RGBA, + PIPE_FORMAT_DXT5_RGBA, + + /* sRGB, compressed */ + PIPE_FORMAT_DXT1_SRGB, + PIPE_FORMAT_DXT1_SRGBA, + PIPE_FORMAT_DXT3_SRGBA, + PIPE_FORMAT_DXT5_SRGBA, + + /* rgtc compressed */ + PIPE_FORMAT_RGTC1_UNORM, + PIPE_FORMAT_RGTC1_SNORM, + PIPE_FORMAT_RGTC2_UNORM, + PIPE_FORMAT_RGTC2_SNORM, + + PIPE_FORMAT_R8G8_B8G8_UNORM, + PIPE_FORMAT_G8R8_G8B8_UNORM, + + /* mixed formats */ + PIPE_FORMAT_R8SG8SB8UX8U_NORM, + PIPE_FORMAT_R5SG5SB6U_NORM, + + /* TODO: re-order these */ + PIPE_FORMAT_A8B8G8R8_UNORM, + PIPE_FORMAT_B5G5R5X1_UNORM, + PIPE_FORMAT_R10G10B10A2_USCALED, + PIPE_FORMAT_R11G11B10_FLOAT, + PIPE_FORMAT_R9G9B9E5_FLOAT, + PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, + PIPE_FORMAT_R1_UNORM, + PIPE_FORMAT_R10G10B10X2_USCALED, + PIPE_FORMAT_R10G10B10X2_SNORM, + PIPE_FORMAT_L4A4_UNORM, + PIPE_FORMAT_A2R10G10B10_UNORM, + PIPE_FORMAT_A2B10G10R10_UNORM, + PIPE_FORMAT_B10G10R10A2_UNORM, + PIPE_FORMAT_R10SG10SB10SA2U_NORM, + PIPE_FORMAT_R8G8Bx_SNORM, + PIPE_FORMAT_R8G8B8X8_UNORM, + PIPE_FORMAT_B4G4R4X4_UNORM, + + /* some stencil samplers formats */ + PIPE_FORMAT_X24S8_UINT, + PIPE_FORMAT_S8X24_UINT, + PIPE_FORMAT_X32_S8X24_UINT, + + PIPE_FORMAT_R3G3B2_UNORM, + PIPE_FORMAT_B2G3R3_UNORM, + PIPE_FORMAT_L16A16_UNORM, + PIPE_FORMAT_A16_UNORM, + PIPE_FORMAT_I16_UNORM, + + PIPE_FORMAT_LATC1_UNORM, + PIPE_FORMAT_LATC1_SNORM, + PIPE_FORMAT_LATC2_UNORM, + PIPE_FORMAT_LATC2_SNORM, + + PIPE_FORMAT_A8_SNORM, + PIPE_FORMAT_L8_SNORM, + PIPE_FORMAT_L8A8_SNORM, + PIPE_FORMAT_I8_SNORM, + PIPE_FORMAT_A16_SNORM, + PIPE_FORMAT_L16_SNORM, + PIPE_FORMAT_L16A16_SNORM, + PIPE_FORMAT_I16_SNORM, + + PIPE_FORMAT_A16_FLOAT, + PIPE_FORMAT_L16_FLOAT, + PIPE_FORMAT_L16A16_FLOAT, + PIPE_FORMAT_I16_FLOAT, + PIPE_FORMAT_A32_FLOAT, + PIPE_FORMAT_L32_FLOAT, + PIPE_FORMAT_L32A32_FLOAT, + PIPE_FORMAT_I32_FLOAT, + + PIPE_FORMAT_YV12, + PIPE_FORMAT_YV16, + PIPE_FORMAT_IYUV, /**< aka I420 */ + PIPE_FORMAT_NV12, + PIPE_FORMAT_NV21, + + PIPE_FORMAT_A4R4_UNORM, + PIPE_FORMAT_R4A4_UNORM, + PIPE_FORMAT_R8A8_UNORM, + PIPE_FORMAT_A8R8_UNORM, + + PIPE_FORMAT_R10G10B10A2_SSCALED, + PIPE_FORMAT_R10G10B10A2_SNORM, + + PIPE_FORMAT_B10G10R10A2_USCALED, + PIPE_FORMAT_B10G10R10A2_SSCALED, + PIPE_FORMAT_B10G10R10A2_SNORM, + + PIPE_FORMAT_R8_UINT, + PIPE_FORMAT_R8G8_UINT, + PIPE_FORMAT_R8G8B8_UINT, + PIPE_FORMAT_R8G8B8A8_UINT, + + PIPE_FORMAT_R8_SINT, + PIPE_FORMAT_R8G8_SINT, + PIPE_FORMAT_R8G8B8_SINT, + PIPE_FORMAT_R8G8B8A8_SINT, + + PIPE_FORMAT_R16_UINT, + PIPE_FORMAT_R16G16_UINT, + PIPE_FORMAT_R16G16B16_UINT, + PIPE_FORMAT_R16G16B16A16_UINT, + + PIPE_FORMAT_R16_SINT, + PIPE_FORMAT_R16G16_SINT, + PIPE_FORMAT_R16G16B16_SINT, + PIPE_FORMAT_R16G16B16A16_SINT, + + PIPE_FORMAT_R32_UINT, + PIPE_FORMAT_R32G32_UINT, + PIPE_FORMAT_R32G32B32_UINT, + PIPE_FORMAT_R32G32B32A32_UINT, + + PIPE_FORMAT_R32_SINT, + PIPE_FORMAT_R32G32_SINT, + PIPE_FORMAT_R32G32B32_SINT, + PIPE_FORMAT_R32G32B32A32_SINT, + + PIPE_FORMAT_A8_UINT, + PIPE_FORMAT_I8_UINT, + PIPE_FORMAT_L8_UINT, + PIPE_FORMAT_L8A8_UINT, + + PIPE_FORMAT_A8_SINT, + PIPE_FORMAT_I8_SINT, + PIPE_FORMAT_L8_SINT, + PIPE_FORMAT_L8A8_SINT, + + PIPE_FORMAT_A16_UINT, + PIPE_FORMAT_I16_UINT, + PIPE_FORMAT_L16_UINT, + PIPE_FORMAT_L16A16_UINT, + + PIPE_FORMAT_A16_SINT, + PIPE_FORMAT_I16_SINT, + PIPE_FORMAT_L16_SINT, + PIPE_FORMAT_L16A16_SINT, + + PIPE_FORMAT_A32_UINT, + PIPE_FORMAT_I32_UINT, + PIPE_FORMAT_L32_UINT, + PIPE_FORMAT_L32A32_UINT, + + PIPE_FORMAT_A32_SINT, + PIPE_FORMAT_I32_SINT, + PIPE_FORMAT_L32_SINT, + PIPE_FORMAT_L32A32_SINT, + + PIPE_FORMAT_B8G8R8_UINT, + PIPE_FORMAT_B8G8R8A8_UINT, + + PIPE_FORMAT_B8G8R8_SINT, + PIPE_FORMAT_B8G8R8A8_SINT, + + PIPE_FORMAT_A8R8G8B8_UINT, + PIPE_FORMAT_A8B8G8R8_UINT, + PIPE_FORMAT_A2R10G10B10_UINT, + PIPE_FORMAT_A2B10G10R10_UINT, + PIPE_FORMAT_B10G10R10A2_UINT, + PIPE_FORMAT_B10G10R10A2_SINT, + PIPE_FORMAT_R5G6B5_UINT, + PIPE_FORMAT_B5G6R5_UINT, + PIPE_FORMAT_R5G5B5A1_UINT, + PIPE_FORMAT_B5G5R5A1_UINT, + PIPE_FORMAT_A1R5G5B5_UINT, + PIPE_FORMAT_A1B5G5R5_UINT, + PIPE_FORMAT_R4G4B4A4_UINT, + PIPE_FORMAT_B4G4R4A4_UINT, + PIPE_FORMAT_A4R4G4B4_UINT, + PIPE_FORMAT_A4B4G4R4_UINT, + PIPE_FORMAT_R3G3B2_UINT, + PIPE_FORMAT_B2G3R3_UINT, + + PIPE_FORMAT_ETC1_RGB8, + + PIPE_FORMAT_R8G8_R8B8_UNORM, + PIPE_FORMAT_G8R8_B8R8_UNORM, + + PIPE_FORMAT_R8G8B8X8_SNORM, + PIPE_FORMAT_R8G8B8X8_SRGB, + PIPE_FORMAT_R8G8B8X8_UINT, + PIPE_FORMAT_R8G8B8X8_SINT, + PIPE_FORMAT_B10G10R10X2_UNORM, + PIPE_FORMAT_R16G16B16X16_UNORM, + PIPE_FORMAT_R16G16B16X16_SNORM, + PIPE_FORMAT_R16G16B16X16_FLOAT, + PIPE_FORMAT_R16G16B16X16_UINT, + PIPE_FORMAT_R16G16B16X16_SINT, + PIPE_FORMAT_R32G32B32X32_FLOAT, + PIPE_FORMAT_R32G32B32X32_UINT, + PIPE_FORMAT_R32G32B32X32_SINT, + + PIPE_FORMAT_R8A8_SNORM, + PIPE_FORMAT_R16A16_UNORM, + PIPE_FORMAT_R16A16_SNORM, + PIPE_FORMAT_R16A16_FLOAT, + PIPE_FORMAT_R32A32_FLOAT, + PIPE_FORMAT_R8A8_UINT, + PIPE_FORMAT_R8A8_SINT, + PIPE_FORMAT_R16A16_UINT, + PIPE_FORMAT_R16A16_SINT, + PIPE_FORMAT_R32A32_UINT, + PIPE_FORMAT_R32A32_SINT, + PIPE_FORMAT_R10G10B10A2_UINT, + PIPE_FORMAT_R10G10B10A2_SINT, + + PIPE_FORMAT_B5G6R5_SRGB, + + PIPE_FORMAT_BPTC_RGBA_UNORM, + PIPE_FORMAT_BPTC_SRGBA, + PIPE_FORMAT_BPTC_RGB_FLOAT, + PIPE_FORMAT_BPTC_RGB_UFLOAT, + + PIPE_FORMAT_G8R8_UNORM, + PIPE_FORMAT_G8R8_SNORM, + PIPE_FORMAT_G16R16_UNORM, + PIPE_FORMAT_G16R16_SNORM, + + PIPE_FORMAT_A8B8G8R8_SNORM, + PIPE_FORMAT_X8B8G8R8_SNORM, + + PIPE_FORMAT_ETC2_RGB8, + PIPE_FORMAT_ETC2_SRGB8, + PIPE_FORMAT_ETC2_RGB8A1, + PIPE_FORMAT_ETC2_SRGB8A1, + PIPE_FORMAT_ETC2_RGBA8, + PIPE_FORMAT_ETC2_SRGBA8, + PIPE_FORMAT_ETC2_R11_UNORM, + PIPE_FORMAT_ETC2_R11_SNORM, + PIPE_FORMAT_ETC2_RG11_UNORM, + PIPE_FORMAT_ETC2_RG11_SNORM, + + PIPE_FORMAT_ASTC_4x4, + PIPE_FORMAT_ASTC_5x4, + PIPE_FORMAT_ASTC_5x5, + PIPE_FORMAT_ASTC_6x5, + PIPE_FORMAT_ASTC_6x6, + PIPE_FORMAT_ASTC_8x5, + PIPE_FORMAT_ASTC_8x6, + PIPE_FORMAT_ASTC_8x8, + PIPE_FORMAT_ASTC_10x5, + PIPE_FORMAT_ASTC_10x6, + PIPE_FORMAT_ASTC_10x8, + PIPE_FORMAT_ASTC_10x10, + PIPE_FORMAT_ASTC_12x10, + PIPE_FORMAT_ASTC_12x12, + + PIPE_FORMAT_ASTC_4x4_SRGB, + PIPE_FORMAT_ASTC_5x4_SRGB, + PIPE_FORMAT_ASTC_5x5_SRGB, + PIPE_FORMAT_ASTC_6x5_SRGB, + PIPE_FORMAT_ASTC_6x6_SRGB, + PIPE_FORMAT_ASTC_8x5_SRGB, + PIPE_FORMAT_ASTC_8x6_SRGB, + PIPE_FORMAT_ASTC_8x8_SRGB, + PIPE_FORMAT_ASTC_10x5_SRGB, + PIPE_FORMAT_ASTC_10x6_SRGB, + PIPE_FORMAT_ASTC_10x8_SRGB, + PIPE_FORMAT_ASTC_10x10_SRGB, + PIPE_FORMAT_ASTC_12x10_SRGB, + PIPE_FORMAT_ASTC_12x12_SRGB, + + PIPE_FORMAT_ASTC_3x3x3, + PIPE_FORMAT_ASTC_4x3x3, + PIPE_FORMAT_ASTC_4x4x3, + PIPE_FORMAT_ASTC_4x4x4, + PIPE_FORMAT_ASTC_5x4x4, + PIPE_FORMAT_ASTC_5x5x4, + PIPE_FORMAT_ASTC_5x5x5, + PIPE_FORMAT_ASTC_6x5x5, + PIPE_FORMAT_ASTC_6x6x5, + PIPE_FORMAT_ASTC_6x6x6, + + PIPE_FORMAT_ASTC_3x3x3_SRGB, + PIPE_FORMAT_ASTC_4x3x3_SRGB, + PIPE_FORMAT_ASTC_4x4x3_SRGB, + PIPE_FORMAT_ASTC_4x4x4_SRGB, + PIPE_FORMAT_ASTC_5x4x4_SRGB, + PIPE_FORMAT_ASTC_5x5x4_SRGB, + PIPE_FORMAT_ASTC_5x5x5_SRGB, + PIPE_FORMAT_ASTC_6x5x5_SRGB, + PIPE_FORMAT_ASTC_6x6x5_SRGB, + PIPE_FORMAT_ASTC_6x6x6_SRGB, + + PIPE_FORMAT_FXT1_RGB, + PIPE_FORMAT_FXT1_RGBA, + + PIPE_FORMAT_P010, + PIPE_FORMAT_P016, + + PIPE_FORMAT_R10G10B10X2_UNORM, + PIPE_FORMAT_A1R5G5B5_UNORM, + PIPE_FORMAT_A1B5G5R5_UNORM, + PIPE_FORMAT_X1B5G5R5_UNORM, + PIPE_FORMAT_R5G5B5A1_UNORM, + PIPE_FORMAT_A4R4G4B4_UNORM, + PIPE_FORMAT_A4B4G4R4_UNORM, + + PIPE_FORMAT_G8R8_SINT, + PIPE_FORMAT_A8B8G8R8_SINT, + PIPE_FORMAT_X8B8G8R8_SINT, + + PIPE_FORMAT_ATC_RGB, + PIPE_FORMAT_ATC_RGBA_EXPLICIT, + PIPE_FORMAT_ATC_RGBA_INTERPOLATED, + + PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8, + + PIPE_FORMAT_AYUV, + PIPE_FORMAT_XYUV, + + PIPE_FORMAT_COUNT +}; + +#if UTIL_ARCH_LITTLE_ENDIAN +#define PIPE_FORMAT_RGBA8888_UNORM PIPE_FORMAT_R8G8B8A8_UNORM +#define PIPE_FORMAT_RGBX8888_UNORM PIPE_FORMAT_R8G8B8X8_UNORM +#define PIPE_FORMAT_BGRA8888_UNORM PIPE_FORMAT_B8G8R8A8_UNORM +#define PIPE_FORMAT_BGRX8888_UNORM PIPE_FORMAT_B8G8R8X8_UNORM +#define PIPE_FORMAT_ARGB8888_UNORM PIPE_FORMAT_A8R8G8B8_UNORM +#define PIPE_FORMAT_XRGB8888_UNORM PIPE_FORMAT_X8R8G8B8_UNORM +#define PIPE_FORMAT_ABGR8888_UNORM PIPE_FORMAT_A8B8G8R8_UNORM +#define PIPE_FORMAT_XBGR8888_UNORM PIPE_FORMAT_X8B8G8R8_UNORM +#define PIPE_FORMAT_RGBA8888_SNORM PIPE_FORMAT_R8G8B8A8_SNORM +#define PIPE_FORMAT_RGBX8888_SNORM PIPE_FORMAT_R8G8B8X8_SNORM +#define PIPE_FORMAT_ABGR8888_SNORM PIPE_FORMAT_A8B8G8R8_SNORM +#define PIPE_FORMAT_XBGR8888_SNORM PIPE_FORMAT_X8B8G8R8_SNORM +#define PIPE_FORMAT_RGBA8888_SRGB PIPE_FORMAT_R8G8B8A8_SRGB +#define PIPE_FORMAT_RGBX8888_SRGB PIPE_FORMAT_R8G8B8X8_SRGB +#define PIPE_FORMAT_BGRA8888_SRGB PIPE_FORMAT_B8G8R8A8_SRGB +#define PIPE_FORMAT_BGRX8888_SRGB PIPE_FORMAT_B8G8R8X8_SRGB +#define PIPE_FORMAT_ARGB8888_SRGB PIPE_FORMAT_A8R8G8B8_SRGB +#define PIPE_FORMAT_XRGB8888_SRGB PIPE_FORMAT_X8R8G8B8_SRGB +#define PIPE_FORMAT_ABGR8888_SRGB PIPE_FORMAT_A8B8G8R8_SRGB +#define PIPE_FORMAT_XBGR8888_SRGB PIPE_FORMAT_X8B8G8R8_SRGB +#define PIPE_FORMAT_RGBA8888_USCALED PIPE_FORMAT_R8G8B8A8_USCALED +#define PIPE_FORMAT_RGBA8888_SSCALED PIPE_FORMAT_R8G8B8A8_SSCALED +#define PIPE_FORMAT_RGBA8888_UINT PIPE_FORMAT_R8G8B8A8_UINT +#define PIPE_FORMAT_BGRA8888_UINT PIPE_FORMAT_B8G8R8A8_UINT +#define PIPE_FORMAT_ARGB8888_UINT PIPE_FORMAT_A8R8G8B8_UINT +#define PIPE_FORMAT_ABGR8888_UINT PIPE_FORMAT_A8B8G8R8_UINT +#define PIPE_FORMAT_RGBA8888_SINT PIPE_FORMAT_R8G8B8A8_SINT +#define PIPE_FORMAT_RG88_UNORM PIPE_FORMAT_R8G8_UNORM +#define PIPE_FORMAT_GR88_UNORM PIPE_FORMAT_G8R8_UNORM +#define PIPE_FORMAT_RG88_SNORM PIPE_FORMAT_R8G8_SNORM +#define PIPE_FORMAT_GR88_SNORM PIPE_FORMAT_G8R8_SNORM +#define PIPE_FORMAT_RG1616_UNORM PIPE_FORMAT_R16G16_UNORM +#define PIPE_FORMAT_GR1616_UNORM PIPE_FORMAT_G16R16_UNORM +#define PIPE_FORMAT_RG1616_SNORM PIPE_FORMAT_R16G16_SNORM +#define PIPE_FORMAT_GR1616_SNORM PIPE_FORMAT_G16R16_SNORM +#elif UTIL_ARCH_BIG_ENDIAN +#define PIPE_FORMAT_ABGR8888_UNORM PIPE_FORMAT_R8G8B8A8_UNORM +#define PIPE_FORMAT_XBGR8888_UNORM PIPE_FORMAT_R8G8B8X8_UNORM +#define PIPE_FORMAT_ARGB8888_UNORM PIPE_FORMAT_B8G8R8A8_UNORM +#define PIPE_FORMAT_XRGB8888_UNORM PIPE_FORMAT_B8G8R8X8_UNORM +#define PIPE_FORMAT_BGRA8888_UNORM PIPE_FORMAT_A8R8G8B8_UNORM +#define PIPE_FORMAT_BGRX8888_UNORM PIPE_FORMAT_X8R8G8B8_UNORM +#define PIPE_FORMAT_RGBA8888_UNORM PIPE_FORMAT_A8B8G8R8_UNORM +#define PIPE_FORMAT_RGBX8888_UNORM PIPE_FORMAT_X8B8G8R8_UNORM +#define PIPE_FORMAT_ABGR8888_SNORM PIPE_FORMAT_R8G8B8A8_SNORM +#define PIPE_FORMAT_XBGR8888_SNORM PIPE_FORMAT_R8G8B8X8_SNORM +#define PIPE_FORMAT_RGBA8888_SNORM PIPE_FORMAT_A8B8G8R8_SNORM +#define PIPE_FORMAT_RGBX8888_SNORM PIPE_FORMAT_X8B8G8R8_SNORM +#define PIPE_FORMAT_ABGR8888_SRGB PIPE_FORMAT_R8G8B8A8_SRGB +#define PIPE_FORMAT_XBGR8888_SRGB PIPE_FORMAT_R8G8B8X8_SRGB +#define PIPE_FORMAT_ARGB8888_SRGB PIPE_FORMAT_B8G8R8A8_SRGB +#define PIPE_FORMAT_XRGB8888_SRGB PIPE_FORMAT_B8G8R8X8_SRGB +#define PIPE_FORMAT_BGRA8888_SRGB PIPE_FORMAT_A8R8G8B8_SRGB +#define PIPE_FORMAT_BGRX8888_SRGB PIPE_FORMAT_X8R8G8B8_SRGB +#define PIPE_FORMAT_RGBA8888_SRGB PIPE_FORMAT_A8B8G8R8_SRGB +#define PIPE_FORMAT_RGBX8888_SRGB PIPE_FORMAT_X8B8G8R8_SRGB +#define PIPE_FORMAT_RGBA8888_USCALED PIPE_FORMAT_A8B8G8R8_USCALED +#define PIPE_FORMAT_RGBA8888_SSCALED PIPE_FORMAT_A8B8G8R8_SSCALED +#define PIPE_FORMAT_RGBA8888_UINT PIPE_FORMAT_A8B8G8R8_UINT +#define PIPE_FORMAT_BGRA8888_UINT PIPE_FORMAT_A8R8G8B8_UINT +#define PIPE_FORMAT_ARGB8888_UINT PIPE_FORMAT_B8G8R8A8_UINT +#define PIPE_FORMAT_ABGR8888_UINT PIPE_FORMAT_R8G8B8A8_UINT +#define PIPE_FORMAT_RGBA8888_SINT PIPE_FORMAT_A8B8G8R8_SINT +#define PIPE_FORMAT_RG88_UNORM PIPE_FORMAT_G8R8_UNORM +#define PIPE_FORMAT_GR88_UNORM PIPE_FORMAT_R8G8_UNORM +#define PIPE_FORMAT_RG88_SNORM PIPE_FORMAT_G8R8_SNORM +#define PIPE_FORMAT_GR88_SNORM PIPE_FORMAT_R8G8_SNORM +#define PIPE_FORMAT_RG1616_UNORM PIPE_FORMAT_G16R16_UNORM +#define PIPE_FORMAT_GR1616_UNORM PIPE_FORMAT_R16G16_UNORM +#define PIPE_FORMAT_RG1616_SNORM PIPE_FORMAT_G16R16_SNORM +#define PIPE_FORMAT_GR1616_SNORM PIPE_FORMAT_R16G16_SNORM +#endif + +enum pipe_video_chroma_format +{ + PIPE_VIDEO_CHROMA_FORMAT_400, + PIPE_VIDEO_CHROMA_FORMAT_420, + PIPE_VIDEO_CHROMA_FORMAT_422, + PIPE_VIDEO_CHROMA_FORMAT_444, + PIPE_VIDEO_CHROMA_FORMAT_NONE +}; + +static inline enum pipe_video_chroma_format +pipe_format_to_chroma_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_NV12: + case PIPE_FORMAT_NV21: + case PIPE_FORMAT_YV12: + case PIPE_FORMAT_IYUV: + case PIPE_FORMAT_P010: + case PIPE_FORMAT_P016: + return PIPE_VIDEO_CHROMA_FORMAT_420; + case PIPE_FORMAT_UYVY: + case PIPE_FORMAT_YUYV: + case PIPE_FORMAT_YV16: + return PIPE_VIDEO_CHROMA_FORMAT_422; + default: + return PIPE_VIDEO_CHROMA_FORMAT_NONE; + } +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_state.h b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_state.h new file mode 100644 index 0000000000..2a14b9a435 --- /dev/null +++ b/third_party/rust/glslopt/glsl-optimizer/src/gallium/include/pipe/p_state.h @@ -0,0 +1,980 @@ +/************************************************************************** + * + * Copyright 2007 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +/** + * @file + * + * Abstract graphics pipe state objects. + * + * Basic notes: + * 1. Want compact representations, so we use bitfields. + * 2. Put bitfields before other (GLfloat) fields. + * 3. enum bitfields need to be at least one bit extra in size so the most + * significant bit is zero. MSVC treats enums as signed so if the high + * bit is set, the value will be interpreted as a negative number. + * That causes trouble in various places. + */ + + +#ifndef PIPE_STATE_H +#define PIPE_STATE_H + +#include "p_compiler.h" +#include "p_defines.h" +#include "p_format.h" + + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * Implementation limits + */ +#define PIPE_MAX_ATTRIBS 32 +#define PIPE_MAX_CLIP_PLANES 8 +#define PIPE_MAX_COLOR_BUFS 8 +#define PIPE_MAX_CONSTANT_BUFFERS 32 +#define PIPE_MAX_SAMPLERS 32 +#define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */ +#define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */ +#define PIPE_MAX_SHADER_SAMPLER_VIEWS 128 +#define PIPE_MAX_SHADER_BUFFERS 32 +#define PIPE_MAX_SHADER_IMAGES 32 +#define PIPE_MAX_TEXTURE_LEVELS 16 +#define PIPE_MAX_SO_BUFFERS 4 +#define PIPE_MAX_SO_OUTPUTS 64 +#define PIPE_MAX_VIEWPORTS 16 +#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8 +#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2 +#define PIPE_MAX_WINDOW_RECTANGLES 8 +#define PIPE_MAX_SAMPLE_LOCATION_GRID_SIZE 4 + +#define PIPE_MAX_HW_ATOMIC_BUFFERS 32 +#define PIPE_MAX_VERTEX_STREAMS 4 + +struct pipe_reference +{ + int32_t count; /* atomic */ +}; + + + +/** + * Primitive (point/line/tri) rasterization info + */ +struct pipe_rasterizer_state +{ + unsigned flatshade:1; + unsigned light_twoside:1; + unsigned clamp_vertex_color:1; + unsigned clamp_fragment_color:1; + unsigned front_ccw:1; + unsigned cull_face:2; /**< PIPE_FACE_x */ + unsigned fill_front:2; /**< PIPE_POLYGON_MODE_x */ + unsigned fill_back:2; /**< PIPE_POLYGON_MODE_x */ + unsigned offset_point:1; + unsigned offset_line:1; + unsigned offset_tri:1; + unsigned scissor:1; + unsigned poly_smooth:1; + unsigned poly_stipple_enable:1; + unsigned point_smooth:1; + unsigned sprite_coord_mode:1; /**< PIPE_SPRITE_COORD_ */ + unsigned point_quad_rasterization:1; /** points rasterized as quads or points */ + unsigned point_tri_clip:1; /** large points clipped as tris or points */ + unsigned point_size_per_vertex:1; /**< size computed in vertex shader */ + unsigned multisample:1; /* XXX maybe more ms state in future */ + unsigned force_persample_interp:1; + unsigned line_smooth:1; + unsigned line_stipple_enable:1; + unsigned line_last_pixel:1; + unsigned conservative_raster_mode:2; /**< PIPE_CONSERVATIVE_RASTER_x */ + + /** + * Use the first vertex of a primitive as the provoking vertex for + * flat shading. + */ + unsigned flatshade_first:1; + + unsigned half_pixel_center:1; + unsigned bottom_edge_rule:1; + + /* + * Conservative rasterization subpixel precision bias in bits + */ + unsigned subpixel_precision_x:4; + unsigned subpixel_precision_y:4; + + /** + * When true, rasterization is disabled and no pixels are written. + * This only makes sense with the Stream Out functionality. + */ + unsigned rasterizer_discard:1; + + /** + * Exposed by PIPE_CAP_TILE_RASTER_ORDER. When true, + * tile_raster_order_increasing_* indicate the order that the rasterizer + * should render tiles, to meet the requirements of + * GL_MESA_tile_raster_order. + */ + unsigned tile_raster_order_fixed:1; + unsigned tile_raster_order_increasing_x:1; + unsigned tile_raster_order_increasing_y:1; + + /** + * When false, depth clipping is disabled and the depth value will be + * clamped later at the per-pixel level before depth testing. + * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE. + * + * If PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE is unsupported, depth_clip_near + * is equal to depth_clip_far. + */ + unsigned depth_clip_near:1; + unsigned depth_clip_far:1; + + /** + * When true clip space in the z axis goes from [0..1] (D3D). When false + * [-1, 1] (GL). + * + * NOTE: D3D will always use depth clamping. + */ + unsigned clip_halfz:1; + + /** + * When true do not scale offset_units and use same rules for unorm and + * float depth buffers (D3D9). When false use GL/D3D1X behaviour. + * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. + */ + unsigned offset_units_unscaled:1; + + /** + * Enable bits for clipping half-spaces. + * This applies to both user clip planes and shader clip distances. + * Note that if the bound shader exports any clip distances, these + * replace all user clip planes, and clip half-spaces enabled here + * but not written by the shader count as disabled. + */ + unsigned clip_plane_enable:PIPE_MAX_CLIP_PLANES; + + unsigned line_stipple_factor:8; /**< [1..256] actually */ + unsigned line_stipple_pattern:16; + + /** + * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs. + * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs + * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC + * to emulate PCOORD. + */ + uint16_t sprite_coord_enable; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */ + + float line_width; + float point_size; /**< used when no per-vertex size */ + float offset_units; + float offset_scale; + float offset_clamp; + float conservative_raster_dilate; +}; + + +struct pipe_poly_stipple +{ + unsigned stipple[32]; +}; + + +struct pipe_viewport_state +{ + float scale[3]; + float translate[3]; + enum pipe_viewport_swizzle swizzle_x:3; + enum pipe_viewport_swizzle swizzle_y:3; + enum pipe_viewport_swizzle swizzle_z:3; + enum pipe_viewport_swizzle swizzle_w:3; +}; + + +struct pipe_scissor_state +{ + unsigned minx:16; + unsigned miny:16; + unsigned maxx:16; + unsigned maxy:16; +}; + + +struct pipe_clip_state +{ + float ucp[PIPE_MAX_CLIP_PLANES][4]; +}; + +/** + * A single output for vertex transform feedback. + */ +struct pipe_stream_output +{ + unsigned register_index:6; /**< 0 to 63 (OUT index) */ + unsigned start_component:2; /** 0 to 3 */ + unsigned num_components:3; /** 1 to 4 */ + unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */ + unsigned dst_offset:16; /**< offset into the buffer in dwords */ + unsigned stream:2; /**< 0 to 3 */ +}; + +/** + * Stream output for vertex transform feedback. + */ +struct pipe_stream_output_info +{ + unsigned num_outputs; + /** stride for an entire vertex for each buffer in dwords */ + uint16_t stride[PIPE_MAX_SO_BUFFERS]; + + /** + * Array of stream outputs, in the order they are to be written in. + * Selected components are tightly packed into the output buffer. + */ + struct pipe_stream_output output[PIPE_MAX_SO_OUTPUTS]; +}; + +/** + * The 'type' parameter identifies whether the shader state contains TGSI + * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the + * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be + * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver + * requests a different 'pipe_shader_ir' type, then it must check the 'type' + * enum to see if it is getting TGSI tokens or its preferred IR. + * + * TODO pipe_compute_state should probably get similar treatment to handle + * multiple IR's in a cleaner way.. + * + * NOTE: since it is expected that the consumer will want to perform + * additional passes on the nir_shader, the driver takes ownership of + * the nir_shader. If state trackers need to hang on to the IR (for + * example, variant management), it should use nir_shader_clone(). + */ +struct pipe_shader_state +{ + enum pipe_shader_ir type; + /* TODO move tokens into union. */ + const struct tgsi_token *tokens; + union { + void *native; + void *nir; + } ir; + struct pipe_stream_output_info stream_output; +}; + +static inline void +pipe_shader_state_from_tgsi(struct pipe_shader_state *state, + const struct tgsi_token *tokens) +{ + state->type = PIPE_SHADER_IR_TGSI; + state->tokens = tokens; + memset(&state->stream_output, 0, sizeof(state->stream_output)); +} + +struct pipe_depth_state +{ + unsigned enabled:1; /**< depth test enabled? */ + unsigned writemask:1; /**< allow depth buffer writes? */ + unsigned func:3; /**< depth test func (PIPE_FUNC_x) */ + unsigned bounds_test:1; /**< depth bounds test enabled? */ + float bounds_min; /**< minimum depth bound */ + float bounds_max; /**< maximum depth bound */ +}; + + +struct pipe_stencil_state +{ + unsigned enabled:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */ + unsigned func:3; /**< PIPE_FUNC_x */ + unsigned fail_op:3; /**< PIPE_STENCIL_OP_x */ + unsigned zpass_op:3; /**< PIPE_STENCIL_OP_x */ + unsigned zfail_op:3; /**< PIPE_STENCIL_OP_x */ + unsigned valuemask:8; + unsigned writemask:8; +}; + + +struct pipe_alpha_state +{ + unsigned enabled:1; + unsigned func:3; /**< PIPE_FUNC_x */ + float ref_value; /**< reference value */ +}; + + +struct pipe_depth_stencil_alpha_state +{ + struct pipe_depth_state depth; + struct pipe_stencil_state stencil[2]; /**< [0] = front, [1] = back */ + struct pipe_alpha_state alpha; +}; + + +struct pipe_rt_blend_state +{ + unsigned blend_enable:1; + + unsigned rgb_func:3; /**< PIPE_BLEND_x */ + unsigned rgb_src_factor:5; /**< PIPE_BLENDFACTOR_x */ + unsigned rgb_dst_factor:5; /**< PIPE_BLENDFACTOR_x */ + + unsigned alpha_func:3; /**< PIPE_BLEND_x */ + unsigned alpha_src_factor:5; /**< PIPE_BLENDFACTOR_x */ + unsigned alpha_dst_factor:5; /**< PIPE_BLENDFACTOR_x */ + + unsigned colormask:4; /**< bitmask of PIPE_MASK_R/G/B/A */ +}; + + +struct pipe_blend_state +{ + unsigned independent_blend_enable:1; + unsigned logicop_enable:1; + unsigned logicop_func:4; /**< PIPE_LOGICOP_x */ + unsigned dither:1; + unsigned alpha_to_coverage:1; + unsigned alpha_to_coverage_dither:1; + unsigned alpha_to_one:1; + unsigned max_rt:3; /* index of max rt, Ie. # of cbufs minus 1 */ + struct pipe_rt_blend_state rt[PIPE_MAX_COLOR_BUFS]; +}; + + +struct pipe_blend_color +{ + float color[4]; +}; + + +struct pipe_stencil_ref +{ + ubyte ref_value[2]; +}; + + +/** + * Note that pipe_surfaces are "texture views for rendering" + * and so in the case of ARB_framebuffer_no_attachment there + * is no pipe_surface state available such that we may + * extract the number of samples and layers. + */ +struct pipe_framebuffer_state +{ + uint16_t width, height; + uint16_t layers; /**< Number of layers in a no-attachment framebuffer */ + ubyte samples; /**< Number of samples in a no-attachment framebuffer */ + + /** multiple color buffers for multiple render targets */ + ubyte nr_cbufs; + struct pipe_surface *cbufs[PIPE_MAX_COLOR_BUFS]; + + struct pipe_surface *zsbuf; /**< Z/stencil buffer */ +}; + + +/** + * Texture sampler state. + */ +struct pipe_sampler_state +{ + unsigned wrap_s:3; /**< PIPE_TEX_WRAP_x */ + unsigned wrap_t:3; /**< PIPE_TEX_WRAP_x */ + unsigned wrap_r:3; /**< PIPE_TEX_WRAP_x */ + unsigned min_img_filter:1; /**< PIPE_TEX_FILTER_x */ + unsigned min_mip_filter:2; /**< PIPE_TEX_MIPFILTER_x */ + unsigned mag_img_filter:1; /**< PIPE_TEX_FILTER_x */ + unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */ + unsigned compare_func:3; /**< PIPE_FUNC_x */ + unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */ + unsigned max_anisotropy:5; + unsigned seamless_cube_map:1; + float lod_bias; /**< LOD/lambda bias */ + float min_lod, max_lod; /**< LOD clamp range, after bias */ + union pipe_color_union border_color; +}; + +union pipe_surface_desc { + struct { + unsigned level; + unsigned first_layer:16; + unsigned last_layer:16; + } tex; + struct { + unsigned first_element; + unsigned last_element; + } buf; +}; + +/** + * A view into a texture that can be bound to a color render target / + * depth stencil attachment point. + */ +struct pipe_surface +{ + struct pipe_reference reference; + enum pipe_format format:16; + unsigned writable:1; /**< writable shader resource */ + struct pipe_resource *texture; /**< resource into which this is a view */ + struct pipe_context *context; /**< context this surface belongs to */ + + /* XXX width/height should be removed */ + uint16_t width; /**< logical width in pixels */ + uint16_t height; /**< logical height in pixels */ + + /** + * Number of samples for the surface. This will be 0 if rendering + * should use the resource's nr_samples, or another value if the resource + * is bound using FramebufferTexture2DMultisampleEXT. + */ + unsigned nr_samples:8; + + union pipe_surface_desc u; +}; + + +/** + * A view into a texture that can be bound to a shader stage. + */ +struct pipe_sampler_view +{ + struct pipe_reference reference; + enum pipe_format format:15; /**< typed PIPE_FORMAT_x */ + enum pipe_texture_target target:5; /**< PIPE_TEXTURE_x */ + unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */ + unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */ + unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */ + unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */ + struct pipe_resource *texture; /**< texture into which this is a view */ + struct pipe_context *context; /**< context this view belongs to */ + union { + struct { + unsigned first_layer:16; /**< first layer to use for array textures */ + unsigned last_layer:16; /**< last layer to use for array textures */ + unsigned first_level:8; /**< first mipmap level to use */ + unsigned last_level:8; /**< last mipmap level to use */ + } tex; + struct { + unsigned offset; /**< offset in bytes */ + unsigned size; /**< size of the readable sub-range in bytes */ + } buf; + } u; +}; + + +/** + * A description of a buffer or texture image that can be bound to a shader + * stage. + */ +struct pipe_image_view +{ + struct pipe_resource *resource; /**< resource into which this is a view */ + enum pipe_format format; /**< typed PIPE_FORMAT_x */ + uint16_t access; /**< PIPE_IMAGE_ACCESS_x */ + uint16_t shader_access; /**< PIPE_IMAGE_ACCESS_x */ + + union { + struct { + unsigned first_layer:16; /**< first layer to use for array textures */ + unsigned last_layer:16; /**< last layer to use for array textures */ + unsigned level:8; /**< mipmap level to use */ + } tex; + struct { + unsigned offset; /**< offset in bytes */ + unsigned size; /**< size of the accessible sub-range in bytes */ + } buf; + } u; +}; + + +/** + * Subregion of 1D/2D/3D image resource. + */ +struct pipe_box +{ + /* Fields only used by textures use int16_t instead of int. + * x and width are used by buffers, so they need the full 32-bit range. + */ + int x; + int16_t y; + int16_t z; + int width; + int16_t height; + int16_t depth; +}; + + +/** + * A memory object/resource such as a vertex buffer or texture. + */ +struct pipe_resource +{ + struct pipe_reference reference; + + unsigned width0; /**< Used by both buffers and textures. */ + uint16_t height0; /* Textures: The maximum height/depth/array_size is 16k. */ + uint16_t depth0; + uint16_t array_size; + + enum pipe_format format:16; /**< PIPE_FORMAT_x */ + enum pipe_texture_target target:8; /**< PIPE_TEXTURE_x */ + unsigned last_level:8; /**< Index of last mipmap level present/defined */ + + /** Number of samples determining quality, driving rasterizer, shading, + * and framebuffer. + */ + unsigned nr_samples:8; + + /** Multiple samples within a pixel can have the same value. + * nr_storage_samples determines how many slots for different values + * there are per pixel. Only color buffers can set this lower than + * nr_samples. + */ + unsigned nr_storage_samples:8; + + unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */ + unsigned bind; /**< bitmask of PIPE_BIND_x */ + unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */ + + /** + * For planar images, ie. YUV EGLImage external, etc, pointer to the + * next plane. + */ + struct pipe_resource *next; + /* The screen pointer should be last for optimal structure packing. */ + struct pipe_screen *screen; /**< screen that this texture belongs to */ +}; + + +/** + * Transfer object. For data transfer to/from a resource. + */ +struct pipe_transfer +{ + struct pipe_resource *resource; /**< resource to transfer to/from */ + unsigned level; /**< texture mipmap level */ + enum pipe_transfer_usage usage; + struct pipe_box box; /**< region of the resource to access */ + unsigned stride; /**< row stride in bytes */ + unsigned layer_stride; /**< image/layer stride in bytes */ +}; + + +/** + * A vertex buffer. Typically, all the vertex data/attributes for + * drawing something will be in one buffer. But it's also possible, for + * example, to put colors in one buffer and texcoords in another. + */ +struct pipe_vertex_buffer +{ + uint16_t stride; /**< stride to same attrib in next vertex, in bytes */ + bool is_user_buffer; + unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */ + + union { + struct pipe_resource *resource; /**< the actual buffer */ + const void *user; /**< pointer to a user buffer */ + } buffer; +}; + + +/** + * A constant buffer. A subrange of an existing buffer can be set + * as a constant buffer. + */ +struct pipe_constant_buffer +{ + struct pipe_resource *buffer; /**< the actual buffer */ + unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */ + unsigned buffer_size; /**< how much data can be read in shader */ + const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */ +}; + + +/** + * An untyped shader buffer supporting loads, stores, and atomics. + */ +struct pipe_shader_buffer { + struct pipe_resource *buffer; /**< the actual buffer */ + unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */ + unsigned buffer_size; /**< how much data can be read in shader */ +}; + + +/** + * A stream output target. The structure specifies the range vertices can + * be written to. + * + * In addition to that, the structure should internally maintain the offset + * into the buffer, which should be incremented everytime something is written + * (appended) to it. The internal offset is buffer_offset + how many bytes + * have been written. The internal offset can be stored on the device + * and the CPU actually doesn't have to query it. + * + * Note that the buffer_size variable is actually specifying the available + * space in the buffer, not the size of the attached buffer. + * In other words in majority of cases buffer_size would simply be + * 'buffer->width0 - buffer_offset', so buffer_size refers to the size + * of the buffer left, after accounting for buffer offset, for stream output + * to write to. + * + * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have + * actually been written. + */ +struct pipe_stream_output_target +{ + struct pipe_reference reference; + struct pipe_resource *buffer; /**< the output buffer */ + struct pipe_context *context; /**< context this SO target belongs to */ + + unsigned buffer_offset; /**< offset where data should be written, in bytes */ + unsigned buffer_size; /**< how much data is allowed to be written */ +}; + + +/** + * Information to describe a vertex attribute (position, color, etc) + */ +struct pipe_vertex_element +{ + /** Offset of this attribute, in bytes, from the start of the vertex */ + unsigned src_offset:16; + + /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does + * this attribute live in? + */ + unsigned vertex_buffer_index:5; + + enum pipe_format src_format:11; + + /** Instance data rate divisor. 0 means this is per-vertex data, + * n means per-instance data used for n consecutive instances (n > 0). + */ + unsigned instance_divisor; +}; + + +struct pipe_draw_indirect_info +{ + unsigned offset; /**< must be 4 byte aligned */ + unsigned stride; /**< must be 4 byte aligned */ + unsigned draw_count; /**< number of indirect draws */ + unsigned indirect_draw_count_offset; /**< must be 4 byte aligned */ + + /* Indirect draw parameters resource is laid out as follows: + * + * if using indexed drawing: + * struct { + * uint32_t count; + * uint32_t instance_count; + * uint32_t start; + * int32_t index_bias; + * uint32_t start_instance; + * }; + * otherwise: + * struct { + * uint32_t count; + * uint32_t instance_count; + * uint32_t start; + * uint32_t start_instance; + * }; + */ + struct pipe_resource *buffer; + + /* Indirect draw count resource: If not NULL, contains a 32-bit value which + * is to be used as the real draw_count. + */ + struct pipe_resource *indirect_draw_count; +}; + + +/** + * Information to describe a draw_vbo call. + */ +struct pipe_draw_info +{ + ubyte index_size; /**< if 0, the draw is not indexed. */ + enum pipe_prim_type mode:8; /**< the mode of the primitive */ + unsigned primitive_restart:1; + unsigned has_user_indices:1; /**< if true, use index.user_buffer */ + ubyte vertices_per_patch; /**< the number of vertices per patch */ + + /** + * Direct draws: start is the index of the first vertex + * Non-indexed indirect draws: not used + * Indexed indirect draws: start is added to the indirect start. + */ + unsigned start; + unsigned count; /**< number of vertices */ + + unsigned start_instance; /**< first instance id */ + unsigned instance_count; /**< number of instances */ + + unsigned drawid; /**< id of this draw in a multidraw */ + + /** + * For indexed drawing, these fields apply after index lookup. + */ + int index_bias; /**< a bias to be added to each index */ + unsigned min_index; /**< the min index */ + unsigned max_index; /**< the max index */ + + /** + * Primitive restart enable/index (only applies to indexed drawing) + */ + unsigned restart_index; + + /* Pointers must be at the end for an optimal structure layout on 64-bit. */ + + /** + * An index buffer. When an index buffer is bound, all indices to vertices + * will be looked up from the buffer. + * + * If has_user_indices, use index.user, else use index.resource. + */ + union { + struct pipe_resource *resource; /**< real buffer */ + const void *user; /**< pointer to a user buffer */ + } index; + + struct pipe_draw_indirect_info *indirect; /**< Indirect draw. */ + + /** + * Stream output target. If not NULL, it's used to provide the 'count' + * parameter based on the number vertices captured by the stream output + * stage. (or generally, based on the number of bytes captured) + * + * Only 'mode', 'start_instance', and 'instance_count' are taken into + * account, all the other variables from pipe_draw_info are ignored. + * + * 'start' is implicitly 0 and 'count' is set as discussed above. + * The draw command is non-indexed. + * + * Note that this only provides the count. The vertex buffers must + * be set via set_vertex_buffers manually. + */ + struct pipe_stream_output_target *count_from_stream_output; +}; + + +/** + * Information to describe a blit call. + */ +struct pipe_blit_info +{ + struct { + struct pipe_resource *resource; + unsigned level; + struct pipe_box box; /**< negative width, height only legal for src */ + /* For pipe_surface-like format casting: */ + enum pipe_format format; /**< must be supported for sampling (src) + or rendering (dst), ZS is always supported */ + } dst, src; + + unsigned mask; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */ + unsigned filter; /**< PIPE_TEX_FILTER_* */ + + bool scissor_enable; + struct pipe_scissor_state scissor; + + /* Window rectangles can either be inclusive or exclusive. */ + bool window_rectangle_include; + unsigned num_window_rectangles; + struct pipe_scissor_state window_rectangles[PIPE_MAX_WINDOW_RECTANGLES]; + + bool render_condition_enable; /**< whether the blit should honor the + current render condition */ + bool alpha_blend; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */ +}; + +/** + * Information to describe a launch_grid call. + */ +struct pipe_grid_info +{ + /** + * For drivers that use PIPE_SHADER_IR_NATIVE as their prefered IR, this + * value will be the index of the kernel in the opencl.kernels metadata + * list. + */ + uint32_t pc; + + /** + * Will be used to initialize the INPUT resource, and it should point to a + * buffer of at least pipe_compute_state::req_input_mem bytes. + */ + void *input; + + /** + * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to + * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with + * 1 for non-used dimensions. + */ + uint work_dim; + + /** + * Determine the layout of the working block (in thread units) to be used. + */ + uint block[3]; + + /** + * last_block allows disabling threads at the farthermost grid boundary. + * Full blocks as specified by "block" are launched, but the threads + * outside of "last_block" dimensions are disabled. + * + * If a block touches the grid boundary in the i-th axis, threads with + * THREAD_ID[i] >= last_block[i] are disabled. + * + * If last_block[i] is 0, it has the same behavior as last_block[i] = block[i], + * meaning no effect. + * + * It's equivalent to doing this at the beginning of the compute shader: + * + * for (i = 0; i < 3; i++) { + * if (block_id[i] == grid[i] - 1 && + * last_block[i] && thread_id[i] >= last_block[i]) + * return; + * } + */ + uint last_block[3]; + + /** + * Determine the layout of the grid (in block units) to be used. + */ + uint grid[3]; + + /* Indirect compute parameters resource: If not NULL, block sizes are taken + * from this buffer instead, which is laid out as follows: + * + * struct { + * uint32_t num_blocks_x; + * uint32_t num_blocks_y; + * uint32_t num_blocks_z; + * }; + */ + struct pipe_resource *indirect; + unsigned indirect_offset; /**< must be 4 byte aligned */ +}; + +/** + * Structure used as a header for serialized compute programs. + */ +struct pipe_binary_program_header +{ + uint32_t num_bytes; /**< Number of bytes in the LLVM bytecode program. */ + char blob[]; +}; + +struct pipe_compute_state +{ + enum pipe_shader_ir ir_type; /**< IR type contained in prog. */ + const void *prog; /**< Compute program to be executed. */ + unsigned req_local_mem; /**< Required size of the LOCAL resource. */ + unsigned req_private_mem; /**< Required size of the PRIVATE resource. */ + unsigned req_input_mem; /**< Required size of the INPUT resource. */ +}; + +/** + * Structure that contains a callback for debug messages from the driver back + * to the state tracker. + */ +struct pipe_debug_callback +{ + /** + * When set to \c true, the callback may be called asynchronously from a + * driver-created thread. + */ + bool async; + + /** + * Callback for the driver to report debug/performance/etc information back + * to the state tracker. + * + * \param data user-supplied data pointer + * \param id message type identifier, if pointed value is 0, then a + * new id is assigned + * \param type PIPE_DEBUG_TYPE_* + * \param format printf-style format string + * \param args args for format string + */ + void (*debug_message)(void *data, + unsigned *id, + enum pipe_debug_type type, + const char *fmt, + va_list args); + void *data; +}; + +/** + * Structure that contains a callback for device reset messages from the driver + * back to the state tracker. + * + * The callback must not be called from driver-created threads. + */ +struct pipe_device_reset_callback +{ + /** + * Callback for the driver to report when a device reset is detected. + * + * \param data user-supplied data pointer + * \param status PIPE_*_RESET + */ + void (*reset)(void *data, enum pipe_reset_status status); + + void *data; +}; + +/** + * Information about memory usage. All sizes are in kilobytes. + */ +struct pipe_memory_info +{ + unsigned total_device_memory; /**< size of device memory, e.g. VRAM */ + unsigned avail_device_memory; /**< free device memory at the moment */ + unsigned total_staging_memory; /**< size of staging memory, e.g. GART */ + unsigned avail_staging_memory; /**< free staging memory at the moment */ + unsigned device_memory_evicted; /**< size of memory evicted (monotonic counter) */ + unsigned nr_device_memory_evictions; /**< # of evictions (monotonic counter) */ +}; + +/** + * Structure that contains information about external memory + */ +struct pipe_memory_object +{ + bool dedicated; +}; + +#ifdef __cplusplus +} +#endif + +#endif |