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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
commit | 2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch) | |
tree | 848558de17fb3008cdf4d861b01ac7781903ce39 /Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml | |
parent | Initial commit. (diff) | |
download | linux-upstream.tar.xz linux-upstream.zip |
Adding upstream version 6.1.76.upstream/6.1.76upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml new file mode 100644 index 000000000..7f79a06e7 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx) + +maintainers: + - Zhiyong Tao <zhiyong.tao@mediatek.com> + - Matthias Brugger <matthias.bgg@gmail.com> + +description: | + The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found + in some Mediatek SoCs which among other things measures the temperatures + in the SoC. It can be used directly with register accesses, but it is also + used by thermal controller which reads the temperatures from the AUXADC + directly via its own bus interface. See mediatek-thermal bindings + for the Thermal Controller which holds a phandle to the AUXADC. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt2701-auxadc + - mediatek,mt2712-auxadc + - mediatek,mt6765-auxadc + - mediatek,mt7622-auxadc + - mediatek,mt8173-auxadc + - items: + - enum: + - mediatek,mt7623-auxadc + - const: mediatek,mt2701-auxadc + - items: + - enum: + - mediatek,mt8183-auxadc + - mediatek,mt8186-auxadc + - mediatek,mt8188-auxadc + - mediatek,mt8195-auxadc + - mediatek,mt8516-auxadc + - const: mediatek,mt8173-auxadc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: main + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - "#io-channel-cells" + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + adc@11001000 { + compatible = "mediatek,mt8183-auxadc", + "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_AUXADC>; + clock-names = "main"; + #io-channel-cells = <1>; + }; + }; +... |